1.. _imx8mm_evk: 2 3NXP i.MX8MM EVK (Cortex-A53) 4############################ 5 6Overview 7******** 8 9i.MX8M Mini LPDDR4 EVK board is based on NXP i.MX8M Mini applications 10processor, composed of a quad Cortex®-A53 cluster and a single Cortex®-M4 core. 11Zephyr OS is ported to run on the Cortex®-A53 core. 12 13- Board features: 14 15 - RAM: 2GB LPDDR4 16 - Storage: 17 18 - SanDisk 16GB eMMC5.1 19 - Micron 32MB QSPI NOR 20 - microSD Socket 21 - Wireless: 22 23 - WiFi: 2.4/5GHz IEEE 802.11b/g/n 24 - Bluetooth: v4.1 25 - USB: 26 27 - OTG - 2x type C 28 - Ethernet 29 - PCI-E M.2 30 - Connectors: 31 32 - 40-Pin Dual Row Header 33 - LEDs: 34 35 - 1x Power status LED 36 - 1x UART LED 37 - Debug 38 39 - JTAG 20-pin connector 40 - MicroUSB for UART debug, two COM ports for A53 and M4 41 42More information about the board can be found at the 43`NXP website`_. 44 45Supported Features 46================== 47 48The Zephyr mimx8mm_evk_a53 board configuration supports the following hardware 49features: 50 51+-----------+------------+-------------------------------------+ 52| Interface | Controller | Driver/Component | 53+===========+============+=====================================+ 54| GIC-v3 | on-chip | interrupt controller | 55+-----------+------------+-------------------------------------+ 56| ARM TIMER | on-chip | system clock | 57+-----------+------------+-------------------------------------+ 58| UART | on-chip | serial port | 59+-----------+------------+-------------------------------------+ 60 61Devices 62======== 63System Clock 64------------ 65 66This board configuration uses a system clock frequency of 8 MHz. 67 68Serial Port 69----------- 70 71This board configuration uses a single serial communication channel with the 72CPU's UART4. 73 74Programming and Debugging 75************************* 76 77Copy the compiled ``zephyr.bin`` to the first FAT partition of the SD card and 78plug the SD card into the board. Power it up and stop the u-boot execution at 79prompt. 80 81Use U-Boot to load and kick zephyr.bin: 82 83.. code-block:: console 84 85 mw 303d0518 f 1; fatload mmc 1:1 0x93c00000 zephyr.bin; dcache flush; icache flush; dcache off; icache off; go 0x93c00000 86 87Or kick SMP zephyr.bin: 88 89.. code-block:: console 90 91 mw 303d0518 f 1; fatload mmc 1:1 0x93c00000 zephyr.bin; dcache flush; icache flush; dcache off; icache off; cpu 2 release 0x93c00000 92 93 94Use this configuration to run basic Zephyr applications and kernel tests, 95for example, with the :zephyr:code-sample:`synchronization` sample: 96 97.. zephyr-app-commands:: 98 :zephyr-app: samples/synchronization 99 :host-os: unix 100 :board: mimx8mm_evk_a53 101 :goals: run 102 103This will build an image with the synchronization sample app, boot it and 104display the following ram console output: 105 106.. code-block:: console 107 108 *** Booting Zephyr OS build zephyr-v3.1.0-3575-g44dd713bd883 *** 109 thread_a: Hello World from cpu 0 on mimx8mm_evk_a53! 110 thread_b: Hello World from cpu 0 on mimx8mm_evk_a53! 111 thread_a: Hello World from cpu 0 on mimx8mm_evk_a53! 112 thread_b: Hello World from cpu 0 on mimx8mm_evk_a53! 113 thread_a: Hello World from cpu 0 on mimx8mm_evk_a53! 114 115Use Jailhouse hypervisor, after root cell linux is up: 116 117.. code-block:: console 118 119 #jailhouse enable imx8mm.cell 120 #jailhouse cell create imx8mm-zephyr.cell 121 #jailhouse cell load 1 zephyr.bin -a 0x93c00000 122 #jailhouse cell start 1 123 124References 125========== 126 127.. _NXP website: 128 https://www.nxp.com/design/development-boards/i.mx-evaluation-and-development-boards/evaluation-kit-for-thebr-i.mx-8m-mini-applications-processor:8MMINILPD4-EVK 129 130.. _i.MX 8M Applications Processor Reference Manual: 131 https://www.nxp.com/webapp/Download?colCode=IMX8MMRM 132