1.. _imx8mp_evk:
2
3NXP i.MX8MP EVK (Cortex-A53)
4#################################
5
6Overview
7********
8
9i.MX8M Plus LPDDR4 EVK board is based on NXP i.MX8M Plus applications
10processor, composed of a quad Cortex®-A53 cluster and a single Cortex®-M7 core.
11Zephyr OS is ported to run on the Cortex®-A53 core.
12
13- Board features:
14
15  - RAM: 2GB LPDDR4
16  - Storage:
17
18    - SanDisk 16GB eMMC5.1
19    - Micron 32MB QSPI NOR
20    - microSD Socket
21  - Wireless:
22
23    - WiFi: 2.4/5GHz IEEE 802.11b/g/n
24    - Bluetooth: v4.1
25  - USB:
26
27    - OTG - 2x type C
28  - Ethernet
29  - PCI-E M.2
30  - Connectors:
31
32    - 40-Pin Dual Row Header
33  - LEDs:
34
35    - 1x Power status LED
36    - 1x UART LED
37  - Debug
38
39    - JTAG 20-pin connector
40    - MicroUSB for UART debug, two COM ports for A53 and M4
41
42More information about the board can be found at the
43`NXP website`_.
44
45Supported Features
46==================
47
48The Zephyr mimx8mp_evk_a53 board configuration supports the following hardware
49features:
50
51+-----------+------------+-------------------------------------+
52| Interface | Controller | Driver/Component                    |
53+===========+============+=====================================+
54| GIC-v3    | on-chip    | interrupt controller                |
55+-----------+------------+-------------------------------------+
56| ARM TIMER | on-chip    | system clock                        |
57+-----------+------------+-------------------------------------+
58| UART      | on-chip    | serial port                         |
59+-----------+------------+-------------------------------------+
60
61Devices
62========
63System Clock
64------------
65
66This board configuration uses a system clock frequency of 8 MHz.
67
68Serial Port
69-----------
70
71This board configuration uses a single serial communication channel with the
72CPU's UART4.
73
74Programming and Debugging
75*************************
76
77Copy the compiled ``zephyr.bin`` to the first FAT partition of the SD card and
78plug the SD card into the board. Power it up and stop the u-boot execution at
79prompt.
80
81Use U-Boot to load and kick non-smp zephyr.bin:
82
83.. code-block:: console
84
85    mw 303d0518 f 1; fatload mmc 1:1 0xc0000000 zephyr.bin; dcache flush; icache flush; dcache off; icache off; go 0xc0000000
86
87Or kick SMP zephyr.bin:
88
89.. code-block:: console
90
91    mw 303d0518 f 1; fatload mmc 1:1 0xc0000000 zephyr.bin; dcache flush; icache flush; dcache off; icache off; cpu 2 release 0xc0000000
92
93Use this configuration to run basic Zephyr applications and kernel tests,
94for example, with the :zephyr:code-sample:`synchronization` sample:
95
96.. zephyr-app-commands::
97   :zephyr-app: samples/synchronization
98   :host-os: unix
99   :board: mimx8mp_evk_a53
100   :goals: run
101
102This will build an image with the synchronization sample app, boot it and
103display the following console output:
104
105.. code-block:: console
106
107    *** Booting Zephyr OS build zephyr-v3.1.0-3575-g44dd713bd883  ***
108    thread_a: Hello World from cpu 0 on mimx8mp_evk_a53!
109    thread_b: Hello World from cpu 0 on mimx8mp_evk_a53!
110    thread_a: Hello World from cpu 0 on mimx8mp_evk_a53!
111    thread_b: Hello World from cpu 0 on mimx8mp_evk_a53!
112    thread_a: Hello World from cpu 0 on mimx8mp_evk_a53!
113
114Use Jailhouse hypervisor, after root cell linux is up:
115
116.. code-block:: console
117
118    #jailhouse enable imx8mp.cell
119    #jailhouse cell create imx8mp-zephyr.cell
120    #jailhouse cell load 1 zephyr.bin -a 0xc0000000
121    #jailhouse cell start 1
122
123References
124==========
125
126.. _NXP website:
127   https://www.nxp.com/design/development-boards/i-mx-evaluation-and-development-boards/evaluation-kit-for-the-i-mx-8m-plus-applications-processor:8MPLUSLPD4-EVK
128
129.. _i.MX 8M Applications Processor Reference Manual:
130   https://www.nxp.com/docs/en/reference-manual/IMX8MPRM.pdf
131