Home
last modified time | relevance | path

Searched +full:xip +full:- +full:config (Results 1 – 25 of 126) sorted by relevance

123456

/Zephyr-latest/soc/ti/simplelink/cc32xx/
DKconfig2 # SPDX-License-Identifier: Apache-2.0
3 # Copyright (c) 2016-2017, Texas Instruments Incorporated
5 config SOC_SERIES_CC32XX
12 config SOC_CC3220SF
15 config SOC_CC3235SF
18 config CC3220SF_DEBUG
19 bool "Prepend debug header, disabling flash verification" if XIP
20 default XIP
23 config CC3235SF_DEBUG
24 bool "Prepend debug header, disabling flash verification" if XIP
[all …]
DKconfig.defconfig.cc3235sf3 # SPDX-License-Identifier: Apache-2.0
7 config NUM_IRQS
12 config SYS_CLOCK_HW_CYCLES_PER_SEC
15 config ROM_START_OFFSET
16 default 0x800 if XIP
17 default 0x0 if !XIP
DKconfig.defconfig.cc3220sf2 # SPDX-License-Identifier: Apache-2.0
3 # Copyright (c) 2016-2017, Texas Instruments Incorporated
7 config NUM_IRQS
12 config SYS_CLOCK_HW_CYCLES_PER_SEC
15 config ROM_START_OFFSET
16 default 0x800 if XIP
17 default 0x0 if !XIP
/Zephyr-latest/soc/nxp/s32/s32k3/
DKconfig3 # Copyright 2023-2024 NXP
4 # SPDX-License-Identifier: Apache-2.0
6 config SOC_SERIES_S32K3
15 select SOC_RESET_HOOK if XIP
16 select USE_DT_CODE_PARTITION if XIP
30 config IVT_HEADER_OFFSET
32 depends on XIP
37 config IVT_HEADER_SIZE
39 depends on XIP
/Zephyr-latest/drivers/memc/
DKconfig.mcux1 # Copyright 2020-2023 NXP
5 # SPDX-License-Identifier: Apache-2.0
9 config MEMC_MCUX_FLEXSPI_W956A8MBYA
15 config MEMC_MCUX_FLEXSPI_S27KS0641
21 config MEMC_MCUX_FLEXSPI_APS6408L
27 config MEMC_MCUX_FLEXSPI_IS66WVQ8M4
33 config MEMC_MCUX_FLEXSPI_APS6404L
39 config MEMC_MCUX_FLEXSPI_INIT_PRIORITY
49 config MEMC_MCUX_FLEXSPI_INIT_XIP
50 bool "Initialize FLEXSPI when using device for XIP"
[all …]
/Zephyr-latest/boards/nxp/s32z2xxdc2/
DKconfig.defconfig2 # SPDX-License-Identifier: Apache-2.0
6 config BUILD_OUTPUT_BIN
11 config UART_INTERRUPT_DRIVEN
14 config UART_CONSOLE
21 config SHELL_STACK_SIZE
28 config NET_L2_ETHERNET
33 if XIP
36 config BUILD_OUTPUT_ADJUST_LMA
37 default "-0x47800000"
39 config CPU_CORTEX_R52_CACHE_SEGREGATION
[all …]
/Zephyr-latest/soc/arm/designstart/
DKconfig2 # SPDX-License-Identifier: Apache-2.0
4 config SOC_SERIES_DESIGNSTART
7 config SOC_DESIGNSTART_FPGA_CORTEX_M1
9 imply XIP
12 config SOC_DESIGNSTART_FPGA_CORTEX_M3
14 imply XIP
/Zephyr-latest/soc/nuvoton/npcm/npcm4/
DKconfig.defconfig3 # SPDX-License-Identifier: Apache-2.0
7 config NUM_IRQS
10 config ROM_START_OFFSET
11 default 0x600 if XIP
12 default 0x0 if !XIP
/Zephyr-latest/drivers/flash/
DKconfig.nordic_qspi_nor2 # SPDX-License-Identifier: Apache-2.0
19 config NORDIC_QSPI_NOR_INIT_PRIORITY
25 config NORDIC_QSPI_NOR_FLASH_LAYOUT_PAGE_SIZE
33 config NORDIC_QSPI_NOR_STACK_WRITE_BUFFER_SIZE
34 int "Size of a stack-based buffer to handle writes not supported by QSPI"
38 from a word-aligned location in RAM. A non-zero value here enables
45 config NORDIC_QSPI_NOR_XIP
46 bool "XIP (eXecute in place)"
50 stored in QSPI XIP region. Note that for this functionality to work,
51 the QSPI NOR init priority must be set so that no XIP code in the
[all …]
DKconfig.stm321 # ST Microelectronics STM32 MCUs Flash driver config
7 # SPDX-License-Identifier: Apache-2.0
9 config STM32_MEMMAP
10 bool "NOR Flash in MemoryMapped for XiP"
11 depends on XIP && \
16 This option enables the XIP mode for the external NOR flash
34 config FLASH_STM32_WRITE_PROTECT
43 config FLASH_STM32_WRITE_PROTECT_DISABLE_PREVENTION
51 config FLASH_STM32_READOUT_PROTECTION
62 config FLASH_STM32_READOUT_PROTECTION_DISABLE_ALLOW
[all …]
/Zephyr-latest/drivers/mspi/
DKconfig4 # SPDX-License-Identifier: Apache-2.0
10 bool "Multi-bit Serial Peripheral Interface (MSPI) bus drivers"
16 config MSPI_ASYNC
22 config MSPI_PERIPHERAL
28 config MSPI_INIT_PRIORITY
34 config MSPI_COMPLETION_TIMEOUT_TOLERANCE
40 config MSPI_XIP
41 bool "XIP eXecute In Place"
43 Describes controller hardware XIP capability and
46 config MSPI_SCRAMBLE
[all …]
/Zephyr-latest/dts/bindings/mspi/
Dmspi-device.yaml2 # SPDX-License-Identifier: Apache-2.0
8 on-bus: mspi
14 mspi-max-frequency:
22 mspi-io-mode:
25 - "MSPI_IO_MODE_SINGLE"
26 - "MSPI_IO_MODE_DUAL"
27 - "MSPI_IO_MODE_DUAL_1_1_2"
28 - "MSPI_IO_MODE_DUAL_1_2_2"
29 - "MSPI_IO_MODE_QUAD"
30 - "MSPI_IO_MODE_QUAD_1_1_4"
[all …]
/Zephyr-latest/soc/nxp/s32/s32k1/
DKconfig3 # Copyright 2023-2024 NXP
4 # SPDX-License-Identifier: Apache-2.0
6 config SOC_SERIES_S32K1
12 select MPU_ALLOW_FLASH_WRITE if !XIP
25 config SOC_S32K116
28 config SOC_S32K118
31 config SOC_S32K142
37 config SOC_S32K142W
43 config SOC_S32K144
49 config SOC_S32K144W
[all …]
/Zephyr-latest/soc/telink/tlsr/tlsr951x/
DKconfig.defconfig2 # SPDX-License-Identifier: Apache-2.0
6 config SYS_CLOCK_HW_CYCLES_PER_SEC
9 config RISCV_SOC_INTERRUPT_INIT
12 config NUM_IRQS
15 config XIP config
18 config MAIN_STACK_SIZE
21 config IDLE_STACK_SIZE
24 config TEST_EXTRA_STACK_SIZE
27 config 2ND_LVL_INTR_00_OFFSET
30 config HAS_FLASH_LOAD_OFFSET
DKconfig2 # SPDX-License-Identifier: Apache-2.0
4 config SOC_SERIES_TLSR951X
20 imply XIP
25 config TELINK_B91_HWDSP
29 config TELINK_B91_PFT_ARCH
/Zephyr-latest/soc/andestech/ae350/
DKconfig.defconfig.ae3502 # SPDX-License-Identifier: Apache-2.0
6 config SYS_CLOCK_TICKS_PER_SEC
7 default 100 if (!ICACHE || XIP)
9 config MAIN_STACK_SIZE
12 config IDLE_STACK_SIZE
15 config PRIVILEGED_STACK_SIZE
18 config TEST_EXTRA_STACK_SIZE
21 config MP_MAX_NUM_CPUS
/Zephyr-latest/boards/toradex/verdin_imx8mm/
DKconfig.defconfig4 # SPDX-License-Identifier: Apache-2.0
8 if !XIP
9 config FLASH_SIZE
11 config FLASH_BASE_ADDRESS
/Zephyr-latest/soc/infineon/cat1b/cyw20829/
DKconfig.defconfig3 # SPDX-License-Identifier: Apache-2.0
9 config INFINEON_CAT1_LP_TIMER
12 config CORTEX_M_SYSTICK
15 config NUM_IRQS
18 config SYS_CLOCK_HW_CYCLES_PER_SEC
21 config BUILD_OUTPUT_ADJUST_LMA
22 depends on XIP
23 default "0x60000000 - $(dt_node_reg_addr_hex,$(dt_nodelabel_path,flash0))"
/Zephyr-latest/soc/intel/intel_niosv/niosv/
DKconfig1 # Copyright (C) 2023-2024, Intel Corporation
3 # SPDX-License-Identifier: Apache-2.0
5 config SOC_SERIES_NIOSV
15 imply XIP
17 config SOC_NIOSV_M
21 config SOC_NIOSV_G
/Zephyr-latest/soc/microchip/miv/polarfire/
DKconfig3 # Copyright (c) 2020-2021 Microchip Technology Inc
4 # SPDX-License-Identifier: Apache-2.0
6 config SOC_SERIES_POLARFIRE
11 imply XIP
13 config SOC_POLARFIRE
21 config SOC_POLARFIRE_U54
28 config SOC_POLARFIRE_E51
36 config MPFS_HAL
/Zephyr-latest/soc/starfive/jh71xx/
DKconfig2 # SPDX-License-Identifier: Apache-2.0
4 config SOC_SERIES_STARFIVE_JH71XX
9 imply XIP
11 config SOC_JH7100
21 config SOC_JH7110
/Zephyr-latest/soc/sensry/ganymed/sy1xx/
DKconfig.defconfig1 # SPDX-License-Identifier: Apache-2.0
6 config RISCV_PMP
9 config RISCV_HAS_CLIC
12 config RISCV_VECTORED_MODE
15 config INCLUDE_RESET_VECTOR
18 config GEN_IRQ_VECTOR_TABLE
21 config RISCV_GENERIC_TOOLCHAIN
24 config RV_BOOT_HART
28 config RISCV_SOC_CONTEXT_SAVE
31 config RISCV_SOC_OFFSETS
[all …]
/Zephyr-latest/soc/microchip/miv/miv/
DKconfig4 # SPDX-License-Identifier: Apache-2.0
6 config SOC_SERIES_MIV
11 imply XIP
13 config SOC_MIV
/Zephyr-latest/soc/nordic/nrf92/
DKconfig.defconfig4 # SPDX-License-Identifier: Apache-2.0
12 config CACHE_NRF_CACHE
20 DT_CHOSEN_Z_CODE = zephyr,code-partition
22 config BUILD_OUTPUT_ADJUST_LMA
23 depends on !XIP
24 default "$(dt_chosen_partition_addr_hex,$(DT_CHOSEN_Z_CODE)) - \
27 config BUILD_OUTPUT_HEX
30 config SYS_CLOCK_HW_CYCLES_PER_SEC
35 config SPI_DW_HSSI
38 config SPI_DW_ACCESS_WORD_ONLY
/Zephyr-latest/soc/nordic/nrf91/
DKconfig4 # SPDX-License-Identifier: Apache-2.0
6 config SOC_SERIES_NRF91X
14 imply XIP
21 config NRF_SPU_FLASH_REGION_SIZE
27 config NRF_SPU_RAM_REGION_SIZE
33 config NRF_ENABLE_ICACHE
34 bool "Instruction cache (I-Cache)"

123456