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/Zephyr-latest/dts/bindings/dma/
Dgd,gd32-dma-v1.yaml2 # SPDX-License-Identifier: Apache-2.0
12 - bit 6-7: Direction (see dma.h)
13 - 0x0: MEMORY to MEMORY
14 - 0x1: MEMORY to PERIPH
15 - 0x2: PERIPH to MEMORY
16 - 0x3: reserved for PERIPH to PERIPH
18 - bit 9: Peripheral address increase
19 - 0x0: no address increment between transfers
20 - 0x1: increment address between transfers
22 - bit 10: Memory address increase
[all …]
Dst,stm32-dmamux.yaml2 # SPDX-License-Identifier: Apache-2.0
9 DMAMUX clients connected to the STM32 DMA ultiplexer must use a two-cell specifier
11 1. channel: the mux channel from 0 to <dma-channels> - 1
13 3. channel-config: A 32bit mask specifying the DMA channel configuration
15 -bit 6-7 : Direction (see dma.h)
20 -bit 9 : Peripheral Increment Address
23 -bit 10 : Memory Increment Address
26 -bit 11-12 : Peripheral data size
28 0x1: Half-word (16 bits)
29 0x2: Word (32 bits)
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Dst,stm32-bdma.yaml2 # SPDX-License-Identifier: Apache-2.0
7 The STM32 BDMA is a general-purpose direct memory access controller
11 described in the dma.txt file, using a four-cell specifier for each
13 1. channel: the bdma stream from 0 to <bdma-requests>
15 3. channel-config: A 32bit mask specifying the BDMA channel configuration
17 -bit 6-7 : Direction (see dma.h)
22 -bit 9 : Peripheral Increment Address
25 -bit 10 : Memory Increment Address
28 -bit 11-12 : Peripheral data size
30 0x1: Half-word (16 bits)
[all …]
Dst,stm32-dma-v1.yaml2 # SPDX-License-Identifier: Apache-2.0
10 described in the dma.txt file, using a four-cell specifier for each
12 1. channel: the dma stream from 0 to <dma-requests>
14 this value is 0 for Memory-to-memory transfers
15 or a value between <1> .. <dma-generators> (not supported yet)
16 or a value between <dma-generators>+1 .. <dma-generators>+<dma-requests>
17 3. channel-config: A 32bit mask specifying the DMA channel configuration
19 -bit 6-7 : Direction (see dma.h)
24 -bit 9 : Peripheral Increment Address
27 -bit 10 : Memory Increment Address
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/Zephyr-latest/doc/kernel/services/smp/
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/Zephyr-latest/doc/services/pm/images/
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/Zephyr-latest/dts/bindings/dai/
Dnxp,dai-esai.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "nxp,dai-esai"
13 dai-index:
21 tx-fifo-watermark:
29 rx-fifo-watermark:
37 fifo-depth:
48 that the sanity check for tx/rx-fifo-watermark uses DEFAULT_FIFO_DETPH
52 word-width:
55 This property is used to specify the width of a word. If unspecified,
56 the word width used will be 24.
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/Zephyr-latest/drivers/spi/
Dspi_litex_litespi.c4 * SPDX-License-Identifier: Apache-2.0
44 const struct spi_litex_dev_config *dev_config = dev->config; in spi_litex_set_frequency()
46 if (!dev_config->phy_clk_divisor_exists) { in spi_litex_set_frequency()
52 uint32_t divisor = DIV_ROUND_UP(sys_clock_hw_cycles_per_sec(), (2 * config->frequency)) - 1; in spi_litex_set_frequency()
54 litex_write32(divisor, dev_config->phy_clk_divisor_addr); in spi_litex_set_frequency()
61 struct spi_litex_data *dev_data = dev->data; in spi_config()
63 if (config->slave != 0) { in spi_config()
64 if (config->slave >= SPI_MAX_CS_SIZE) { in spi_config()
66 return -ENOTSUP; in spi_config()
70 if (config->operation & SPI_HALF_DUPLEX) { in spi_config()
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/Zephyr-latest/doc/develop/test/figures/
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/Zephyr-latest/doc/contribute/media/
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/Zephyr-latest/drivers/dai/nxp/esai/
Desai.h4 * SPDX-License-Identifier: Apache-2.0
13 #include <zephyr/dt-bindings/dai/esai.h>
32 /* used to fetch the depth of the FIFO. If the "fifo-depth" property is
40 /* used to fetch the TX FIFO watermark value. If the "tx-fifo-watermark"
46 /* used to fetch the RX FIFO watermark value. If the "rx-fifo-watermark"
61 /* used to fetch the word width. If the "word-width" property is not specified,
76 #define _ESAI_SLOT_WORD_WIDTH_IS_VALID(width) (!(((width) - 8) % 4)) argument
78 /* used to check if a slot/word width combination is valid */
84 /* used to convert slot/word width combination to a value that can be written
88 ((w) < 24 ? ((s) - (w) + (((w) - 8) / 4)) : ((s) < 32 ? 0x1e : 0x1f))
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/Zephyr-latest/dts/bindings/mtd/
Dnxp,imx-flexspi-device.yaml2 # SPDX-License-Identifier: Apache-2.0
6 include: [spi-device.yaml, "jedec,jesd216.yaml"]
9 cs-interval-unit:
13 - 1
14 - 256
20 cs-interval:
28 cs-setup-time:
36 cs-hold-time:
44 data-valid-time:
51 column-space:
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/Zephyr-latest/lib/libc/minimal/include/sys/
Dtypes.h5 * SPDX-License-Identifier: Apache-2.0
27 #define unsigned signed /* parasoft-suppress MISRAC2012-RULE_20_4-a MISRAC2012-RULE_20_4-b */
53 * The mem_word_t should match the optimal memory access word width
/Zephyr-latest/dts/bindings/qspi/
Dnxp,s32-qspi.yaml2 # SPDX-License-Identifier: Apache-2.0
10 compatible: "nxp,s32-qspi"
12 include: [base.yaml, pinctrl-device.yaml]
20 "#address-cells":
23 "#size-cells":
26 data-rate:
29 - SDR
30 - DDR
33 - Single Data Rate (SDR): sampling of incoming data occurs on single edges.
34 - Double Data Rate (DDR): sampling of incoming data occurs on both edges.
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/Zephyr-latest/doc/connectivity/bluetooth/api/mesh/images/
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/Zephyr-latest/doc/build/dts/
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20 width="11in"
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/Zephyr-latest/drivers/mipi_dbi/
Dmipi_dbi_nxp_lcdic.c4 * SPDX-License-Identifier: Apache-2.0
45 /* Max reset width (in terms of Timer0_Period, see RST_CTRL register) */
153 const struct mipi_dbi_lcdic_config *config = dev->config; in mipi_dbi_lcdic_reset_state()
154 LCDIC_Type *base = config->base; in mipi_dbi_lcdic_reset_state()
156 base->CTRL &= ~LCDIC_CTRL_LCDIC_EN_MASK; in mipi_dbi_lcdic_reset_state()
158 base->CTRL |= LCDIC_CTRL_LCDIC_EN_MASK; in mipi_dbi_lcdic_reset_state()
168 const struct mipi_dbi_lcdic_config *config = dev->config; in mipi_dbi_lcdic_start_dma()
169 struct mipi_dbi_lcdic_data *data = dev->data; in mipi_dbi_lcdic_start_dma()
170 struct stream *stream = &data->dma_stream; in mipi_dbi_lcdic_start_dma()
171 uint32_t aligned_len = data->cmd_bytes & (~0x3); in mipi_dbi_lcdic_start_dma()
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/Zephyr-latest/doc/build/cmake/
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/Zephyr-latest/drivers/ethernet/
Deth_xlnx_gem_priv.h7 * SPDX-License-Identifier: Apache-2.0
26 /* Receive Buffer Descriptor bits & masks: comp. Zynq-7000 TRM, Table 16-2. */
29 * Receive Buffer Descriptor address word:
30 * [31 .. 02] Mask for effective buffer address -> excludes [1..0]
39 * Receive Buffer Descriptor control word:
47 * [23 .. 22] These bits have different semantics depending on whether RX check-
54 * [15] End-of-frame bit
55 * [14] Start-of-frame bit
78 /* Transmit Buffer Descriptor bits & masks: comp. Zynq-7000 TRM, Table 16-3. */
81 * Transmit Buffer Descriptor control word:
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/Zephyr-latest/doc/_doxygen/
Ddoxygen-awesome.css4 https://github.com/jothepro/doxygen-awesome-css
8 Copyright (c) 2021 - 2023 jothepro
32 --primary-color: #1779c4;
33 --primary-dark-color: #335c80;
34 --primary-light-color: #70b1e9;
37 --page-background-color: #ffffff;
38 --page-foreground-color: #2f4153;
39 --page-secondary-foreground-color: #6f7e8e;
42 --separator-color: #dedede;
45 --border-radius-large: 8px;
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/Zephyr-latest/drivers/display/
Ddisplay_renesas_lcdc.c4 * SPDX-License-Identifier: Apache-2.0
104 if (atomic_test_and_set_bit(data->pm_policy_state_flag, 0) == 0) { in lcdc_smartbond_pm_policy_state_lock_get()
117 if (atomic_test_and_clear_bit(data->pm_policy_state_flag, 0) == 1) { in lcdc_smartbond_pm_policy_state_lock_put()
143 const struct display_smartbond_config *config = dev->config; in display_smartbond_configure()
144 struct display_smartbond_data *data = dev->data; in display_smartbond_configure()
154 return -EINVAL; in display_smartbond_configure()
157 da1469x_lcdc_parallel_interface_configure((lcdc_smartbond_mode_cfg *)&config->mode); in display_smartbond_configure()
158 da1469x_lcdc_bgcolor_configure((lcdc_smartbond_bgcolor_cfg *)&config->bgcolor_cfg); in display_smartbond_configure()
164 ret = da1469x_lcdc_timings_configure(config->x_res, config->y_res, in display_smartbond_configure()
165 (lcdc_smartbond_timing_cfg *)&config->timing_cfg); in display_smartbond_configure()
[all …]
/Zephyr-latest/drivers/dma/
Ddma_max32.c4 * SPDX-License-Identifier: Apache-2.0
36 /* mxc_dma_priority_t is limited to values 0-3 */ in max32_dma_ch_prio_valid()
38 LOG_ERR("Invalid DMA priority - must be type mxc_dma_priority_t (0-3)"); in max32_dma_ch_prio_valid()
44 static inline int max32_dma_width(uint32_t width) in max32_dma_width() argument
46 switch (width) { in max32_dma_width()
54 LOG_ERR("Invalid DMA width - must be byte (1), halfword (2) or word (4)"); in max32_dma_width()
55 return -EINVAL; in max32_dma_width()
67 LOG_ERR("Invalid DMA address adjust - must be NO_CHANGE (0) or INCREMENT (1)"); in max32_dma_addr_adj()
80 const struct max32_dma_config *cfg = dev->config; in max32_dma_config()
81 struct max32_dma_data *data = dev->data; in max32_dma_config()
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/Zephyr-latest/drivers/i2s/
Di2s_litex.c4 * SPDX-License-Identifier: Apache-2.0
22 val = (val == max - 1) ? 0 : val + 1; \
79 return -EINVAL; in i2s_get_foramt()
83 * @brief Get i2s sample width handled by device
87 * @return i2s sample width in bits
162 * @param sample_width width of single sample in bits
185 int max_off = chan_size - 1; in i2s_copy_from_fifo()
189 for (int off = max_off; off >= 0; off--) { in i2s_copy_from_fifo()
191 *(dst + i * chan_size + (max_off - off)) = in i2s_copy_from_fifo()
215 * @param sample_width width of single sample in bits
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/Zephyr-latest/drivers/ethernet/dwc_xgmac/
Deth_dwc_xgmac_priv.h7 * SPDX-License-Identifier: Apache-2.0
378 /* First word of descriptor */
380 /* Second word of descriptor */
382 /* Third word of descriptor */
384 /* Fourth word of descriptor */
393 /* First word of descriptor */
395 /* Second word of descriptor */
397 /* Third word of descriptor */
399 /* Fourth word of descriptor */
467 * the EDMA starts pre-fetching the TxDMA descriptors
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