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/Zephyr-latest/dts/arm/st/l4/
Dstm32l4r5Xi.dtsi5 * SPDX-License-Identifier: Apache-2.0
13 flash-controller@40022000 {
22 wkup-pin@1 {
23 wkup-gpios = <&gpioa 0 STM32_PWR_WKUP_PIN_SRC_0>;
26 wkup-pin@2 {
27 wkup-gpios = <&gpioc 13 STM32_PWR_WKUP_PIN_SRC_0>;
30 wkup-pin@3 {
31 wkup-gpios = <&gpioe 6 STM32_PWR_WKUP_PIN_SRC_0>;
34 wkup-pin@4 {
35 wkup-gpios = <&gpioa 2 STM32_PWR_WKUP_PIN_SRC_0>;
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Dstm32l4.dtsi6 * SPDX-License-Identifier: Apache-2.0
10 #include <arm/armv7-m.dtsi>
11 #include <zephyr/dt-bindings/clock/stm32l4_clock.h>
12 #include <zephyr/dt-bindings/i2c/i2c.h>
13 #include <zephyr/dt-bindings/gpio/gpio.h>
14 #include <zephyr/dt-bindings/pwm/pwm.h>
15 #include <zephyr/dt-bindings/adc/adc.h>
16 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
17 #include <zephyr/dt-bindings/dma/stm32_dma.h>
18 #include <zephyr/dt-bindings/adc/stm32l4_adc.h>
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/Zephyr-latest/dts/bindings/power/
Dst,stm32-pwr.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "st,stm32-pwr"
14 wkup-pins-nb:
17 Max nbr of system wake-up pins.
18 For example wkup-pins-nb = <8>; on the stm32u5
20 wkup-pin-srcs:
23 Number of wake-up GPIO sources to select from for each wake-up pin.
25 wake-up pin.
27 For example, each wake-up pin on STM32U5 is associated with
28 4 wake-up sources, 3 of them correspond to GPIOs.
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/Zephyr-latest/dts/arm/st/wb/
Dstm32wb55Xg.dtsi5 * SPDX-License-Identifier: Apache-2.0
16 flash-controller@58004000 {
25 wkup-pin@2 {
27 wkup-gpios = <&gpioc 13 STM32_PWR_WKUP_PIN_SRC_0>;
30 wkup-pin@3 {
32 wkup-gpios = <&gpioc 12 STM32_PWR_WKUP_PIN_SRC_0>;
35 wkup-pin@5 {
37 wkup-gpios = <&gpioc 5 STM32_PWR_WKUP_PIN_SRC_0>;
Dstm32wb.dtsi6 * SPDX-License-Identifier: Apache-2.0
9 #include <arm/armv7-m.dtsi>
10 #include <zephyr/dt-bindings/clock/stm32wb_clock.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/i2c/i2c.h>
13 #include <zephyr/dt-bindings/pwm/pwm.h>
14 #include <zephyr/dt-bindings/adc/adc.h>
15 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
16 #include <zephyr/dt-bindings/dma/stm32_dma.h>
17 #include <zephyr/dt-bindings/adc/stm32l4_adc.h>
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/Zephyr-latest/samples/boards/st/power_mgmt/wkup_pins/
DREADME.rst1 .. zephyr:code-sample:: stm32_pm_gpio_wkup_src
2 :name: GPIO as a wake-up pin source
3 :relevant-api: sys_poweroff gpio_interface
5 Use a GPIO as a wake-up pin source.
10 This sample is a minimum application to demonstrate using a wake-up pin with a GPIO as
14 Press the user button designated in boards's devicetree overlay as "wkup-src" to power it on again.
16 .. _gpio-as-a-wkup-pin-src-sample-requirements:
21 The SoC should support POWEROFF functionality & have a wake-up pin that corresponds
22 to the GPIO pin of a user button.
24 Make sure that wake-up pins are configured in SoC dtsi file.
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Dsample.yaml2 name: GPIO As A Wake-up Pin Source
6 filter: dt_enabled_alias_with_parent_compat("wkup-src",
7 "gpio-keys") and dt_compat_enabled("st,stm32-pwr")
9 - nucleo_l4r5zi
10 - nucleo_u575zi_q
11 - nucleo_u5a5zj_q
12 - nucleo_wl55jc
14 - nucleo_l4r5zi
/Zephyr-latest/include/zephyr/dt-bindings/gpio/
Dstm32-gpio.h4 * SPDX-License-Identifier: Apache-2.0
16 * - Bit 8: Configure a GPIO pin to power on the system after Poweroff.
23 * Configures a GPIO pin to power on the system after Poweroff.
24 * This flag is reserved to GPIO pins that are associated with wake-up pins
25 * in STM32 PWR devicetree node, through the property "wkup-gpios".
/Zephyr-latest/dts/arm/st/u5/
Dstm32u5.dtsi7 * SPDX-License-Identifier: Apache-2.0
11 #include <arm/armv8-m.dtsi>
12 #include <zephyr/dt-bindings/adc/adc.h>
13 #include <zephyr/dt-bindings/pwm/pwm.h>
14 #include <zephyr/dt-bindings/clock/stm32u5_clock.h>
15 #include <zephyr/dt-bindings/gpio/gpio.h>
16 #include <zephyr/dt-bindings/i2c/i2c.h>
17 #include <zephyr/dt-bindings/flash_controller/ospi.h>
18 #include <zephyr/dt-bindings/reset/stm32u5_reset.h>
19 #include <zephyr/dt-bindings/dma/stm32_dma.h>
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/Zephyr-latest/dts/arm/st/wl/
Dstm32wl.dtsi2 * Copyright (c) 2020-2024 STMicroelectronics
4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv7-m.dtsi>
8 #include <zephyr/dt-bindings/clock/stm32wl_clock.h>
9 #include <zephyr/dt-bindings/gpio/gpio.h>
10 #include <zephyr/dt-bindings/i2c/i2c.h>
11 #include <zephyr/dt-bindings/lora/sx126x.h>
12 #include <zephyr/dt-bindings/pwm/pwm.h>
13 #include <zephyr/dt-bindings/adc/adc.h>
14 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
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/Zephyr-latest/soc/st/stm32/common/
Dstm32_wkup_pins.c4 * SPDX-License-Identifier: Apache-2.0
19 #include <zephyr/dt-bindings/power/stm32_pwr.h>
42 * @brief flags for wake-up pin polarity configuration
46 /* detection of wake-up event on the high level : rising edge */
48 /* detection of wake-up event on the low level : falling edge */
54 * @brief flags for configuration of pull-ups & pull-downs of GPIO ports
55 * that are associated with wake-up pins
66 * @brief Structure for storing the devicetree configuration of a wake-up pin.
71 /* GPIO pin(s) associated with wake-up pin */
79 static const struct gpio_dt_spec empty_gpio = {.port = NULL, .pin = 0, .dt_flags = 0};
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/Zephyr-latest/drivers/gpio/
Dgpio_smartbond.c4 * SPDX-License-Identifier: Apache-2.0
25 /* GPIO P0 and P1 share single GPIO and WKUP peripheral instance with separate
27 * data access, bit access, mode, latch and wake-up controller are defined in
67 * GPIOx_NGPIOS words for each pin mode
95 WAKEUP->WKUP_CTRL_REG = 0; in gpio_smartbond_wkup_init()
96 WAKEUP->WKUP_CLEAR_P0_REG = 0xffffffff; in gpio_smartbond_wkup_init()
97 WAKEUP->WKUP_CLEAR_P1_REG = 0xffffffff; in gpio_smartbond_wkup_init()
98 WAKEUP->WKUP_SELECT_P0_REG = 0; in gpio_smartbond_wkup_init()
99 WAKEUP->WKUP_SELECT_P1_REG = 0; in gpio_smartbond_wkup_init()
100 WAKEUP->WKUP_SEL_GPIO_P0_REG = 0; in gpio_smartbond_wkup_init()
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/Zephyr-latest/dts/arm/renesas/smartbond/
Dda1469x.dtsi3 * SPDX-License-Identifier: Apache-2.0
6 #include <arm/armv8-m.dtsi>
9 #include <zephyr/dt-bindings/gpio/gpio.h>
10 #include <zephyr/dt-bindings/adc/smartbond-adc.h>
11 #include <zephyr/dt-bindings/pinctrl/smartbond-pinctrl.h>
12 #include <zephyr/dt-bindings/dma/dma_smartbond.h>
17 zephyr,flash-controller = &flash_controller;
21 compatible = "zephyr,lvgl-pointer-input";
25 #address-cells = <1>;
26 #size-cells = <0>;
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/Zephyr-latest/dts/arm/gd/gd32e50x/
Dgd32e50x.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv8-m.dtsi>
9 #include <zephyr/dt-bindings/gpio/gpio.h>
10 #include <zephyr/dt-bindings/i2c/i2c.h>
11 #include <zephyr/dt-bindings/pwm/pwm.h>
12 #include <zephyr/dt-bindings/clock/gd32e50x-clocks.h>
13 #include <zephyr/dt-bindings/reset/gd32e50x.h>
17 #address-cells = <1>;
18 #size-cells = <0>;
21 compatible = "arm,cortex-m33";
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/Zephyr-latest/boards/olimex/olimexino_stm32/doc/
Dindex.rst6 The OLIMEXINO-STM32 board is based on the STMicroelectronics STM32F103RB ARM
7 Cortex-M3 CPU.
10 `OLIMEXINO-STM32 website`_ and `OLIMEXINO-STM32 user manual`_.
20 +-----------+------------+-------------------------+
23 | NVIC | on-chip | nested vectored |
25 +-----------+------------+-------------------------+
26 | SYSTICK | on-chip | system clock |
27 +-----------+------------+-------------------------+
28 | UART | on-chip | serial port |
29 +-----------+------------+-------------------------+
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