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/Zephyr-latest/dts/bindings/clock/
Dst,stm32f1-clock-mco.yaml15 output a slowed down variation of certain clocks.
Dmicrochip,xec-pcr.yaml55 Maximum duty cycle variation. Difference in units of 48HMz between
/Zephyr-latest/samples/bluetooth/hci_pwr_ctrl/
DREADME.rst14 the TX power variation of the advertiser is a repeatedly descending staircase
/Zephyr-latest/boards/shields/esp_8266/doc/
Dindex.rst16 configuration that allows any ESP-8266 module variation including ESP-12E/F.
92 The below table suggests shield variation accordingly with end user
100 | Connector Standard | Shield Designation | Variation |
/Zephyr-latest/dts/bindings/serial/
Dst,stm32-uart-base.yaml90 allows more reliable communication with UART devices sensitive to variation of inter-frames
/Zephyr-latest/soc/nxp/imxrt/imxrt5xx/cm33/
Dsoc.h75 /* Workaround to handle macro variation in the SDK */
/Zephyr-latest/soc/nxp/imxrt/imxrt6xx/cm33/
Dsoc.h78 /* Workaround to handle macro variation in the SDK */
/Zephyr-latest/samples/drivers/clock_control_xec/src/
Dmain.c141 LOG_INF("PCR 32KHz Clock Monitor Duty Cycle Variation register = 0x%x", r); in pcr_clock_regs()
144 LOG_INF("PCR 32KHz Clock Monitor Duty Cycle Variation Max register = 0x%x", r); in pcr_clock_regs()
/Zephyr-latest/boards/shields/inventek_eswifi/doc/
Dindex.rst91 The below table suggests shield variation accordingly with end user
98 | Connector Standard | Shield Designation | Variation |
125 | Board | Disabled Interface | Variation |
/Zephyr-latest/tests/subsys/fs/common/
Dtest_fs_basic.c64 /* VARIATION POINT: littlefs does not update the file size of in create_write_hello()
229 /* VARIATION POINT: littlefs does not update the file size of in truncate_hello()
/Zephyr-latest/include/zephyr/drivers/sensor/
Dccs811.h114 * based on individual device configuration and variation over time.
/Zephyr-latest/soc/microchip/mec/mec172x/reg/
Dmec172x_pcr.h288 * Clock monitor 32KHz Duty Cycle variation counter (Offset +D0h, RO)
289 * Clock monitor 32KHz Duty Cycle variation counter maximum (Offset +D4h, RW)
/Zephyr-latest/drivers/watchdog/
Dwdt_iwdg_stm32.c49 * With highest prescaler and considering clock variation, we will wait
/Zephyr-latest/scripts/west_commands/tests/
Dtest_bossac.py394 Test SAM-BA extended protocol with Arduino variation
428 Test SAM-BA extended protocol with Adafruit UF2 variation
/Zephyr-latest/boards/renesas/ek_ra4w1/doc/
Dindex.rst37 - Output variation: +2 dB
/Zephyr-latest/boards/ezurio/bl654_usb/doc/
Dbl654_usb.rst106 The board is factory-programmed with a Ezurio variation of Nordic's
/Zephyr-latest/drivers/lora/
Dsx12xx_common.c227 * a failed transmission, and not some minor timing variation between in sx12xx_lora_send()
/Zephyr-latest/boards/shields/atmel_rf2xx/doc/
Dindex.rst227 The below table suggests shield variation accordingly with end user
236 | Connector Standard | Shield Designation | Variation |
269 | Board | Disabled Interface | Variation |
/Zephyr-latest/tests/net/bridge/src/
Dmain.c251 * incoming interface is mixed in as well to create some variation, in _recv_data()
/Zephyr-latest/boards/atmel/sam/sam_e70_xplained/doc/
Dindex.rst147 #. To use the SoC variation B IC, you need type "sam_e70_xplained/same70q21b".
/Zephyr-latest/boards/atmel/sam/sam_v71_xult/doc/
Dindex.rst150 #. To use the SoC variation B IC, you need type "sam_v71_xult/samv71q21b".
/Zephyr-latest/drivers/clock_control/
Dclock_control_mchp_xec.c32 * 32KHz duty cycle variation max for pass/fail: 16-bit
194 uint8_t max_dc_va; /* 32KHz monitor maximum duty cycle variation */
Dclock_stm32_ll_wb0.c422 * STM32WB0 because the prescaler configuration is not affected by input clock variation: in stm32_clock_control_get_subsys_rate()
/Zephyr-latest/samples/subsys/mgmt/updatehub/
DREADME.rst280 .. note:: Command variation to flash a ``hex`` file:
/Zephyr-latest/doc/_extensions/zephyr/doxytooltip/static/tippy/
Dpopper.min.js7variation,f=e.offsets,c=e.position,p=e.gpuAcceleration,u=e.adaptive,l=e.roundOffsets,h=e.isFixed,v… property in AnonymousFunction7648dcfe2300.c

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