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/cmsis_6-latest/CMSIS/CoreValidation/Project/
DValidation.csolution.yml28 - type: CM0
32 - type: CM0plus
36 - type: CM3
40 - type: CM4
44 - type: CM7
48 - type: CM23
52 - type: CM23S
56 - type: CM23NS
60 - type: CM33
64 - type: CM33S
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/cmsis_6-latest/CMSIS/Documentation/Doxygen/style_template/
Dlayout_core.xml5 <tab type="mainpage" visible="yes" title=""/>
6 <tab type="pages" visible="yes" title="Usage and Description" intro=""/>
7 <tab type="modules" visible="yes" title="API Reference" intro=""/>
8 <tab type="namespaces" visible="no" title="Namespaces">
9 <tab type="namespacelist" visible="no" title="Namespace list" intro=""/>
10 <tab type="namespacemembers" visible="no" title="Namespace members" intro=""/>
12 <tab type="concepts" visible="yes" title="">
14 <tab type="interfaces" visible="no" title="">
15 <tab type="interfacelist" visible="no" title="" intro=""/>
16 <tab type="interfaceindex" visible="no" title=""/>
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Dlayout.xml5 <tab type="mainpage" visible="yes" title=""/>
6 <tab type="pages" visible="yes" title="Usage and Description" intro=""/>
7 <tab type="modules" visible="yes" title="API Reference" intro=""/>
8 <tab type="namespaces" visible="no" title="Namespaces">
9 <tab type="namespacelist" visible="no" title="Namespace list" intro=""/>
10 <tab type="namespacemembers" visible="no" title="Namespace members" intro=""/>
12 <tab type="concepts" visible="yes" title="">
14 <tab type="interfaces" visible="no" title="">
15 <tab type="interfacelist" visible="no" title="" intro=""/>
16 <tab type="interfaceindex" visible="no" title=""/>
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Dheader.html5 <meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
12 <script type="text/javascript">var page_layout=1;</script>
15 <link href="$relpath^doxygen.css" rel="stylesheet" type="text/css" />
16 <script type="text/javascript" src="$relpath^jquery.js"></script>
17 <script type="text/javascript" src="$relpath^dynsections.js"></script>
18 <script type="text/javascript" src="$relpath^tabs.js"></script>
19 <script type="text/javascript" src="$relpath^footer.js"></script>
20 <script type="text/javascript" src="$relpath^navtree.js"></script>
26 <script type="text/javascript" src="../../version.js"></script>
47 <!--BEGIN PROJECT_NUMBER-->&#160;<span id="projectnumber"><script type="text/javascript">
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/cmsis_6-latest/CMSIS/Documentation/Doxygen/Core/src/
Dref_data_structs.txt3 \brief Union type to access the Application Program Status Register (APSR).
22 uint32_t w; ///< Type used for word access
28 \brief Union type to access the Interrupt Program Status Register (IPSR).
37 uint32_t w; ///< Type used for word access
43 \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
65 uint32_t w; ///< Type used for word access
71 \brief Union type to access the Control Registers (CONTROL).
82 uint32_t w; ///< Type used for word access
88 \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC).
110 \brief Structure type to access the System Control Block (SCB).
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Dref_peripheral.txt16 Each peripheral provides a data type definition with a name that is composed of:
19 - postfix \b _Type or \b _TypeDef to identify a type definition.
25 The data type definition uses standard C data types defined by the ANSI C header file <stdint.h>.
27 - IO Type Qualifiers are used to specify the access to peripheral variables.
28 IO Type Qualifier | Type | Description
197 …am value value for the bit field. This parameter is interpreted as an uint32_t type.
215 …aram value value of the register. This parameter is interpreted as an uint32_t type.
/cmsis_6-latest/CMSIS/Core/Include/
Dcore_sc000.h47 \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
166 <strong>IO Type Qualifiers</strong> are used
197 \defgroup CMSIS_core_register Defines and Type Definitions
198 \brief Type definitions and defines for Cortex-M processor based devices.
204 \brief Core Register type definitions.
209 \brief Union type to access the Application Program Status Register (APSR).
221 uint32_t w; /*!< Type used for word access */
239 \brief Union type to access the Interrupt Program Status Register (IPSR).
248 uint32_t w; /*!< Type used for word access */
257 \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
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Dcore_cm0plus.h47 \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
166 <strong>IO Type Qualifiers</strong> are used
197 \defgroup CMSIS_core_register Defines and Type Definitions
198 \brief Type definitions and defines for Cortex-M processor based devices.
204 \brief Core Register type definitions.
209 \brief Union type to access the Application Program Status Register (APSR).
221 uint32_t w; /*!< Type used for word access */
239 \brief Union type to access the Interrupt Program Status Register (IPSR).
248 uint32_t w; /*!< Type used for word access */
257 \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
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Dcmsis_armclang.h339 \return value of type uint8_t at (*ptr)
361 \return value of type uint16_t at (*ptr)
383 \return value of type uint32_t at (*ptr)
421 \return value of type uint8_t at (*ptr)
428 return ((uint8_t)result); /* Add explicit type cast here */ in __LDRBT()
436 \return value of type uint16_t at (*ptr)
443 return ((uint16_t)result); /* Add explicit type cast here */ in __LDRHT()
451 \return value of type uint32_t at (*ptr)
468 \return value of type uint8_t at (*ptr)
475 return ((uint8_t)result); /* Add explicit type cast here */ in __LDAB()
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Dcmsis_clang.h344 \return value of type uint8_t at (*ptr)
366 \return value of type uint16_t at (*ptr)
388 \return value of type uint32_t at (*ptr)
426 \return value of type uint8_t at (*ptr)
433 return ((uint8_t)result); /* Add explicit type cast here */ in __LDRBT()
441 \return value of type uint16_t at (*ptr)
448 return ((uint16_t)result); /* Add explicit type cast here */ in __LDRHT()
456 \return value of type uint32_t at (*ptr)
473 \return value of type uint8_t at (*ptr)
480 return ((uint8_t)result); /* Add explicit type cast here */ in __LDAB()
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Dcore_cm1.h47 \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
156 <strong>IO Type Qualifiers</strong> are used
186 \defgroup CMSIS_core_register Defines and Type Definitions
187 \brief Type definitions and defines for Cortex-M processor based devices.
193 \brief Core Register type definitions.
198 \brief Union type to access the Application Program Status Register (APSR).
210 uint32_t w; /*!< Type used for word access */
228 \brief Union type to access the Interrupt Program Status Register (IPSR).
237 uint32_t w; /*!< Type used for word access */
246 \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
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Dcore_cm0.h47 \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
156 <strong>IO Type Qualifiers</strong> are used
186 \defgroup CMSIS_core_register Defines and Type Definitions
187 \brief Type definitions and defines for Cortex-M processor based devices.
193 \brief Core Register type definitions.
198 \brief Union type to access the Application Program Status Register (APSR).
210 uint32_t w; /*!< Type used for word access */
228 \brief Union type to access the Interrupt Program Status Register (IPSR).
237 uint32_t w; /*!< Type used for word access */
246 \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
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Dcmsis_gcc.h409 \return value of type uint8_t at (*ptr)
416 return ((uint8_t) result); /* Add explicit type cast here */ in __LDREXB()
443 \return value of type uint16_t at (*ptr)
450 return ((uint16_t)result); /* Add explicit type cast here */ in __LDREXH()
477 \return value of type uint32_t at (*ptr)
527 \return value of type uint8_t at (*ptr)
534 return ((uint8_t)result); /* Add explicit type cast here */ in __LDRBT()
542 \return value of type uint16_t at (*ptr)
549 return ((uint16_t)result); /* Add explicit type cast here */ in __LDRHT()
557 \return value of type uint32_t at (*ptr)
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Dcore_cm23.h47 \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
187 <strong>IO Type Qualifiers</strong> are used
220 \defgroup CMSIS_core_register Defines and Type Definitions
221 \brief Type definitions and defines for Cortex-M processor based devices.
227 \brief Core Register type definitions.
232 \brief Union type to access the Application Program Status Register (APSR).
244 uint32_t w; /*!< Type used for word access */
262 \brief Union type to access the Interrupt Program Status Register (IPSR).
271 uint32_t w; /*!< Type used for word access */
280 \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
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Dcore_cm3.h47 \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
166 <strong>IO Type Qualifiers</strong> are used
198 \defgroup CMSIS_core_register Defines and Type Definitions
199 \brief Type definitions and defines for Cortex-M processor based devices.
205 \brief Core Register type definitions.
210 \brief Union type to access the Application Program Status Register (APSR).
223 uint32_t w; /*!< Type used for word access */
244 \brief Union type to access the Interrupt Program Status Register (IPSR).
253 uint32_t w; /*!< Type used for word access */
262 \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
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Dcore_sc300.h47 \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
166 <strong>IO Type Qualifiers</strong> are used
198 \defgroup CMSIS_core_register Defines and Type Definitions
199 \brief Type definitions and defines for Cortex-M processor based devices.
205 \brief Core Register type definitions.
210 \brief Union type to access the Application Program Status Register (APSR).
223 uint32_t w; /*!< Type used for word access */
244 \brief Union type to access the Interrupt Program Status Register (IPSR).
253 uint32_t w; /*!< Type used for word access */
262 \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
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Dcore_cm4.h47 \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
225 <strong>IO Type Qualifiers</strong> are used
258 \defgroup CMSIS_core_register Defines and Type Definitions
259 \brief Type definitions and defines for Cortex-M processor based devices.
265 \brief Core Register type definitions.
270 \brief Union type to access the Application Program Status Register (APSR).
285 uint32_t w; /*!< Type used for word access */
309 \brief Union type to access the Interrupt Program Status Register (IPSR).
318 uint32_t w; /*!< Type used for word access */
327 \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
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Dcore_cm33.h47 \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
290 <strong>IO Type Qualifiers</strong> are used
324 \defgroup CMSIS_core_register Defines and Type Definitions
325 \brief Type definitions and defines for Cortex-M processor based devices.
331 \brief Core Register type definitions.
336 \brief Union type to access the Application Program Status Register (APSR).
351 uint32_t w; /*!< Type used for word access */
375 \brief Union type to access the Interrupt Program Status Register (IPSR).
384 uint32_t w; /*!< Type used for word access */
393 \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
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Dcore_cm35p.h47 \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
290 <strong>IO Type Qualifiers</strong> are used
324 \defgroup CMSIS_core_register Defines and Type Definitions
325 \brief Type definitions and defines for Cortex-M processor based devices.
331 \brief Core Register type definitions.
336 \brief Union type to access the Application Program Status Register (APSR).
351 uint32_t w; /*!< Type used for word access */
375 \brief Union type to access the Interrupt Program Status Register (IPSR).
384 uint32_t w; /*!< Type used for word access */
393 \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
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Dcore_cm52.h47 \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
302 <strong>IO Type Qualifiers</strong> are used
339 \defgroup CMSIS_core_register Defines and Type Definitions
340 \brief Type definitions and defines for Cortex-M processor based devices.
346 \brief Core Register type definitions.
351 \brief Union type to access the Application Program Status Register (APSR).
366 uint32_t w; /*!< Type used for word access */
390 \brief Union type to access the Interrupt Program Status Register (IPSR).
399 uint32_t w; /*!< Type used for word access */
408 \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
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Dcore_cm55.h47 \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
297 <strong>IO Type Qualifiers</strong> are used
334 \defgroup CMSIS_core_register Defines and Type Definitions
335 \brief Type definitions and defines for Cortex-M processor based devices.
341 \brief Core Register type definitions.
346 \brief Union type to access the Application Program Status Register (APSR).
361 uint32_t w; /*!< Type used for word access */
385 \brief Union type to access the Interrupt Program Status Register (IPSR).
394 uint32_t w; /*!< Type used for word access */
403 \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
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/cmsis_6-latest/CMSIS/Documentation/Doxygen/Stream/src/
Dmainpage.md29 - A source generating 5 values in with data type `q15` each time it is run.
30 …- A processing node (Filter) consuming and producing 7 values with data type `q15` each time it is…
31 …essing node (Detector) consuming 5 values with data type `q15` and producing 2 values with data ty…
32 - A sink consuming 10 values with data type `f32` each time it is run.
/cmsis_6-latest/.devcontainer/ubuntu-22.04/
Ddevcontainer.json10 "source=${devcontainerId}-home,target=/home/${localEnv:USER},type=volume",
11 …"source=${localEnv:HOME}${localEnv:USERPROFILE}/.ssh,target=/home/${localEnv:USER}/.ssh,type=bind,…
12 …:HOME}${localEnv:USERPROFILE}/.armlm,target=/home/${localEnv:USER}/.armlm,type=bind,consistency=ca…
13 …:HOME}${localEnv:USERPROFILE}/.iarlm,target=/home/${localEnv:USER}/.iarlm,type=bind,consistency=ca…
/cmsis_6-latest/CMSIS/Driver/VIO/
Dcmsis_vio.scvd7 <var name="i" type="int32_t" value="0"/>
9 <read name="SignalIn" type="uint32_t" symbol="vioSignalIn"/>
10 <read name="SignalOut" type="uint32_t" symbol="vioSignalOut"/>
11 … <read name="Value" type="int32_t" symbol="vioValue" size="__size_of(&quot;vioValue&quot;)"/>
/cmsis_6-latest/CMSIS/Documentation/Doxygen/Driver/src/
DDriver_WiFi.c410 \defgroup wifi_sec_type WiFi Security Type
412 \brief Specifies WiFi security type for \ref ARM_WIFI_Activate.
414 The WiFi security type defines the standard used to protect the wireless network from unauthorized …
522 and must be aligned to the data type of the corresponding option.
527 … | Description | Data | Type/Length
580 the \em option and must be aligned to the data type of the corresponding option.
655 \em security specifies the security type which will be used for the connection.
679 It enables to connect without specifying SSID, Password, Security Type or WiFi Channel.
958 \defgroup wifi_socket_type WiFi Socket Type definitions
960 \brief WiFi Socket Type definitions.
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