| /Zephyr-latest/boards/renesas/da1469x_dk_pro/dts/ |
| D | da1469x_dk_pro_psram.overlay | 4 * SPDX-License-Identifier: Apache-2.0
9 sram-ext = &memc;
17 /* QSPIC settings for the APS6404L-3SQR QSPI PSRAM memory in QPI mode. */
20 is-ram;
21 dev-size = <DT_SIZE_M(64)>;
22 dev-type = <0x5D>;
23 dev-id = <0x0D>;
24 dev-density = <0xE040>;
25 reset-delay-us = <50>;
26 read-cs-idle-min-ns = <18>;
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| /Zephyr-latest/drivers/ethernet/ |
| D | Kconfig.nxp_s32_gmac | 1 # Copyright 2022-2023 NXP
2 # SPDX-License-Identifier: Apache-2.0
17 int "TX ring length"
21 Length of the TX ring. ETH_NXP_S32_TX_RING_BUF_SIZE * ETH_NXP_S32_TX_RING_LEN
22 must be a multiple of TX FIFO block size.
25 int "TX ring data buffer size"
29 Size, in bytes, of the TX data buffer. The size must be big enough to
30 store one complete Ethernet frame, and be a multiple of the data bus
42 int "RX ring data buffer size"
46 Size, in bytes, of the RX data buffer. The size must be big enough to
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| /Zephyr-latest/drivers/spi/ |
| D | spi_smartbond.c | 4 * SPDX-License-Identifier: Apache-2.0
47 /* Bi-directional mode */
49 /* TX FIFO single depth, no flow control */
106 cfg->regs->SPI_CTRL_REG |= SPI_SPI_CTRL_REG_SPI_ON_Msk; in spi_smartbond_enable()
107 cfg->regs->SPI_CTRL_REG &= ~SPI_SPI_CTRL_REG_SPI_RST_Msk; in spi_smartbond_enable()
109 cfg->regs->SPI_CTRL_REG &= ~SPI_SPI_CTRL_REG_SPI_ON_Msk; in spi_smartbond_enable()
110 cfg->regs->SPI_CTRL_REG |= SPI_SPI_CTRL_REG_SPI_RST_Msk; in spi_smartbond_enable()
116 return (!!(cfg->regs->SPI_CTRL_REG & SPI_SPI_CTRL_REG_SPI_ON_Msk)) && in spi_smartbond_isenabled()
117 (!(cfg->regs->SPI_CTRL_REG & SPI_SPI_CTRL_REG_SPI_RST_Msk)); in spi_smartbond_isenabled()
122 const struct spi_smartbond_cfg *cfg = dev->config; in spi_smartbond_write_word()
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| D | spi_xec_qmspi_ldma.c | 4 * SPDX-License-Identifier: Apache-2.0
20 #include <zephyr/dt-bindings/clock/mchp_xec_pcr.h>
21 #include <zephyr/dt-bindings/interrupt-controller/mchp-xec-ecia.h>
33 /* MEC172x QMSPI controller SPI Mode 3 signalling has an anomaly where
34 * received data is shifted off the input line(s) improperly. Received
35 * data bytes will be left shifted by 1. Work-around for SPI Mode 3 is
36 * to sample input line(s) on same edge as output data is ready.
55 * Overflow TX FIFO
94 /* Device run time data */
100 uint8_t np; /* number of data pins: 1, 2, or 4 */
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| D | spi_numaker.c | 2 * SPDX-License-Identifier: Apache-2.0
42 * CPOL/CPHA = 0/0 --> SPI_MODE_0
43 * CPOL/CPHA = 0/1 --> SPI_MODE_1
44 * CPOL/CPHA = 1/0 --> SPI_MODE_2
45 * CPOL/CPHA = 1/1 --> SPI_MODE_3
57 int mode; in spi_numaker_configure() local
58 struct spi_numaker_data *data = dev->data; in spi_numaker_configure() local
59 const struct spi_numaker_config *dev_cfg = dev->config; in spi_numaker_configure()
62 if (spi_context_configured(&data->ctx, config)) { in spi_numaker_configure()
66 if (SPI_MODE_GET(config->operation) & SPI_MODE_LOOP) { in spi_numaker_configure()
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| D | spi_sam.c | 6 * SPDX-License-Identifier: Apache-2.0
50 /* Device run time data */
66 struct spi_sam_data *data = dev->data; in spi_spin_lock() local
68 return k_spin_lock(&data->lock); in spi_spin_lock()
73 struct spi_sam_data *data = dev->data; in spi_spin_unlock() local
75 k_spin_unlock(&data->lock, key); in spi_spin_unlock()
82 /* SPI worked in fixed peripheral mode(SPI_MR.PS = 0) and disabled chip in spi_slave_to_mr_pcs()
83 * select decode(SPI_MR.PCSDEC = 0), based on Atmel | SMART ARM-based in spi_slave_to_mr_pcs()
84 * Flash MCU DATASHEET 40.8.2 SPI Mode Register: in spi_slave_to_mr_pcs()
97 const struct spi_sam_config *cfg = dev->config; in spi_sam_configure()
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| /Zephyr-latest/dts/bindings/ethernet/ |
| D | xlnx,gem.yaml | 3 # SPDX-License-Identifier: Apache-2.0
10 include: ethernet-controller.yaml
19 clock-frequency:
23 Specifies the base clock frequency from which the GEM's TX clock
25 clock control register in the CRL_APB. The GEM's TX clock frequency
27 which it will be adjusted at run-time. Therefore, the value of this
29 respective GEM's TX clock - by default, this is the IO PLL.
31 mdc-divider:
42 init-mdio-phy:
45 Activates the management of a PHY associated with the controller in-
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| /Zephyr-latest/dts/bindings/spi/ |
| D | nxp,dspi.yaml | 2 # SPDX-License-Identifier: Apache-2.0
8 include: ["spi-controller.yaml", "pinctrl-device.yaml"]
20 pcs-sck-delay:
26 sck-pcs-delay:
32 transfer-delay:
38 pinctrl-0:
41 nxp,rx-tx-chn-share:
43 description: If the edma channel shared with tx and rx
48 ctar register selection range form 0-1 for master mode, 0 for slave mode
50 sample-point:
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| /Zephyr-latest/dts/bindings/dai/ |
| D | nxp,dai-sai.yaml | 2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "nxp,dai-sai"
8 include: [base.yaml, pinctrl-device.yaml]
13 mclk-is-output:
21 rx-fifo-watermark:
24 Use this property to specify the watermark value for the TX
28 tx-fifo-watermark:
37 fifo-depth:
49 for tx/rx-fifo-watermark uses DEFAULT_FIFO_DEPTH instead of this
53 dai-index:
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| /Zephyr-latest/drivers/wifi/esp32/ |
| D | Kconfig.esp32 | 18 core mode because the network stack is not aware of SMP
27 Make sure there is a minimal heap available for Wi-Fi driver.
46 bool "Activates the Station/AP co-existence mode."
49 The Station/AP coexistence mode allows the ESP32 to operate as both a station and
50 an access point simultaneously. This mode is not enabled by default.
90 RX buffer depends on the size of the received data frame.
92 For each received data frame, the WiFi driver makes a copy to an RX buffer
94 is freed after the higher layer has successfully received the data frame.
96 For some applications, WiFi data frames may be received faster than the
102 prompt "Type of WiFi TX buffers"
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| /Zephyr-latest/drivers/ethernet/phy/ |
| D | phy_dm8806_priv.h | 4 * SPDX-License-Identifier: Apache-2.0
17 /* Duplex mode ability offset. */
19 /* Power down mode offset. */
21 /* Auto negotiation mode offset. */
26 /* Port 0~4 Status Data Register. */
36 /* Speed and duplex mode status offset. */
38 /* Speed and duplex mode staus mask. */
74 /* Address Table Data 0 PHY Address */
76 /* Address Table Data 0 Register Address */
81 /* Address Table Data 1 PHY Address */
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| /Zephyr-latest/drivers/serial/ |
| D | uart_xlnx_ps.c | 1 /* uart_xlnx_ps.c - Xilinx Zynq family serial driver */
6 * SPDX-License-Identifier: Apache-2.0
19 * - the following macro for the number of bytes between register addresses:
42 * Comp. Xilinx Zynq-7000 Technical Reference Manual (ug585), chap. B.33
47 #define XUARTPS_MR_OFFSET 0x0004U /**< Mode Register [9:0] */
61 #define XUARTPS_TXWM_OFFSET 0x0044U /**< TX FIFO Trigger Level [5:0] */
68 #define XUARTPS_CR_TX_DIS 0x00000020U /**< TX disabled. */
69 #define XUARTPS_CR_TX_EN 0x00000010U /**< TX enabled */
73 #define XUARTPS_CR_TXRST 0x00000002U /**< TX logic reset */
76 /* Mode Register Bits Definition */
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| /Zephyr-latest/drivers/can/ |
| D | can_mcan.c | 2 * Copyright (c) 2022-2023 Vestas Wind Systems A/S
5 * SPDX-License-Identifier: Apache-2.0
22 const struct can_mcan_config *config = dev->config; in can_mcan_read_reg()
25 err = config->ops->read_reg(dev, reg, val); in can_mcan_read_reg()
35 const struct can_mcan_config *config = dev->config; in can_mcan_write_reg()
38 err = config->ops->write_reg(dev, reg, val); in can_mcan_write_reg()
48 struct can_mcan_data *data = dev->data; in can_mcan_exit_sleep_mode() local
53 k_mutex_lock(&data->lock, K_FOREVER); in can_mcan_exit_sleep_mode()
75 if (k_cycle_get_32() - start_time > k_ms_to_cyc_ceil32(CAN_INIT_TIMEOUT_MS)) { in can_mcan_exit_sleep_mode()
82 err = -EAGAIN; in can_mcan_exit_sleep_mode()
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| D | can_rcar.c | 4 * SPDX-License-Identifier: Apache-2.0
24 #define RCAR_CAN_CTLR_BOM (3 << 11) /* Bus-Off Recovery Mode Bits */
25 #define RCAR_CAN_CTLR_BOM_ENT BIT(11) /* Automatic halt mode entry at bus-off entry */
30 #define RCAR_CAN_CTLR_MLM BIT(3) /* Message Lost Mode Select */
31 #define RCAR_CAN_CTLR_IDFM (3 << 1) /* ID Format Mode Select Bits */
32 #define RCAR_CAN_CTLR_IDFM_MIXED BIT(2) /* Mixed ID mode */
33 #define RCAR_CAN_CTLR_MBM BIT(0) /* Mailbox Mode select */
65 #define RCAR_CAN_MIER1_TXFIE BIT(24) /* Tx FIFO Interrupt Enable */
89 #define RCAR_CAN_IER_TXFIE BIT(3) /* Tx FIFO Interrupt Enable Bit */
109 #define RCAR_CAN_TFCR_TFUST_SHIFT 1 /* Offset of Tx FIFO Unsent */
[all …]
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| /Zephyr-latest/dts/bindings/mspi/ |
| D | mspi-device.yaml | 2 # SPDX-License-Identifier: Apache-2.0
8 on-bus: mspi
14 mspi-max-frequency:
22 mspi-io-mode:
25 - "MSPI_IO_MODE_SINGLE"
26 - "MSPI_IO_MODE_DUAL"
27 - "MSPI_IO_MODE_DUAL_1_1_2"
28 - "MSPI_IO_MODE_DUAL_1_2_2"
29 - "MSPI_IO_MODE_QUAD"
30 - "MSPI_IO_MODE_QUAD_1_1_4"
[all …]
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| /Zephyr-latest/drivers/lora/ |
| D | sx12xx_common.c | 5 * SPDX-License-Identifier: Apache-2.0
14 /* LoRaMac-node specific includes */
47 if (!device_is_ready(gpio->port)) { in __sx12xx_configure_pin()
48 LOG_ERR("GPIO device not ready %s", gpio->port->name); in __sx12xx_configure_pin()
49 return -ENODEV; in __sx12xx_configure_pin()
54 LOG_ERR("Cannot configure gpio %s %d: %d", gpio->port->name, in __sx12xx_configure_pin()
55 gpio->pin, err); in __sx12xx_configure_pin()
65 * @param data common sx12xx data struct
70 static inline bool modem_acquire(struct sx12xx_data *data) in modem_acquire() argument
72 return atomic_cas(&data->modem_usage, STATE_FREE, STATE_BUSY); in modem_acquire()
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| D | sx126x.c | 5 * SPDX-License-Identifier: Apache-2.0
59 #define MODE(m) [MODE_##m] = #m macro
61 MODE(SLEEP),
62 MODE(STDBY_RC),
63 MODE(STDBY_XOSC),
64 MODE(FS),
65 MODE(TX),
66 MODE(RX),
67 MODE(RX_DC),
68 MODE(CAD),
[all …]
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| /Zephyr-latest/drivers/wifi/nrf_wifi/ |
| D | Kconfig.nrfwifi | 1 # Nordic Wi-Fi driver for nRF70 series SoCs
5 # SPDX-License-Identifier: Apache-2.0
21 Nordic Wi-Fi Driver
38 bool "low power mode in QSPI"
48 Select the operating mode of the nRF70 driver
51 bool "nRF70 system mode"
55 Select this option to enable system mode of the nRF70 driver
58 bool "nRF70 scan only mode"
60 Select this option to enable scan only mode of the nRF70 driver
63 bool "Radio test mode of the nRF70 driver"
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| /Zephyr-latest/drivers/wifi/esp32/src/ |
| D | esp_wifi_drv.c | 4 * SPDX-License-Identifier: Apache-2.0
94 struct esp32_wifi_runtime *data = dev->data; in esp32_wifi_send() local
96 esp_interface_t ifx = data->state == ESP32_AP_CONNECTED ? ESP_IF_WIFI_AP : ESP_IF_WIFI_STA; in esp32_wifi_send()
99 if (net_pkt_read(pkt, data->frame_buf, pkt_len) < 0) { in esp32_wifi_send()
104 if (esp_wifi_internal_tx(ifx, (void *)data->frame_buf, pkt_len) != ESP_OK) { in esp32_wifi_send()
109 data->stats.bytes.sent += pkt_len; in esp32_wifi_send()
110 data->stats.pkts.tx++; in esp32_wifi_send()
120 data->stats.errors.tx++; in esp32_wifi_send()
122 return -EIO; in esp32_wifi_send()
132 return -EIO; in eth_esp32_rx()
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| /Zephyr-latest/subsys/logging/backends/ |
| D | Kconfig.rtt | 2 # SPDX-License-Identifier: Apache-2.0
5 bool "Segger J-Link RTT backend"
13 is transferred to up-buffer at once depending on available space and
14 selected mode.
15 In panic mode backend always blocks and waits until there is space
16 in up-buffer for a message and message is transferred to host.
25 bool "Drop messages that do not fit in up-buffer."
27 If there is not enough space in up-buffer for a message, drop it.
29 Increase up-buffer size helps to reduce dropping of messages.
34 Waits until there is enough space in the up-buffer for a message.
[all …]
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| /Zephyr-latest/dts/bindings/memory-controllers/ |
| D | renesas,smartbond-nor-psram.yaml | 2 # SPDX-License-Identifier: Apache-2.0
8 compatible: "renesas,smartbond-nor-psram"
14 is-ram:
19 dev-size:
25 dev-type:
31 dev-density:
40 dev-id:
46 reset-delay-us:
52 read-cs-idle-min-ns:
59 erase-cs-idle-min-ns:
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| /Zephyr-latest/drivers/mipi_dbi/ |
| D | mipi_dbi_nxp_lcdic.c | 4 * SPDX-License-Identifier: Apache-2.0
43 /* Limit imposed by size of data length field in LCDIC command */
53 /* Data length in bytes. LCDIC transfers data_len + 1 */
55 /* Dummy SCLK cycles between TX and RX (for SPI mode) */
58 /* Use auto repeat mode */
60 /* Tearing enable sync mode */
62 /* TRX command timeout mode */
64 /* Data format, see lcdic_data_fmt */
68 /* LCD command or LCD data, see lcdic_cmd_dc */
70 /* TX or RX command, see lcdic_cmd_type */
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| /Zephyr-latest/drivers/misc/ft8xx/ |
| D | ft8xx_drv.c | 4 * SPDX-License-Identifier: Apache-2.0
40 #define MAX_READ_LEN (UINT16_MAX - ADDR_SIZE - DUMMY_READ_SIZE)
41 #define MAX_WRITE_LEN (UINT16_MAX - ADDR_SIZE)
59 LOG_ERR("SPI bus %s not ready", spi.bus->name); in ft8xx_drv_init()
60 return -ENODEV; in ft8xx_drv_init()
64 * If not, use polling mode. in ft8xx_drv_init()
67 LOG_ERR("GPIO device %s is not ready", irq_gpio.port->name); in ft8xx_drv_init()
68 return -ENODEV; in ft8xx_drv_init()
87 int ft8xx_drv_write(uint32_t address, const uint8_t *data, unsigned int length) in ft8xx_drv_write() argument
95 struct spi_buf tx[] = { in ft8xx_drv_write() local
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| /Zephyr-latest/tests/drivers/mspi/flash/boards/ |
| D | native_sim.overlay | 4 * SPDX-License-Identifier: Apache-2.0
15 ce-gpios = <&gpio0 5 GPIO_ACTIVE_LOW>,
17 dqs-support;
18 software-multiperipheral;
22 compatible = "zephyr,mspi-emul-flash";
25 mspi-max-frequency = <48000000>;
26 mspi-io-mode = "MSPI_IO_MODE_QUAD";
27 mspi-data-rate = "MSPI_DATA_RATE_SINGLE";
28 mspi-hardware-ce-num = <0>;
29 read-command = <0x0B>;
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| /Zephyr-latest/include/zephyr/drivers/i3c/ |
| D | target_device.h | 4 * SPDX-License-Identifier: Apache-2.0
63 * True if lower 32-bit of Provisioned ID is random.
66 * the lower 32-bit is random value.
83 * Bit mask of supported HDR modes (0 - 7).
85 * This can be used to enable or disable HDR mode
141 * reception of a byte of data in an ongoing write operation to the
153 * @return 0 if more data can be accepted, or a negative error
174 * @param val Pointer to storage for the first byte of data to return
177 * @return 0 if more data can be requested, or a negative error code.
186 * provide additional data for a read operation from the address
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