/Zephyr-latest/drivers/interrupt_controller/ |
D | intc_ite_it8xxx2.c | 4 * SPDX-License-Identifier: Apache-2.0 80 _ier = *reg_enable[IT8XXX2_IER_COUNT - 1]; in ite_intc_save_and_disable_interrupts() 92 /* Restore interrupt state */ in ite_intc_restore_interrupts() 125 /* critical section due to run a bit-wise OR operation */ in ite_intc_irq_enable() 144 /* critical section due to run a bit-wise OR operation */ in ite_intc_irq_disable() 158 volatile uint8_t *tri; in ite_intc_irq_polarity_set() local 165 tri = reg_ipolr[g]; in ite_intc_irq_polarity_set() 167 CLEAR_MASK(*tri, BIT(i)); in ite_intc_irq_polarity_set() 169 SET_MASK(*tri, BIT(i)); in ite_intc_irq_polarity_set() 171 tri = reg_ielmr[g]; in ite_intc_irq_polarity_set() [all …]
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/Zephyr-latest/soc/ite/ec/common/ |
D | pinctrl_soc.h | 4 * SPDX-License-Identifier: Apache-2.0 11 #include <zephyr/dt-bindings/pinctrl/it8xxx2-pinctrl.h> 22 * kSI[7:0] and KSO[15:0] pins only support pull-up, push-pull/open-drain. 24 * pull-up/down, voltage selection, input. 41 * Pin pull-up/down config [ 4 : 5 ] 44 * Pin push-pull/open-drain [ 16 ] 60 /* Pin tri-state mode. */ 63 /* Pin pull-up or pull-down */ 73 /* Pin push-pull/open-drain mode */ 81 * @brief Utility macro to obtain configuration of tri-state. [all …]
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/Zephyr-latest/drivers/bluetooth/hci/ |
D | Kconfig.nxp | 2 # Copyright 2023-2024 NXP 4 # SPDX-License-Identifier: Apache-2.0 11 Auto sleep mode means the Controller will handle its low power state automatically. 74 NXP IW612 Chipset supports Wi-Fi? 802.11a/b/g/n/ac/ax + Bluetooth? 5.3 75 BR/EDR/LE + IEEE802.1.5.4 up to 601 Mbps data rate on Wi-Fi? and 2Mbps 76 data rate on Bluetooth?. 4-wire UART@3M baud is supported. PCM for 79 wireless-connectivity/wi-fi-plus-bluetooth-plus-802-15-4/2-4-5-ghz- 80 dual-band-1x1-wi-fi-6-802-11ax-plus-bluetooth-5-4-plus-802-15-4-tri- 81 radio-solution:IW612.
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/Zephyr-latest/drivers/gpio/ |
D | gpio_xlnx_axi.c | 4 * SPDX-License-Identifier: Apache-2.0 54 uint32_t tri; member 67 const struct gpio_xlnx_axi_config *config = dev->config; in gpio_xlnx_axi_read_data() 69 return sys_read32(config->base + (config->channel * GPIO2_OFFSET) + GPIO_DATA_OFFSET); in gpio_xlnx_axi_read_data() 74 const struct gpio_xlnx_axi_config *config = dev->config; in gpio_xlnx_axi_write_data() 76 sys_write32(val, config->base + (config->channel * GPIO2_OFFSET) + GPIO_DATA_OFFSET); in gpio_xlnx_axi_write_data() 81 const struct gpio_xlnx_axi_config *config = dev->config; in gpio_xlnx_axi_write_tri() 83 sys_write32(val, config->base + (config->channel * GPIO2_OFFSET) + GPIO_TRI_OFFSET); in gpio_xlnx_axi_write_tri() 88 const struct gpio_xlnx_axi_config *config = dev->config; in gpio_xlnx_axi_pin_configure() 89 struct gpio_xlnx_axi_data *data = dev->data; in gpio_xlnx_axi_pin_configure() [all …]
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D | gpio_ite_it8xxx2_v2.c | 4 * SPDX-License-Identifier: Apache-2.0 18 #include <zephyr/dt-bindings/gpio/ite-it8xxx2-gpio.h> 19 #include <zephyr/dt-bindings/interrupt-controller/ite-intc.h> 80 const struct gpio_ite_cfg *gpio_config = dev->config; in gpio_ite_configure() 81 volatile uint8_t *reg_gpdr = (uint8_t *)gpio_config->reg_gpdr; in gpio_ite_configure() 82 volatile uint8_t *reg_gpotr = (uint8_t *)gpio_config->reg_gpotr; in gpio_ite_configure() 83 volatile uint8_t *reg_p18scr = (uint8_t *)gpio_config->reg_p18scr; in gpio_ite_configure() 84 volatile uint8_t *reg_gpcr = (uint8_t *)gpio_config->reg_gpcr + pin; in gpio_ite_configure() 85 struct gpio_ite_data *data = dev->data; in gpio_ite_configure() 92 return -ENOTSUP; in gpio_ite_configure() [all …]
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D | gpio_ite_it8xxx2.c | 4 * SPDX-License-Identifier: Apache-2.0 11 #include <zephyr/dt-bindings/gpio/ite-it8xxx2-gpio.h> 12 #include <zephyr/dt-bindings/interrupt-controller/ite-intc.h> 57 ((struct gpio_ite_data *)(dev)->data) 60 ((const struct gpio_ite_cfg *)(dev)->config) 63 * Convert wake-up controller (WUC) group to the corresponding wake-up edge 73 * From WUESR1-WUESR4, the address increases by ones. From WUESR5 on in wuesr() 77 (volatile uint8_t *)(IT8XXX2_WUC_WUESR1 + grp-1) : in wuesr() 78 (volatile uint8_t *)(IT8XXX2_WUC_WUESR5 + 4*(grp-5)); in wuesr() 82 * Convert wake-up controller (WUC) group to the corresponding wake-up edge [all …]
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/Zephyr-latest/drivers/watchdog/ |
D | wdt_ti_tps382x.c | 4 * SPDX-License-Identifier: Apache-2.0 23 const struct ti_tps382x_config *config = dev->config; in ti_tps382x_init() 25 if (!gpio_is_ready_dt(&config->wdi_gpio)) { in ti_tps382x_init() 27 return -ENODEV; in ti_tps382x_init() 35 const struct ti_tps382x_config *config = dev->config; in ti_tps382x_setup() 37 return gpio_pin_configure_dt(&config->wdi_gpio, GPIO_OUTPUT); in ti_tps382x_setup() 42 const struct ti_tps382x_config *config = dev->config; in ti_tps382x_disable() 45 * the system. Do this by changing the gpio to an input (tri-state). in ti_tps382x_disable() 47 return gpio_pin_configure_dt(&config->wdi_gpio, GPIO_INPUT); in ti_tps382x_disable() 53 const struct ti_tps382x_config *config = dev->config; in ti_tps382x_install_timeout() [all …]
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/Zephyr-latest/subsys/mgmt/osdp/ |
D | Kconfig.pd | 4 # SPDX-License-Identifier: Apache-2.0 78 A 4-byte serial number for the PD. 86 - Bit 0-7 : build version number; 87 - Bit 8-15 : minor version number; 88 - Bit 16-23: major version number; 102 - 01: PD monitors and reports the state of the circuit without any 104 interpretation of contact state to active/inactive status. 105 - 02: Like 01, plus: The PD accepts configuration of the encoding of the 108 - 03: Like 02, plus: PD supports supervised monitoring. The operating mode 110 - 04: Like 03, plus: the PD supports custom End-Of-Line settings within [all …]
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/Zephyr-latest/dts/bindings/pinctrl/ |
D | nuvoton,npcx-pinctrl.yaml | 2 # SPDX-License-Identifier: Apache-2.0 10 - bias-pull-down: Enable pull-down resistor. 11 - bias-pull-up: Enable pull-up resistor. 12 - drive-open-drain: Output driver is open-drain. 15 - pinmux-locked: Lock pinmux configuration for peripheral device 16 - pinmux-gpio: Inverse pinmux back to gpio 17 - psl-in-mode: Select the assertion detection mode of PSL input 18 - psl-in-pol: Select the assertion detection polarity of PSL input 23 #include <nuvoton/npcx/npcx7/npcx7-pinctrl.dtsi> 26 internal 3.3V pull-up if its i2c frequency won't exceed 400kHz. [all …]
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D | xlnx,pinctrl-zynq.yaml | 2 # SPDX-License-Identifier: Apache-2.0 5 # https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/xlnx,zynq-pinctrl.txt 6 # https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/xlnx,zynq-pinctrl.yaml 9 Xilinx Zynq-7000 SoC series pinctrl node. This node will define pin multiplexing and 18 #include <zephyr/dt-bindings/pinctrl/pinctrl-zynq.h> 21 pinctrl_uart1_default: uart1-default { 29 slew-rate = <IO_SPEED_SLOW>; 30 power-source = <IO_STANDARD_LVCMOS18>; 33 conf-rx { 35 bias-high-impedance; [all …]
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/Zephyr-latest/drivers/spi/ |
D | spi_xlnx_axi_quadspi.c | 4 * SPDX-License-Identifier: Apache-2.0 105 const struct xlnx_quadspi_config *config = dev->config; in xlnx_quadspi_read32() 107 return sys_read32(config->base + offset); in xlnx_quadspi_read32() 114 const struct xlnx_quadspi_config *config = dev->config; in xlnx_quadspi_write32() 116 sys_write32(value, config->base + offset); in xlnx_quadspi_write32() 121 const struct xlnx_quadspi_config *config = dev->config; in xlnx_quadspi_cs_control() 122 struct xlnx_quadspi_data *data = dev->data; in xlnx_quadspi_cs_control() 123 struct spi_context *ctx = &data->ctx; in xlnx_quadspi_cs_control() 124 uint32_t spissr = BIT_MASK(config->num_ss_bits); in xlnx_quadspi_cs_control() 127 /* Skip slave select assert/de-assert in slave mode */ in xlnx_quadspi_cs_control() [all …]
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D | spi_xec_qmspi_ldma.c | 4 * SPDX-License-Identifier: Apache-2.0 20 #include <zephyr/dt-bindings/clock/mchp_xec_pcr.h> 21 #include <zephyr/dt-bindings/interrupt-controller/mchp-xec-ecia.h> 35 * data bytes will be left shifted by 1. Work-around for SPI Mode 3 is 123 return -ETIMEDOUT; in xec_qmspi_spin_yield() 133 * Some QMSPI timing register may be modified by the Boot-ROM OTP 144 taps[0] = regs->TM_TAPS; in qmspi_reset() 145 taps[1] = regs->TM_TAPS_ADJ; in qmspi_reset() 146 taps[2] = regs->TM_TAPS_CTRL; in qmspi_reset() 147 malt1 = regs->MODE_ALT1; in qmspi_reset() [all …]
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/Zephyr-latest/tests/boards/mec172xevb_assy6906/qspi/src/ |
D | main.c | 4 * SPDX-License-Identifier: Apache-2.0 30 * bits[15:8] = bytes number of clocks with data lines tri-stated 88 * mode = 1(full-duplex), 2(dual), 4(quad) 89 * full-duplex: 8 clocks per byte 113 return -EINVAL; in spi_flash_address_format() 117 dest[i] = (uint8_t)((spi_addr >> ((addrsz - (i + 1U)) * 8U)) & 0xffU); in spi_flash_address_format() 210 * - Find spi device 211 * - Read flash jedec id 248 * - write enable 249 * - erase data in flash device [all …]
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/Zephyr-latest/soc/nuvoton/npcx/common/ |
D | pinctrl_soc.h | 4 * SPDX-License-Identifier: Apache-2.0 70 * pin-muxing, pull-up/down and so on. 89 * characteristics such as tri-state, power supply type selection, and so on. 134 /** Properties used for io-pad. */ 201 * @brief Utility macro to initialize a periphral pull-up/down configuration. 204 * @param prop Property name for pull-up/down configuration. (i.e. 'periph-pupd') 234 * @param prop Property name for pull-up/down configuration. (i.e. 'polarity') 250 * @param prop Pinctrl state property name. (i.e. 'pinctrl-0/1/2') 272 * @brief Utility macro to initialize state pins contained in a given property. 275 * @param prop Property name describing state pins.
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/Zephyr-latest/include/zephyr/drivers/ |
D | mdio.h | 8 * Copyright (c) 2021 IP-Logix Inc. 11 * SPDX-License-Identifier: Apache-2.0 74 (const struct mdio_driver_api *)dev->api; in z_impl_mdio_bus_enable() 76 if (api->bus_enable != NULL) { in z_impl_mdio_bus_enable() 77 api->bus_enable(dev); in z_impl_mdio_bus_enable() 82 * @brief Disable MDIO bus and tri-state drivers 92 (const struct mdio_driver_api *)dev->api; in z_impl_mdio_bus_disable() 94 if (api->bus_disable != NULL) { in z_impl_mdio_bus_disable() 95 api->bus_disable(dev); in z_impl_mdio_bus_disable() 111 * @retval -EIO General input / output error. [all …]
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/Zephyr-latest/drivers/input/ |
D | input_ite_it8801_kbd.c | 4 * SPDX-License-Identifier: Apache-2.0 56 const struct kbd_it8801_config *config = dev->config; in kbd_it8801_drive_column() 61 /* Tri-state all outputs. KSO[22:11, 6:0] output high */ in kbd_it8801_drive_column() 68 kso_val = config->kso_mapping[col]; in kbd_it8801_drive_column() 71 ret = i2c_reg_write_byte_dt(&config->i2c_dev, config->reg_ksomcr, kso_val); in kbd_it8801_drive_column() 80 const struct kbd_it8801_config *const config = dev->config; in kbd_it8801_read_row() 84 ret = i2c_reg_read_byte_dt(&config->i2c_dev, config->reg_ksidr, &value); in kbd_it8801_read_row() 89 /* Bits are active-low, so invert returned levels */ in kbd_it8801_read_row() 95 const struct kbd_it8801_config *const config = dev->config; in it8801_input_alert_handler() 99 ret = i2c_reg_read_byte_dt(&config->i2c_dev, config->reg_ksieer, &ksieer_val); in it8801_input_alert_handler() [all …]
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D | input_ite_it8xxx2_kbd.c | 3 * SPDX-License-Identifier: Apache-2.0 15 #include <zephyr/dt-bindings/interrupt-controller/it8xxx2-wuc.h> 37 /* Keyboard scan input (KSI) wake-up irq */ 39 /* KSI[7:0] wake-up input source configuration list */ 53 /* KSI[7:0] wake-up interrupt status mask */ 61 const struct it8xxx2_kbd_config *const config = dev->config; in it8xxx2_kbd_drive_column() 62 const struct input_kbd_matrix_common_config *common = &config->common; in it8xxx2_kbd_drive_column() 63 struct kscan_it8xxx2_regs *const inst = config->base; in it8xxx2_kbd_drive_column() 64 const uint32_t kso_mask = BIT_MASK(common->col_size) & ~config->kso_ignore_mask; in it8xxx2_kbd_drive_column() 70 /* Tri-state all outputs */ in it8xxx2_kbd_drive_column() [all …]
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/Zephyr-latest/soc/microchip/mec/mec15xx/ |
D | soc_espi_saf_v1.h | 4 * SPDX-License-Identifier: Apache-2.0 21 * SAF hardware state machine timings 60 /* QMSPI descriptors 12-15 for all SPI flash devices */ 64 * QMSPI descriptors 12-13 are exit continuous mode 84 * QMSPI descriptors 14-15 are poll 16-bit flash status 106 /* SAF Pre-fetch optimization mode */ 112 * SAF Opcode 32-bit register value. 113 * Each byte contain a SPI flash 8-bit opcode. 117 * op0 = SPI flash write-enable opcode 127 * op0 = SPI flash read 1-4-4 continuous mode opcode [all …]
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/Zephyr-latest/drivers/flash/ |
D | flash_npcx_fiu_qspi.c | 4 * SPDX-License-Identifier: Apache-2.0 13 #include <zephyr/dt-bindings/flash_controller/npcx_fiu_qspi.h> 23 ((struct fiu_reg *)((const struct npcx_qspi_fiu_config *)(dev)->config)->base) 41 /* Current Software controlled Chip-Select number */ 54 inst->UMA_ECTS |= BIT(sw_cs); in qspi_npcx_uma_cs_level() 56 inst->UMA_ECTS &= ~BIT(sw_cs); in qspi_npcx_uma_cs_level() 65 inst->UMA_CODE = data; in qspi_npcx_uma_write_byte() 66 inst->UMA_CTS = UMA_CODE_CMD_WR_ONLY; in qspi_npcx_uma_write_byte() 68 while (IS_BIT_SET(inst->UMA_CTS, NPCX_UMA_CTS_EXEC_DONE)) { in qspi_npcx_uma_write_byte() 78 inst->UMA_CTS = UMA_CODE_RD_BYTE(1); in qspi_npcx_uma_read_byte() [all …]
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/Zephyr-latest/scripts/kconfig/ |
D | guiconfig.py | 4 # SPDX-License-Identifier: ISC 10 # pylint: disable=undefined-variable 16 A Tkinter-based menuconfig implementation, based around a treeview control and 21 single menu (like menuconfig.py). Only single-menu mode distinguishes between 24 A show-all mode is available that shows invisible items in red. 29 Ctrl-S : Save configuration 30 Ctrl-O : Open configuration 31 Ctrl-A : Toggle show-all mode 32 Ctrl-N : Toggle show-name mode 33 Ctrl-M : Toggle single-menu mode [all …]
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/Zephyr-latest/drivers/pinctrl/ |
D | pinctrl_ite_it8xxx2.c | 4 * SPDX-License-Identifier: Apache-2.0 53 * KSO push-pull/open-drain bit of KSO[15:0] control register 74 const struct pinctrl_it8xxx2_config *pinctrl_config = pins->pinctrls->config; in pinctrl_it8xxx2_set() 75 const struct pinctrl_it8xxx2_gpio *gpio = &(pinctrl_config->gpio); in pinctrl_it8xxx2_set() 76 uint32_t pincfg = pins->pincfg; in pinctrl_it8xxx2_set() 77 uint8_t pin = pins->pin; in pinctrl_it8xxx2_set() 78 volatile uint8_t *reg_gpcr = (uint8_t *)gpio->reg_gpcr + pin; in pinctrl_it8xxx2_set() 79 volatile uint8_t *reg_volt_sel = (uint8_t *)(gpio->volt_sel[pin]); in pinctrl_it8xxx2_set() 80 volatile uint8_t *reg_pdsc = (uint8_t *)gpio->reg_pdsc; in pinctrl_it8xxx2_set() 82 /* Setting pull-up or pull-down. */ in pinctrl_it8xxx2_set() [all …]
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/Zephyr-latest/drivers/i2c/ |
D | i2c_mchp_xec_v2.c | 5 * SPDX-License-Identifier: Apache-2.0 25 #include "i2c-priv.h" 99 uint8_t state; member 112 * i2c_baud_clk_period/bus_clk_period - 2 = (low_period + hi_period) 113 * bus_clk_reg (16MHz/100KHz -2) = 0x4F + 0x4F 114 * (16MHz/400KHz -2) = 0x0F + 0x17 115 * (16MHz/1MHz -2) = 0x05 + 0x09 144 (const struct i2c_xec_config *const) (dev->config); in i2c_ctl_wr() 146 (struct i2c_xec_data *const) (dev->data); in i2c_ctl_wr() 147 struct i2c_smb_regs *regs = (struct i2c_smb_regs *)cfg->base_addr; in i2c_ctl_wr() [all …]
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/Zephyr-latest/soc/microchip/mec/mec172x/ |
D | soc_espi_saf_v2.h | 4 * SPDX-License-Identifier: Apache-2.0 20 * SAF hardware state machine timings 41 * Boot-ROM OTP configuration. 70 /* QMSPI descriptors 12-15 for all SPI flash devices */ 72 /* QMSPI descriptors 12-13 are exit continuous mode */ 108 * QMSPI descriptors 14-15 are poll 16-bit flash status 130 /* SAF Pre-fetch optimization mode */ 136 * SAF Opcode 32-bit register value. 137 * Each byte contain a SPI flash 8-bit opcode. 141 * op0 = SPI flash write-enable opcode [all …]
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/Zephyr-latest/samples/boards/microchip/mec172xevb_assy6906/qmspi_ldma/src/ |
D | main.c | 4 * SPDX-License-Identifier: Apache-2.0 122 return -EINVAL; in spi_flash_format_addr() 126 buf[i] = spi_addr >> ((addrsz - i - 1u) * 8); in spi_flash_format_addr() 140 return -EINVAL; in spi_flash_read_status() 171 return -EINVAL; in spi_poll_busy() 189 timeout_ms--; in spi_poll_busy() 193 return -ETIMEDOUT; in spi_poll_busy() 196 /* SPI flash full-duplex write of command opcode, optional command parameters, and optional data */ 205 return -EINVAL; in spi_flash_fd_wr_cpd() 240 return -EINVAL; in spi_flash_read_fd_sync() [all …]
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/Zephyr-latest/boards/nxp/frdm_k64f/doc/ |
D | index.rst | 6 The Freedom-K64F is an ultra-low-cost development platform for Kinetis K64, 9 - Form-factor compatible with the Arduino R3 pin layout 10 - Peripherals enable rapid prototyping, including a 6-axis digital 12 tri-colored LED and 2 user push-buttons for direct interaction, a microSD 14 with Bluetooth* and 2.4 GHz radio add-on modules 15 - OpenSDAv2, the NXP open source hardware embedded serial and debug adapter 17 flash programming, and run-control debugging 22 - MK64FN1M0VLL12 MCU (120 MHz, 1 MB flash memory, 256 KB RAM, low-power, 23 crystal-less USB, and 100 Low profile Quad Flat Package (LQFP)) 24 - Dual role USB interface with micro-B USB connector [all …]
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