| /Zephyr-latest/dts/bindings/display/ |
| D | led-strip-matrix.yaml | 2 # SPDX-License-Identifier: Apache-2.0
7 compatible: "led-strip-matrix"
9 include: display-controller.yaml
32 start-from-right:
37 * Start from the right with a serpentine layout
43 * Start from the right with a circulative layout
49 start-from-bottom:
52 Specify if the first LED is at the bottom.
54 * Start from the bottom with a circulative layout
60 * Start from the bottom with a serpentine layout
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| /Zephyr-latest/doc/services/tracing/ |
| D | index.rst | 9 The tracing feature provides hooks that permits you to collect data from
10 your application and allows :ref:`tools` running on a host to visualize the inner-working of
13 Every system has application-specific events to trace out. Historically,
16 1. Determining the application-specific payload,
17 2. Choosing suitable serialization-format,
18 3. Writing the on-target serialization code,
20 5. Writing the PC-side deserializer/parser,
21 6. Writing custom ad-hoc tools for filtering and presentation.
29 In fact, I/O varies greatly from system to system. Therefore, it is
32 (bottom Layer) is generic and efficient enough to model these. See the
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| /Zephyr-latest/arch/x86/zefi/ |
| D | README.txt | 5 (NOT a "zephyr.strip" intended for grub/multiboot loading -- we need
9 from the EFI shell.
15 image extracted from a built zephyr.elf file. EFI applications are
18 appropriate locations at startup, clear any zero-filled (BSS, etc...)
23 load it from the EFI boot filesystem into its correct location with no
26 that size, and potentially MUCH more if you start enabling the default
32 The code and link environment here is non-obvious. The simple rules
45 Linux toolchain. EFI binaries are relocatable PE-COFF files --
50 independent code. Non-static global variables and function addresses
52 time by a system binary (ld-linux.so). But there is no ld-linux.so in
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| /Zephyr-latest/include/zephyr/arch/riscv/ |
| D | arch.h | 2 * Copyright (c) 2016 Jean-Paul Etienne <fractalclone@gmail.com>
5 * SPDX-License-Identifier: Apache-2.0
33 /* stacks, for RISCV architecture stack should be 16byte-aligned */
41 * The StackGuard is an area at the bottom of the kernel-mode stack made to
61 /* Kernel-only stacks have the following layout if a stack guard is enabled:
63 * +------------+ <- thread.stack_obj
65 * +------------+ <- thread.stack_info.start
71 * +------------+ <- thread.stack_info.start + thread.stack_info.size
83 * +------------+ <- thread.arch.priv_stack_start
85 * +------------+
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| /Zephyr-latest/arch/riscv/core/ |
| D | pmp.c | 4 * SPDX-License-Identifier: Apache-2.0
6 * Physical Memory Protection (PMP) is RISC-V parlance for an MPU.
14 * PMP slot configurations are updated in memory to avoid read-modify-write
16 * written in batch from their shadow copy in RAM for better efficiency.
18 * In the stackguard case we keep an m-mode copy for each thread. Each user
19 * mode threads also has a u-mode copy. This makes faster context switching
23 * Thread-specific m-mode and u-mode PMP entries start from the PMP slot
30 #include <zephyr/linker/linker-defs.h>
54 #define NAPOT_RANGE(size) (((size) - 1) >> 1)
68 unsigned long start, end, tmp; in print_pmp_entries() local
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| /Zephyr-latest/arch/xtensa/core/ |
| D | README_MMU.txt | 14 4-way-set-associative bank of entries mapping 4k pages, and 3-6
22 architecture technically supports separately-virtualized instruction
33 Live TLB entries are tagged with an 8-bit "ASID" value derived from
36 non-kernel address space will get a separate ring 3 ASID set in RASID,
44 ## Virtually-mapped Page Tables
52 privilege) from RAM by adding the "desired address right shifted by
53 10 bits with the bottom two bits set to zero" (i.e. the page frame
59 memory fetch vs. e.g. the 2-5 fetches required to walk a page table on
63 access, meaning it too uses the TLB to translate from a virtual to
68 1048576 4-byte PTE entries, each describing a mapping for 4k of
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| D | gen_vectors.py | 3 # SPDX-License-Identifier: Apache-2.0
9 # Takes a pre-processed (gcc -dM) core-isa.h file as its first
20 # lacks VECBASE, but the core-isa.h interface is inexplicably
23 # Because the "standard conventions" (which descend from somewhere in
40 # (of a platform-dependent level), but the code for them is emitted
46 # can only back-reference immediates for MOVI/L32R instructions) as
57 # Translation for the core-isa.h vs. linker section naming conventions
71 # This must be the start of the section
108 print("/* Automatically Generated Code - Do Not Edit */")
114 # bottom bits don't take...
|
| /Zephyr-latest/doc/_doxygen/ |
| D | doxygen-awesome.css | 4 https://github.com/jothepro/doxygen-awesome-css
8 Copyright (c) 2021 - 2023 jothepro
24 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
32 --primary-color: #1779c4;
33 --primary-dark-color: #335c80;
34 --primary-light-color: #70b1e9;
37 --page-background-color: #ffffff;
38 --page-foreground-color: #2f4153;
39 --page-secondary-foreground-color: #6f7e8e;
42 --separator-color: #dedede;
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| /Zephyr-latest/drivers/ethernet/ |
| D | eth_xlnx_gem_priv.h | 7 * SPDX-License-Identifier: Apache-2.0
26 /* Receive Buffer Descriptor bits & masks: comp. Zynq-7000 TRM, Table 16-2. */
30 * [31 .. 02] Mask for effective buffer address -> excludes [1..0]
47 * [23 .. 22] These bits have different semantics depending on whether RX check-
54 * [15] End-of-frame bit
55 * [14] Start-of-frame bit
78 /* Transmit Buffer Descriptor bits & masks: comp. Zynq-7000 TRM, Table 16-3. */
86 * exhausted mid-frame
116 * Zynq-7000 TX clock configuration:
130 * https://www.xilinx.com/html_docs/registers/ug1087/ug1087-zynq-ultrascale-registers.html
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| /Zephyr-latest/lib/heap/ |
| D | heap.h | 4 * SPDX-License-Identifier: Apache-2.0
13 /* Theese validation checks are non-trivially expensive, so enable
23 /* Chunks are identified by their offset in 8 byte units from the
24 * first address in the buffer (a zero-valued chunkid_t is used as a
25 * null; that chunk would always point into the metadata at the start
39 * 8-byte units. The bottom bit stores a "used" flag.
43 * The free lists are circular lists, one for each power-of-two size
49 * by SIZE_AND_USED of the current chunk at the bottom, and LEFT_SIZE of
98 return big_heap_chunks(h->end_chunk); in big_heap()
123 CHECK(c <= h->end_chunk); in chunk_set()
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| /Zephyr-latest/drivers/usb/device/ |
| D | usb_dc_numaker.c | 4 * SPDX-License-Identifier: Apache-2.0
11 #include <zephyr/dt-bindings/usb/usb.h>
39 /* Reserve DMA buffer for Setup/CTRL OUT/CTRL IN, required to be 8-byte aligned */
45 * This is to static-allocate EP contexts which can accommodate all instances.
103 * one-shot implementation
131 * Allocate-only, and de-allocate all on re-initialize in usb_dc_attach().
137 * Allocate-only, and de-allocate all on re-initialize in usb_dc_attach().
141 /* Pass Setup packet from ISR to thread */
154 /* Enable interrupt top/bottom halves processing
175 struct numaker_usbd_data *data = dev->data; in numaker_usbd_lock()
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| /Zephyr-latest/arch/arm/core/cortex_a_r/ |
| D | thread.c | 2 * Copyright (c) 2013-2014 Wind River Systems, Inc.
5 * SPDX-License-Identifier: Apache-2.0
10 * @brief New thread creation for ARM Cortex-A and Cortex-R
12 * Core thread related primitives for the ARM Cortex-A and
13 * Cortex-R processor architecture.
24 #define FP_GUARD_EXTRA_SIZE (MPU_GUARD_ALIGN_AND_SIZE_FLOAT - \
31 /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */
61 /* Guard area is carved-out of the buffer instead of reserved in arch_new_thread()
64 thread->stack_info.start += MPU_GUARD_ALIGN_AND_SIZE; in arch_new_thread()
65 thread->stack_info.size -= MPU_GUARD_ALIGN_AND_SIZE; in arch_new_thread()
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| /Zephyr-latest/arch/riscv/ |
| D | Kconfig | 1 # Copyright (c) 2016 Jean-Paul Etienne <fractalclone@gmail.com>
3 # SPDX-License-Identifier: Apache-2.0
13 bool "Hard-float calling convention"
17 This option enables the hard-float calling convention.
24 bool "RISC-V global pointer relative addressing"
31 Note: To support this feature, RISC-V SoC needs to initialize
32 global pointer at program start or earlier than any instruction
51 This is for RISC-V implementations that require every mret to be
52 balanced with an ecall. This is not required by the RISC-V spec
57 prompt "RISC-V SMP IPI implementation"
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| /Zephyr-latest/doc/_static/css/ |
| D | custom.css | 2 * Copyright (c) 2019-2020, Juan Linietsky, Ariel Manzur and the Godot community
4 * SPDX-License-Identifier: CC-BY-3.0
12 …--system-font-family: system-ui, -apple-system, "Segoe UI", Roboto, "Helvetica Neue", Arial, "Noto…
13 …--header-font-family: Seravek, 'Gill Sans Nova', Ubuntu, Calibri, 'DejaVu Sans', source-sans-pro, …
30 .rst-content .toctree-wrapper p.caption,
31 .rst-versions {
32 font-family: var(--system-font-family);
42 .rst-content .toctree-wrapper p.caption {
43 /* Use a lighter font for headers (Semi-Bold instead of Bold) */
44 font-weight: 600;
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| /Zephyr-latest/drivers/wifi/nrf_wifi/ |
| D | Kconfig.nrfwifi | 1 # Nordic Wi-Fi driver for nRF70 series SoCs
5 # SPDX-License-Identifier: Apache-2.0
21 Nordic Wi-Fi Driver
124 bool "Wi-Fi interface auto start on boot"
139 bool "Load nRF70 FW patches from external binary"
141 Select this option to load nRF70 FW patches from an external tooling.
145 bool "Low power mode in nRF Wi-Fi chipsets"
157 # Making calls to RPU from net_mgmt callbacks.
169 module-dep = LOG
170 module-str = Log level for Wi-Fi nRF70 driver
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| /Zephyr-latest/arch/xtensa/core/startup/ |
| D | reset_vector.S | 3 * SPDX-License-Identifier: Apache-2.0
10 #include <xtensa/xtensa-xer.h>
11 #include <xtensa/xdm-regs.h>
14 #include <xtensa/xtruntime-core-state.h>
42 .size __start, . - __start
57 #warning "Xtensa TX reset vector not at start of iram0, irom0, or uram0 -- ROMing LSPs may not work"
76 * Even if the processor supports the non-PC-relative L32R option,
77 * it will always start up in PC-relative mode. We take advantage of
78 * this, and use PC-relative mode at least until we're sure the .lit4
81 .begin no-absolute-literals
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| /Zephyr-latest/scripts/kconfig/ |
| D | menuconfig.py | 3 # Copyright (c) 2018-2019, Nordic Semiconductor ASA and Ulf Magnusson
4 # SPDX-License-Identifier: ISC
10 A curses-based Python 2/3 menuconfig implementation. The interface should feel
19 Ctrl-D/U: Page Down/Page Up
27 character in it in the current menu isn't supported. A jump-to feature for
33 F: Toggle show-help mode, which shows the help text of the currently selected
34 item in the window at the bottom of the menu display. This is handy when
37 C: Toggle show-name mode, which shows the symbol name before each symbol menu
40 A: Toggle show-all mode, which shows all items, including currently invisible
52 When run in standalone mode, the top-level Kconfig file to load can be passed
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| /Zephyr-latest/doc/introduction/ |
| D | index.rst | 6 The Zephyr OS is based on a small-footprint kernel designed for use on
7 resource-constrained and embedded systems: from simple embedded environmental
13 - ARCv2 (EM and HS) and ARCv3 (HS6X)
14 - ARMv6-M, ARMv7-M, and ARMv8-M (Cortex-M)
15 - ARMv7-A and ARMv8-A (Cortex-A, 32- and 64-bit)
16 - ARMv7-R, ARMv8-R (Cortex-R, 32- and 64-bit)
17 - Intel x86 (32- and 64-bit)
18 - MIPS (MIPS32 Release 1 specification)
19 - NIOS II Gen 2
20 - RISC-V (32- and 64-bit)
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| /Zephyr-latest/subsys/fb/ |
| D | cfb.c | 4 * SPDX-License-Identifier: Apache-2.0
20 #define MSB_BIT_MASK(x) (BIT_MASK(x) << (8 - x))
72 return (uint8_t *)fptr->data + in get_glyph_ptr()
73 (c - fptr->first_char) * in get_glyph_ptr()
74 (fptr->width * fptr->height / 8U); in get_glyph_ptr()
80 if (fptr->caps & CFB_FONT_MONO_VPACKED) { in get_glyph_byte()
81 return glyph_ptr[x * (fptr->height / 8U) + y]; in get_glyph_byte()
82 } else if (fptr->caps & CFB_FONT_MONO_HPACKED) { in get_glyph_byte()
83 return glyph_ptr[y * (fptr->width) + x]; in get_glyph_byte()
98 const struct cfb_font *fptr = &(fb->fonts[fb->font_idx]); in draw_char_vtmono()
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| /Zephyr-latest/doc/kernel/services/threads/ |
| D | index.rst | 43 * A **start delay**, which specifies how long the kernel should wait before
66 Specifying a start delay of :c:macro:`K_NO_WAIT` instructs the kernel
67 to start thread execution immediately. Alternatively, the kernel can be
69 value -- for example, to allow device hardware used by the thread
72 The kernel allows a delayed start to be canceled before the thread begins
74 started. A thread whose delayed start was successfully canceled must be
75 re-spawned before it can be used.
81 synchronously end its execution by returning from its entry point function.
91 thread self-exits, or the target thread aborts (either due to a
96 re-used for any purpose, including spawning a new thread. Note that
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| /Zephyr-latest/include/zephyr/usb/class/ |
| D | usbd_hid.h | 4 * SPDX-License-Identifier: Apache-2.0
35 * +---------------------+
40 * | of the device that +-------+
45 * | ------------------- | |
50 * +---------------------+ |
57 * +---------------------+ |
60 * | "bottom half" |<------+
65 * +---------------------+
68 * +--------------------+
73 * +--------------------+
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| /Zephyr-latest/arch/arm/core/cortex_m/ |
| D | thread.c | 2 * Copyright (c) 2013-2014 Wind River Systems, Inc.
6 * SPDX-License-Identifier: Apache-2.0
11 * @brief New thread creation for ARM Cortex-M
13 * Core thread related primitives for the ARM Cortex-M
25 #define FP_GUARD_EXTRA_SIZE (MPU_GUARD_ALIGN_AND_SIZE_FLOAT - \
32 /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */
70 /* Guard area is carved-out of the buffer instead of reserved in arch_new_thread()
73 thread->stack_info.start += MPU_GUARD_ALIGN_AND_SIZE; in arch_new_thread()
74 thread->stack_info.size -= MPU_GUARD_ALIGN_AND_SIZE; in arch_new_thread()
78 if ((thread->base.user_options & K_FP_REGS) != 0) { in arch_new_thread()
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| /Zephyr-latest/doc/releases/ |
| D | release-notes-1.8.rst | 13 * Ecosystem: Tracing, debugging support through third-party tools (openocd,
39 * arm: Fixed nRF52840-QIAA SoC support for device tree
61 * Support for new ARM board FRDM-KL25Z
66 * arm: Added support for STM32F469I-DISCO board
72 * UART interrupt-driver API is better defined
73 * Support for pull-style console API
89 * HTTP Basic-Auth support added
91 * Add block wise support to CoAP for well-known response
93 * Start to collect TCP statistics if enabled in config
114 * Start RX and TX network threads in proper order
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| /Zephyr-latest/subsys/mgmt/ec_host_cmd/backends/ |
| D | ec_host_cmd_backend_shi_npcx.c | 4 * SPDX-License-Identifier: Apache-2.0
32 #define HAL_INSTANCE(dev) (struct shi_reg *)(((const struct shi_npcx_config *)(dev)->config)->base)
48 * This affects the slowest SPI clock we can support. A delay of 8192 us permits a 512-byte request
62 * Space allocation of the past-end status byte (EC_SHI_PAST_END) in the out_msg buffer.
73 * one last past-end byte at the end so any additional bytes clocked out by
81 * overhead, as passed to the host command handler, must be 32-bit aligned.
87 SHI_STATE_NONE = -1,
117 /* Chip-select interrupts */
145 * With the workaround, CS assertion/de-assertion INT and SHI module's INT come from
173 if (atomic_test_and_set_bit(data->pm_policy_state_flag, flag) == 0) { in shi_npcx_pm_policy_state_lock_get()
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| /Zephyr-latest/doc/services/storage/zms/ |
| D | zms.rst | 5 Zephyr Memory Storage is a new key-value storage system that is designed to work with all types
6 of non-volatile storage technologies. It supports classical on-chip NOR flash as well as new
12 ZMS divides the memory space into sectors (minimum 2), and each sector is filled with key-value
15 The key-value pair is divided into two parts:
17 - The key part is written in an ATE (Allocation Table Entry) called "ID-ATE" which is stored
18 starting from the bottom of the sector
19 - The value part is defined as "DATA" and is stored raw starting from the top of the sector
21 Additionally, for each sector we store at the last positions Header-ATEs which are ATEs that
28 Afterwards we move forward to the next sector and start writing entries again.
30 This behavior is repeated until it reaches the end of the partition. Then it starts again from
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