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2  * Copyright (c) 2016 Jean-Paul Etienne <fractalclone@gmail.com>
5  * SPDX-License-Identifier: Apache-2.0
33 /* stacks, for RISCV architecture stack should be 16byte-aligned */
41  * The StackGuard is an area at the bottom of the kernel-mode stack made to
61 /* Kernel-only stacks have the following layout if a stack guard is enabled:
63  * +------------+ <- thread.stack_obj
65  * +------------+ <- thread.stack_info.start
71  * +------------+ <- thread.stack_info.start + thread.stack_info.size
83  * +------------+ <- thread.arch.priv_stack_start
85  * +------------+
87  * +------------+ <- thread.arch.priv_stack_start +
94  * +------------+ <- thread.stack_obj
96  * +............| <- thread.stack_info.start
102  * +------------+ <- thread.stack_info.start + thread.stack_info.size
104  * When transitioning to user space, the guard area will be removed from
106  * to the region denoted by thread.stack_info. Make it PMP-NAPOT compatible.
108  * +------------+ <- thread.stack_obj = thread.stack_info.start
114  * +------------+ <- thread.stack_info.start + thread.stack_info.size
128  * +------------+ <- thread.stack_obj
130  * +------------+
132  * +------------+ <- thread.stack_info.start
138  * +------------+ <- thread.stack_info.start + thread.stack_info.size
169 /* This comes from openisa_rv32m1, but doesn't seem to hurt on other
171  * - Preserve machine privileges in MPP. If you see any documentation
172  *   telling you that MPP is read-only on this SoC, don't believe its
174  * - Enable interrupts when exiting from exception into a new thread
191  * (access permissions and cache-ability).
199 /* Read-Write access permission attributes */
213 /* Execution-allowed attributes */
303 #include <zephyr/arch/riscv/riscv-privileged/asm_inline.h>