Searched +full:shi +full:- +full:cs +full:- +full:wui (Results 1 – 5 of 5) sorted by relevance
2 # SPDX-License-Identifier: Apache-2.04 description: Nuvoton, NPCX Serial Host Interface (SHI) node6 compatible: "nuvoton,npcx-shi"8 include: [pinctrl-device.yaml, shi-device.yaml]11 pinctrl-0:14 pinctrl-names:21 shi-cs-wui:25 Mapping table between Wake-Up Input (WUI) and SHI_CS signal.27 For example the WUI mapping on NPCX7 would be28 shi-cs-wui = <&wui_io53>;
4 * SPDX-License-Identifier: Apache-2.08 #include "npcx7/npcx7-alts-map.dtsi"9 /* NPCX7 series mapping table between MIWU wui bits and source device */10 #include "npcx7/npcx7-miwus-wui-map.dtsi"12 #include "npcx7/npcx7-miwus-int-map.dtsi"14 #include "npcx7/npcx7-espi-vws-map.dtsi"15 /* NPCX7 series low-voltage io controls mapping table */16 #include "npcx7/npcx7-lvol-ctrl-map.dtsi"24 cpu-power-states = <&suspend_to_idle0 &suspend_to_idle1>;27 power-states {[all …]
4 * SPDX-License-Identifier: Apache-2.08 #include "npcx9/npcx9-alts-map.dtsi"9 /* NPCX9 series mapping table between MIWU wui bits and source device */10 #include "npcx9/npcx9-miwus-wui-map.dtsi"12 #include "npcx9/npcx9-miwus-int-map.dtsi"14 #include "npcx9/npcx9-espi-vws-map.dtsi"15 /* NPCX9 series low-voltage io controls mapping table */16 #include "npcx9/npcx9-lvol-ctrl-map.dtsi"24 cpu-power-states = <&suspend_to_idle0 &suspend_to_idle1>;27 power-states {[all …]
4 * SPDX-License-Identifier: Apache-2.08 #include "npcx4/npcx4-alts-map.dtsi"9 /* npcx4 series mapping table between MIWU wui bits and source device */10 #include "npcx4/npcx4-miwus-wui-map.dtsi"12 #include "npcx4/npcx4-miwus-int-map.dtsi"14 #include "npcx4/npcx4-espi-vws-map.dtsi"15 /* npcx4 series low-voltage io controls mapping table */16 #include "npcx4/npcx4-lvol-ctrl-map.dtsi"18 #include "zephyr/dt-bindings/reset/npcx4_reset.h"26 cpu-power-states = <&suspend_to_idle0>;[all …]
4 * SPDX-License-Identifier: Apache-2.025 BUILD_ASSERT(DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) == 1, "Invalid number of NPCX SHI peripherals");32 #define HAL_INSTANCE(dev) (struct shi_reg *)(((const struct shi_npcx_config *)(dev)->config)->base)46 * Timeout to wait for SHI request packet48 * This affects the slowest SPI clock we can support. A delay of 8192 us permits a 512-byte request50 * That's as slow as we would practically want to run the SHI interface, since running it slower62 * Space allocation of the past-end status byte (EC_SHI_PAST_END) in the out_msg buffer.73 * one last past-end byte at the end so any additional bytes clocked out by81 * overhead, as passed to the host command handler, must be 32-bit aligned.87 SHI_STATE_NONE = -1,[all …]
