Searched full:scg (Results 1 – 23 of 23) sorted by relevance
/Zephyr-latest/drivers/clock_control/ |
D | Kconfig.mcux_scg | 1 # MCUXpresso SDK SCG 8 bool "MCUX SCG driver" 12 Enable support for mcux scg driver. 15 bool "MCUX driver for K4 Generation SCG" 19 Enable support for SCG K4 driver
|
D | clock_control_mcux_scg.c | 140 #error Unsupported SCG clkout clock source in mcux_scg_init()
|
/Zephyr-latest/soc/nxp/kinetis/ke1xf/ |
D | soc.c | 36 "Invalid SCG slow clock divider value"); 38 "Invalid SCG bus clock divider value"); 42 "Invalid SCG core clock divider value"); 45 "Invalid SCG core clock divider value"); 60 #error Invalid SCG core clock source 67 "Invalid SCG SOSC divider 1 value"); 69 "Invalid SCG SOSC divider 2 value"); 82 "Invalid SCG SIRC divider 1 value"); 84 "Invalid SCG SIRC divider 2 value"); 94 #error Invalid SCG SIRC clock frequency [all …]
|
/Zephyr-latest/dts/arm/nxp/ |
D | nxp_mcxw71.dtsi | 144 scg: clock-controller@1e000 { label 145 compatible = "nxp,scg-k4"; 153 clocks = <&scg SCG_K4_SLOW_CLK 0x108>; 159 clocks = <&scg SCG_K4_SLOW_CLK 0x10c>; 165 clocks = <&scg SCG_K4_SLOW_CLK 0x110>; 171 clocks = <&scg SCG_K4_SLOW_CLK 0>; 178 clocks = <&scg SCG_K4_FIRC_CLK 0xe0>; 186 clocks = <&scg SCG_K4_FIRC_CLK 0xe4>; 197 clocks = <&scg SCG_K4_FIRC_CLK 0xe0>; 208 clocks = <&scg SCG_K4_FIRC_CLK 0xe4>; [all …]
|
D | nxp_ke17z512.dtsi | 52 clocks = <&scg KINETIS_SCG_BUS_CLK>; 61 clocks = <&scg KINETIS_SCG_BUS_CLK>;
|
D | nxp_ke1xf.dtsi | 127 scg: scg@40064000 { label 128 compatible = "nxp,kinetis-scg"; 280 clocks = <&scg KINETIS_SCG_BUS_CLK>; 310 clocks = <&scg KINETIS_SCG_BUS_CLK>; 408 clocks = <&scg KINETIS_SCG_BUS_CLK>; 419 clocks = <&scg KINETIS_SCG_BUS_CLK>; 577 clocks = <&scg KINETIS_SCG_BUS_CLK>; 585 clocks = <&scg KINETIS_SCG_BUS_CLK>; 593 clocks = <&scg KINETIS_SCG_BUS_CLK>;
|
D | nxp_ke1xz.dtsi | 74 scg: scg@40064000 { label 76 compatible = "nxp,kinetis-scg"; 378 clocks = <&scg KINETIS_SCG_BUS_CLK>; 420 clocks = <&scg KINETIS_SCG_BUS_CLK>;
|
/Zephyr-latest/dts/bindings/clock/ |
D | nxp,scg-k4.yaml | 4 description: NXP K4 Generation SCG (System Clock Generator) IP node 6 compatible: "nxp,scg-k4"
|
D | nxp,kinetis-scg.yaml | 4 description: NXP Kinetis SCG (System Clock Generator) IP node 6 compatible: "nxp,kinetis-scg"
|
/Zephyr-latest/include/zephyr/dt-bindings/clock/ |
D | kinetis_scg.h | 10 /* SCG system oscillator mode */ 15 /* SCG clock controller clock names */
|
/Zephyr-latest/soc/nxp/kinetis/ke1xz/ |
D | soc.c | 35 "Invalid SCG bus clock divider value"); 37 "Invalid SCG core clock divider value"); 51 "Invalid SCG SIRC divider 2 value"); 60 #error Invalid SCG SIRC clock frequency 66 "Invalid SCG FIRC divider 2 value"); 79 #error Invalid SCG FIRC clock frequency
|
/Zephyr-latest/tests/drivers/pwm/pwm_loopback/boards/ |
D | frdm_ke17z.overlay | 41 clocks = <&scg KINETIS_SCG_SIRC_CLK>; 56 &scg {
|
D | frdm_ke17z512.overlay | 41 clocks = <&scg KINETIS_SCG_SIRC_CLK>; 56 &scg {
|
/Zephyr-latest/drivers/timer/ |
D | rv32m1_lptmr_timer.c | 81 if ((SCG->SIRCCSR & SCG_SIRCCSR_SIRCEN_MASK) == SCG_SIRCCSR_SIRCEN(0)) { in sys_clock_driver_init() 104 sircdiv = SCG->SIRCDIV; in sys_clock_driver_init() 107 SCG->SIRCDIV = sircdiv; in sys_clock_driver_init() 135 if ((SCG->SIRCCFG & SCG_SIRCCFG_RANGE_MASK) != SIRC_RANGE_8MHZ) { in sys_clock_driver_init()
|
/Zephyr-latest/dts/bindings/can/ |
D | nxp,flexcan.yaml | 14 clocks = <&scg KINETIS_SCG_BUS_CLK>;
|
/Zephyr-latest/boards/nxp/frdm_ke17z512/ |
D | frdm_ke17z512.dts | 117 &scg { 148 clocks = <&scg KINETIS_SCG_SIRC_CLK>;
|
/Zephyr-latest/dts/bindings/comparator/ |
D | nxp,kinetis-acmp.yaml | 14 clocks = <&scg KINETIS_SCG_BUS_CLK>;
|
/Zephyr-latest/boards/nxp/frdm_ke17z/ |
D | frdm_ke17z.dts | 131 clocks = <&scg KINETIS_SCG_SIRC_CLK>;
|
/Zephyr-latest/modules/ |
D | Kconfig.mcux | 207 Set if the system clock generator (SCG) module is present in the
|
/Zephyr-latest/boards/nxp/frdm_mcxn236/ |
D | board.c | 66 /* Enable SCG clock */ in frdm_mcxn236_init()
|
/Zephyr-latest/boards/nxp/twr_ke18f/ |
D | twr_ke18f.dts | 157 &scg {
|
/Zephyr-latest/boards/nxp/frdm_mcxn947/ |
D | board.c | 91 /* Enable SCG clock */ in frdm_mcxn947_init()
|
/Zephyr-latest/doc/releases/ |
D | release-notes-2.0.rst | 196 * Added NXP Kinetis MCG, SCG, and PCC drivers
|