Searched +full:pwm +full:- +full:mode (Results 1 – 25 of 318) sorted by relevance
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| /Zephyr-latest/dts/bindings/pwm/ |
| D | nxp,s32-emios-pwm.yaml | 2 # SPDX-License-Identifier: Apache-2.0
5 NXP S32 eMIOS PWM node for S32 SoCs. Each channel in eMIOS can be configured
6 to use for PWM operation. There are several PWM modes supported by this module,
11 - Channel 0 for mode OPWFMB
12 - Channel 1 for mode OPWMB
13 - Channel 2 for mode OPWMCB with deadtime inserted at leading edge
14 - Channel 3 for mode SAIC, use internal timebase with input filter = 2 eMIOS clock
16 emios0_pwm: pwm {
19 pwm-mode = "OPWFMB";
22 duty-cycle = <32768>;
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| D | nxp,flexio-pwm.yaml | 2 # SPDX-License-Identifier: Apache-2.0
4 description: NXP Flexio PWM controller.
5 Each flexio timer can be used for generating one pwm pulse.
6 The two PWM modes supported by flexio are chosen based on the selected polarity -
7 Dual 8-bit counters PWM mode and Dual 8-bit counters PWM Low mode.
9 compatible: "nxp,flexio-pwm"
11 include: [pwm-controller.yaml, pinctrl-device.yaml, base.yaml]
14 pinctrl-0:
17 pinctrl-names:
20 "#pwm-cells":
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| D | nxp,imx-pwm.yaml | 2 # SPDX-License-Identifier: Apache-2.0
4 description: NXP MCUX PWM
6 compatible: "nxp,imx-pwm"
8 include: [pwm-controller.yaml, pinctrl-device.yaml, base.yaml]
19 run-in-wait:
22 Enable for PWM to keep running in WAIT mode.
24 run-in-debug:
27 Enable for PWM to keep running in debug mode.
34 Clock prescaler at the input of the PWM.
39 - "immediate"
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| D | st,stm32-pwm.yaml | 1 description: STM32 PWM
3 compatible: "st,stm32-pwm"
5 include: [pwm-controller.yaml, base.yaml, pinctrl-device.yaml]
8 pinctrl-0:
11 pinctrl-names:
14 four-channel-capture-support:
19 interrupt instead of slave-mode controller. This option can also
20 be used as alternative for timers that does not support slave mode.
22 "#pwm-cells":
25 Number of items to expect in a PWM
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| D | nordic,nrf-pwm.yaml | 1 description: nRF PWM
3 compatible: "nordic,nrf-pwm"
5 include: [pwm-controller.yaml, base.yaml, pinctrl-device.yaml, memory-region.yaml]
11 pinctrl-0:
14 pinctrl-names:
17 center-aligned:
19 description: Set this to use center-aligned (up and down) counter mode.
21 "#pwm-cells":
24 pwm-cells:
25 - channel
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| D | atmel,sam0-tcc-pwm.yaml | 2 # SPDX-License-Identifier: Apache-2.0
4 description: Atmel SAM0 TCC in PWM mode
6 compatible: "atmel,sam0-tcc-pwm"
9 - name: base.yaml
10 - name: pwm-controller.yaml
11 - name: pinctrl-device.yaml
23 clock-names:
31 - 2
32 - 3
33 - 4
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| D | atmel,sam0-tc-pwm.yaml | 2 # SPDX-License-Identifier: Apache-2.0
4 description: Atmel SAM0 TC in PWM mode
6 compatible: "atmel,sam0-tc-pwm"
9 - name: base.yaml
10 - name: pwm-controller.yaml
11 - name: pinctrl-device.yaml
23 clock-names:
31 - 2
33 counter-size:
38 - 8
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| /Zephyr-latest/boards/nxp/mr_canhubk3/ |
| D | mr_canhubk3.dts | 4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <zephyr/dt-bindings/input/input-event-codes.h>
12 #include <dt-bindings/pwm/pwm.h>
13 #include "mr_canhubk3-pinctrl.dtsi"
14 #include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>
17 model = "NXP MR-CANHUBK3";
25 zephyr,code-partition = &code_partition;
27 zephyr,shell-uart = &lpuart2;
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| /Zephyr-latest/drivers/pwm/ |
| D | pwm_ite_it8xxx2.c | 4 * SPDX-License-Identifier: Apache-2.0
10 #include <zephyr/drivers/pwm.h>
12 #include <zephyr/dt-bindings/pwm/it8xxx2_pwm.h>
28 /* PWM channel duty cycle register */
30 /* PWM channel clock source selection register */
32 /* PWM channel clock source gating register */
34 /* PWM channel output polarity register */
36 /* PWM channel */
38 /* PWM prescaler control register base */
40 /* Select PWM prescaler that output to PWM channel */
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| D | pwm_mchp_xec_bbled.c | 4 * SPDX-License-Identifier: Apache-2.0
14 #include <zephyr/drivers/pwm.h>
33 /* Hardware blink mode equation is Fpwm = Fin / (256 * (LD + 1))
45 /* BBLED PWM mode uses the duty cycle to set the PWM frequency:
51 * Puse_OFF_width = (1/Fpwm) * (256 - duty_cycle) seconds
52 * where duty_cycle is an 8-bit value 0 to 255.
53 * Prescale is derived from DELAY register LOW_DELAY 12-bit field
54 * Duty cycle is derived from LIMITS register MINIMUM 8-bit field
61 * BBLED PWM mode duty cycle specified by 8-bit MIN field of the LIMITS register
140 * DELAY.LO = pre-scaler = [0, 4095]
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| D | pwm_npcx.c | 4 * SPDX-License-Identifier: Apache-2.0
10 #include <zephyr/drivers/pwm.h>
11 #include <zephyr/dt-bindings/clock/npcx_clock.h>
20 /* 16-bit period cycles/prescaler in NPCX PWM modules */
24 /* PWM clock sources */
30 /* PWM heart-beat mode selection */
38 /* pwm controller base address */
48 /* PWM cycles per second */
52 /* PWM local functions */
55 const struct pwm_npcx_config *config = dev->config; in pwm_npcx_configure()
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| D | pwm_rcar.c | 4 * SPDX-License-Identifier: Apache-2.0
15 #include <zephyr/drivers/pwm.h>
23 /* PWM Controller capabilities */
31 ((uint32_t)((channel * RCAR_PWM_REG_SHIFT)) + 0x00) /* PWM Control Register */
33 ((uint32_t)((channel * RCAR_PWM_REG_SHIFT)) + 0x04) /* PWM Count Register */
35 /* PWMCR (PWM Control Register) */
38 #define RCAR_PWM_CR_CCMD BIT(15) /* Frequency Division Mode */
43 /* PWM Diviser is on 5 bits (CC combined with CCMD) */
47 /* PWMCNT (PWM Count Register) */
48 #define RCAR_PWM_CNT_CYC_MASK 0x03ff0000 /* PWM Cycle */
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| D | pwm_mcux.c | 4 * SPDX-License-Identifier: Apache-2.0
10 #include <zephyr/drivers/pwm.h>
30 pwm_mode_t mode; member
46 const struct pwm_mcux_config *config = dev->config; in mcux_pwm_set_cycles_internal()
47 struct pwm_mcux_data *data = dev->data; in mcux_pwm_set_cycles_internal()
56 if (period_cycles != data->period_cycles[channel] in mcux_pwm_set_cycles_internal()
57 || level != data->channel[channel].level) { in mcux_pwm_set_cycles_internal()
61 data->period_cycles[channel] = period_cycles; in mcux_pwm_set_cycles_internal()
63 if (clock_control_get_rate(config->clock_dev, config->clock_subsys, in mcux_pwm_set_cycles_internal()
65 return -EINVAL; in mcux_pwm_set_cycles_internal()
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| D | pwm_stm32.c | 6 * SPDX-License-Identifier: Apache-2.0
16 #include <zephyr/drivers/pwm.h>
24 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
31 /* L0 series MCUs only have 16-bit timers and don't have below macro defined */
39 * @brief Capture state when in 4-channel support mode
69 /* When PWM capture is done by resetting the counter with UIF then the
71 * This is not the case when using four-channel-support.
77 /** PWM data. */
88 /** PWM configuration. */
183 * Obtain LL polarity from PWM flags.
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| /Zephyr-latest/tests/drivers/pwm/pwm_loopback/boards/ |
| D | mr_canhubk3.overlay | 4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/pwm/pwm.h>
11 compatible = "test-pwm-loopback";
22 input-enable;
28 emios0_pwm: pwm {
29 pinctrl-0 = <&emios0_default>;
30 pinctrl-names = "default";
34 /delete-property/ period;
35 /delete-property/ polarity;
36 /delete-property/ duty-cycle;
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| /Zephyr-latest/drivers/display/ |
| D | display_otm8009a.h | 5 * SPDX-License-Identifier: Apache-2.0
25 /** Time to wait after exiting sleep mode (ms), ref. 5.2.11. */
89 /** Panel Driving Mode */
91 /** Oscillator Adjustment for Idle/Normal mode */
93 /** RGB Video Mode Setting */
101 /** Power Control Setting 2 for Normal Mode */
105 /** PWM Parameter 1 */
107 /** PWM Parameter 2 */
109 /** PWM Parameter 3 */
111 /** PWM Parameter 4 */
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| /Zephyr-latest/boards/nordic/nrf5340_audio_dk/ |
| D | nrf5340_audio_dk_nrf5340_cpuapp_common.dtsi | 2 * Copyright (c) 2020-2022 Nordic Semiconductor ASA
4 * SPDX-License-Identifier: Apache-2.0
6 #include "nrf5340_audio_dk_nrf5340_cpuapp_common-pinctrl.dtsi"
7 #include <zephyr/dt-bindings/sensor/ina230.h>
12 zephyr,shell-uart = &uart0;
13 zephyr,uart-mcumgr = &uart0;
14 zephyr,bt-mon-uart = &uart0;
15 zephyr,bt-c2h-uart = &uart0;
16 zephyr,bt-hci = &bt_hci_ipc0;
20 gpio_fwd: nrf-gpio-forwarder {
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| /Zephyr-latest/include/zephyr/drivers/pwm/ |
| D | max31790.h | 4 * SPDX-License-Identifier: Apache-2.0
11 * @name custom PWM flags for MAX31790
12 * These flags can be used with the PWM API in the upper 8 bits of pwm_flags_t
13 * They allow the usage of the RPM mode, which will cause the MAX31790 to
26 * @brief RPM mode
28 * Activating the RPM mode will cause the parameter pulse of @ref pwm_set_cycles
49 * @brief PWM rate of change
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| /Zephyr-latest/include/zephyr/dt-bindings/regulator/ |
| D | adp5360.h | 4 * SPDX-License-Identifier: Apache-2.0
20 /** Hysteresis mode */
22 /** PWM mode */
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| D | npm1100.h | 4 * SPDX-License-Identifier: Apache-2.0
20 /** Automatic mode */
22 /** PWM mode */
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| D | npm6001.h | 4 * SPDX-License-Identifier: Apache-2.0
20 /** Hysteretic mode */
22 /** PWM mode */
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| /Zephyr-latest/samples/drivers/led/pwm/boards/ |
| D | mec15xxevb_assy6853.overlay | 4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/pwm/pwm.h>
10 * BBLED controller 0 uses GPIO156/LED0 connected to JP31-13
11 * BBLED controller 1 uses GPIO157/LED1 connected to JP31-15
12 * BBLED controller 2 uses GPIO153/LED2 connected to JP31-17
15 * and implements duty cycle for blink mode as an 8-bit value where 0 is off and
16 * 255 full on. BBLED PWM is 8-bit.
17 * BBLED-PWM driver get cycles API reports 32KHz/256 or 48M/256.
18 * Due to all the above we use 50 ms for DT PWM period.
24 compatible = "pwm-leds";
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| D | mec172xevb_assy6906.overlay | 4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/pwm/pwm.h>
10 * BBLED controller 0 uses GPIO156/LED1 connected to JP71-11
11 * BBLED controller 1 uses GPIO157/LED2 connected to JP71-13
12 * BBLED controller 2 uses GPIO153/LED3 connected to JP71-5
13 * BBLED controller 3 uses GPIO035/PWM8 connected to JP67-19
17 * and implements duty cycle for blink mode as an 8-bit value where 0 is off and
18 * 255 full on. BBLED PWM is 8-bit.
19 * BBLED-PWM driver get cycles API reports 32KHz/256 or 48M/256.
20 * Due to all the above we use 50 ms for DT PWM period.
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| /Zephyr-latest/dts/bindings/stepper/adi/ |
| D | adi,trinamic-ramp-generator.yaml | 1 # SPDX-FileCopyrightText: Copyright (c) 2024 Carl Zeiss Meditec AG
2 # SPDX-License-Identifier: Apache-2.0
4 description: Ramp Generator Motion Control Register-Set for Trinamic stepper controller.
37 for velocity mode.
44 This is the target velocity in velocity mode. It can be changed any time during a motion.
58 Attention: Do not set 0 in positioning mode,
69 Attention: Do not set 0 in positioning mode,
78 seconds. This setting avoids excess acceleration e.g. from VSTOP to -VSTART.
84 Hold current in % of run current (0-100)
86 In combination with StealthChop mode, setting IHOLD=0 allows to choose freewheeling or coil
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| /Zephyr-latest/dts/arm/nxp/ |
| D | nxp_mcxa156.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv8-m.dtsi>
9 #include <zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h>
10 #include <zephyr/dt-bindings/gpio/gpio.h>
11 #include <zephyr/dt-bindings/i2c/i2c.h>
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-m33f";
21 #address-cells = <1>;
22 #size-cells = <1>;
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