| /Zephyr-latest/soc/intel/intel_adsp/ace/ |
| D | _soc_inthandlers.h | 2 * SPDX-License-Identifier: Apache-2.0
13 * level will invoke an error handler.
16 #include <xtensa/config/core-isa.h>
21 #error core-isa.h interrupt level does not match dispatcher!
24 #error core-isa.h interrupt level does not match dispatcher!
27 #error core-isa.h interrupt level does not match dispatcher!
30 #error core-isa.h interrupt level does not match dispatcher!
33 #error core-isa.h interrupt level does not match dispatcher!
36 #error core-isa.h interrupt level does not match dispatcher!
39 #error core-isa.h interrupt level does not match dispatcher!
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| /Zephyr-latest/arch/x86/ |
| D | gen_idt.py | 5 # SPDX-License-Identifier: Apache-2.0
14 which is a link of the Zephyr kernel without various build-time
27 3. An array which maps configured IRQ lines to their associated
46 # These exception vectors push an error code onto the stack.
56 def error(text): function
66 gate_type = 0xE # 32-bit interrupt gate
79 gate_type = 0x5 # 32-bit task gate
90 error("entry specifies both handler function and tss")
93 error("entry does not specify either handler or tss")
118 def update_irq_vec_map(irq_vec_map, irq, vector, max_irq): argument
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| /Zephyr-latest/scripts/build/ |
| D | gen_isr_tables_parser_carrays.py | 7 # SPDX-License-Identifier: Apache-2.0
14 /* AUTO-GENERATED by gen_isr_tables.py, do not edit! */
26 #error "ARCH_IRQ_VECTOR_JUMP_CODE not defined"
35 - intlist_data: The binnary data from intlist section
36 - config: The configuration object
37 - log: The logging object, has to have error and debug methods
50 uint32_t num_vectors; <- typically CONFIG_NUM_IRQS
51 struct _isr_list isrs[]; <- Usually of smaller size than num_vectors
58 /** IRQ line number */
59 int32_t irq;
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| D | gen_isr_tables_parser_local.py | 7 # SPDX-License-Identifier: Apache-2.0
14 /* AUTO-GENERATED by gen_isr_tables.py, do not edit! */
48 - intlist_data: The binnary data from intlist section
49 - config: The configuration object
50 - log: The logging object, has to have error and debug methods
65 uint32_t num_vectors; <- typically CONFIG_NUM_IRQS
66 uint8_t stream[]; <- the stream with the interrupt data
72 /** IRQ line number */
73 int32_t irq;
74 /** Flags for this IRQ, see ISR_FLAG_* definitions */
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| /Zephyr-latest/dts/bindings/dma/ |
| D | nxp,mcux-edma.yaml | 2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "nxp,mcux-edma"
8 include: dma-controller.yaml
20 dma-channels:
23 dma-requests:
26 dmamux-reg-offset:
33 channel-gap:
47 irq-shared-offset:
54 no-error-irq:
57 If the SoCs don't have a separate interrupt id for error IRQ.
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| /Zephyr-latest/tests/arch/arm/arm_no_multithreading/src/ |
| D | main.c | 4 * SPDX-License-Identifier: Apache-2.0
14 #error test can only run on Cortex-M MCUs
19 * For ARMv8.1-M, the FPSCR[18:16] LTPSIZE field may always read 0b010 if MVE
41 printk("Caught system error -- reason %d\n", reason); in k_sys_fatal_error_handler()
43 if (expected_reason == -1) { in k_sys_fatal_error_handler()
54 expected_reason = -1; in k_sys_fatal_error_handler()
59 printk("ARM no-multithreading test\n"); in test_main()
68 "PSP out of bounds: 0x%x (0x%x - 0x%x)", in test_main()
90 /* Verify activating the PendSV IRQ triggers a K_ERR_SPURIOUS_IRQ */ in test_main()
92 SCB->ICSR |= SCB_ICSR_PENDSVSET_Msk; in test_main()
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| /Zephyr-latest/arch/arm/core/cortex_m/ |
| D | irq_manage.c | 2 * Copyright (c) 2013-2014 Wind River Systems, Inc.
4 * SPDX-License-Identifier: Apache-2.0
9 * @brief ARM Cortex-M interrupt management
25 #include <zephyr/irq.h>
32 #define REG_FROM_IRQ(irq) (irq / NUM_IRQS_PER_REG) argument
33 #define BIT_FROM_IRQ(irq) (irq % NUM_IRQS_PER_REG) argument
37 void arch_irq_enable(unsigned int irq) in arch_irq_enable() argument
39 NVIC_EnableIRQ((IRQn_Type)irq); in arch_irq_enable()
42 void arch_irq_disable(unsigned int irq) in arch_irq_disable() argument
44 NVIC_DisableIRQ((IRQn_Type)irq); in arch_irq_disable()
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| /Zephyr-latest/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/ |
| D | swi.h | 4 * SPDX-License-Identifier: Apache-2.0
7 /* nRF51 and nRF52 Series IRQ mapping*/
22 /* nRF53 Series IRQ mapping */
25 /* nRF53 Series Engineering D and Revision 1 IRQ mapping */
41 #error Unknown NRF5340 CPU.
44 /* nRF54 Series IRQ mapping */
68 /* No platform-specific initialization required. */ in hal_swi_init()
|
| /Zephyr-latest/drivers/interrupt_controller/ |
| D | intc_nxp_pint.c | 4 * SPDX-License-Identifier: Apache-2.0
7 /* Based on STM32 EXTI driver, which is (c) 2016 Open-RnD Sp. z o.o. */
10 #include <zephyr/irq.h>
21 /* Describes configuration of PINT IRQ slot */
27 uint8_t irq; member
32 /* Tracks IRQ configuration for each pint interrupt source */
40 /* Attaches pin to PINT IRQ slot using INPUTMUX */
45 /* Three parameters here- INPUTMUX base, the ID of the PINT slot, in attach_pin_to_pint()
61 * 0-64, corresponding to GPIO0 pin 1 - GPIO1 pin 31)
64 * @return 0 on success, or negative value on error
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| /Zephyr-latest/tests/arch/arm/arm_no_multithreading/ |
| D | README.txt | 1 Title: Test to verify the no multithreading use-case (ARM Only)
7 ARM Cortex-M targets. In detail the test verifies that
8 - system boots to main()
9 - PSP points to the main stack
10 - PSPLIM is set to the main stack base (if applicable)
11 - FPU state is reset (if applicable)
12 - Interrupts are enabled when switching to main()
13 - Interrupts may be registered and serviced
14 - Activating PendSV triggers a Reserved Exception error
16 ---------------------------------------------------------------------------
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| /Zephyr-latest/samples/bluetooth/hci_spi/src/ |
| D | main.c | 4 * Copyright (c) 2015-2016 Intel Corporation
6 * SPDX-License-Identifier: Apache-2.0
73 * "zephyr,bt-hci-spi-slave". There should just be one in the
84 * the SPI-based BT controller.
93 * configured in the 'irq-gpios' property in HCI_SPI_NODE.
95 static const struct gpio_dt_spec irq = GPIO_DT_SPEC_GET(HCI_SPI_NODE, irq_gpios); variable
110 LOG_DBG("buf %p type %u len %u", buf, bt_buf_get_type(buf), buf->len); in spi_send()
122 return -EINVAL; in spi_send()
125 if (buf->len > SPI_MAX_MSG_LEN) { in spi_send()
128 return -EINVAL; in spi_send()
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| /Zephyr-latest/doc/hardware/peripherals/edac/ |
| D | ibecc.rst | 3 In Band Error Correction Code (IBECC)
12 The In-Band Error Correction Code (IBECC) improves reliability by providing
13 error detection and correction. IBECC can work for all or for specific regions
15 not support the out-of-band ECC.
22 There is a debug feature IBECC Error Injection which helps to debug and verify
44 Due to high security risk Error Injection capability should not be enabled for
45 production. Error Injection is only enabled for tests.
52 * Error Address
54 * Error Syndrome
56 * Error Type
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| /Zephyr-latest/arch/common/ |
| D | isr_tables.c | 4 * SPDX-License-Identifier: Apache-2.0
53 /* When both the IRQ vector table and the software ISR table are used, populate
54 * the IRQ vector table with the common software ISR by default, such that all
56 * otherwise, populate the IRQ vector table with z_irq_spurious so that all
57 * un-connected IRQ vectors end up in the spurious IRQ handler.
69 #error "ARCH_IRQ_VECTOR_JUMP_CODE not defined"
74 /* The IRQ vector table contains the jump opcodes towards the vector routine */
80 /* The IRQ vector table is an array of vector addresses */
82 [0 ...(IRQ_TABLE_SIZE - 1)] = (uintptr_t)&IRQ_VECTOR_TABLE_DEFAULT_ISR,
87 /* If there are no interrupts at all, or all interrupts are of the 'direct'
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| /Zephyr-latest/drivers/spi/ |
| D | spi_dw.c | 6 * SPDX-License-Identifier: Apache-2.0
11 /* spi_dw.c - Designware SPI driver implementation */
35 #include <zephyr/irq.h>
47 spi_context_is_slave(&spi->ctx)); in spi_dw_is_slave()
50 static void completed(const struct device *dev, int error) in completed() argument
52 struct spi_dw_data *spi = dev->data; in completed()
53 struct spi_context *ctx = &spi->ctx; in completed()
55 if (error) { in completed()
59 if (spi_context_tx_on(&spi->ctx) || in completed()
60 spi_context_rx_on(&spi->ctx)) { in completed()
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| /Zephyr-latest/doc/kernel/services/ |
| D | interrupts.rst | 24 * An **interrupt request (IRQ) signal** that triggers the ISR.
25 * A **priority level** associated with the IRQ.
31 Only a single ISR can be associated with a specific IRQ at any given time.
40 generates a fatal system error if an unexpected interrupt is signaled.
43 in mid-execution if a higher priority interrupt is signaled. The lower
62 Multi-level Interrupt Handling
65 A hardware platform can support more interrupt lines than natively-provided
75 A unique 32-bit interrupt number is assigned with information
77 Service Routine (ISR). Each interrupt level is given a byte within this 32-bit
81 .. code-block:: none
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| /Zephyr-latest/include/zephyr/arch/ |
| D | arch_interface.h | 4 * SPDX-License-Identifier: Apache-2.0
8 * @defgroup arch-interface Architecture Interface
13 * call architecture-specific API so will have the prototypes for the
14 * architecture-specific APIs here. Architecture APIs that aren't used in this
17 * The set of architecture-specific APIs used internally by public macros and
53 * @defgroup arch-timing Architecture timing APIs
54 * @ingroup arch-interface
82 * through the full 64 bit space, wrapping at 2^64-1. Hardware with
92 * @addtogroup arch-threads
126 * buffer, defined as the area usable for thread stack context and thread-
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| /Zephyr-latest/drivers/serial/ |
| D | uart_native_tty.c | 14 * SPDX-License-Identifier: Apache-2.0
29 #define ERROR(...) nsi_print_error_and_exit(__VA_ARGS__) macro
43 /* Emulated tx irq is enabled. */
45 /* Emulated rx irq is enabled. */
47 /* IRQ callback */
49 /* IRQ callback data */
77 bottom_cfg->baudrate = cfg->baudrate; in native_tty_conv_to_bottom_cfg()
79 switch (cfg->parity) { in native_tty_conv_to_bottom_cfg()
81 bottom_cfg->parity = NTB_PARITY_NONE; in native_tty_conv_to_bottom_cfg()
84 bottom_cfg->parity = NTB_PARITY_ODD; in native_tty_conv_to_bottom_cfg()
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| /Zephyr-latest/samples/drivers/uart/passthrough/src/ |
| D | main.c | 4 * SPDX-License-Identifier: Apache-2.0
62 while (uart_irq_update(patch->rx_dev) > 0) { in uart_cb()
63 ret = uart_irq_rx_ready(patch->rx_dev); in uart_cb()
65 patch->rx_error = true; in uart_cb()
71 len = ring_buf_put_claim(patch->rx_ring_buf, &buf, RING_BUF_SIZE); in uart_cb()
73 /* no space for Rx, disable the IRQ */ in uart_cb()
74 uart_irq_rx_disable(patch->rx_dev); in uart_cb()
75 patch->rx_overflow = true; in uart_cb()
79 ret = uart_fifo_read(patch->rx_dev, buf, len); in uart_cb()
81 patch->rx_error = true; in uart_cb()
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| /Zephyr-latest/lib/acpi/ |
| D | acpi.c | 4 * SPDX-License-Identifier: Apache-2.0
39 return -EIO; in check_init_status()
152 LOG_ERR("No ACPI node with given name: %s", bus_name); in acpi_evaluate_method()
156 if (handle->Type != ACPI_TYPE_DEVICE) { in acpi_evaluate_method()
157 LOG_ERR("No ACPI node foud with given name: %s", bus_name); in acpi_evaluate_method()
166 LOG_ERR("No entry for the ACPI node with given name: %s", bus_name); in acpi_evaluate_method()
188 LOG_WRN("error While executing \\_pic method: %d", status); in acpi_enable_pic_mode()
219 if (!(dev_info->Valid & ACPI_VALID_HID)) { in dev_resource_enum_callback()
224 child_dev->handle = obj_handle; in dev_resource_enum_callback()
225 child_dev->dev_info = dev_info; in dev_resource_enum_callback()
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| D | acpi_shell.c | 4 * SPDX-License-Identifier: Apache-2.0
23 if (!res->Length) { in dump_dev_res()
24 shell_error(sh, "Error: zero length found!"); in dump_dev_res()
28 switch (res->Type) { in dump_dev_res()
31 ACPI_RESOURCE_IRQ *irq_res = &res->Data.Irq; in dump_dev_res()
33 shell_print(sh, "\tDescriptorLength: %x", irq_res->DescriptorLength); in dump_dev_res()
34 shell_print(sh, "\tTriggering: %x", irq_res->Triggering); in dump_dev_res()
35 shell_print(sh, "\tPolarity: %x", irq_res->Polarity); in dump_dev_res()
36 shell_print(sh, "\tShareable: %x", irq_res->Shareable); in dump_dev_res()
37 shell_print(sh, "\tInterruptCount: %d", irq_res->InterruptCount); in dump_dev_res()
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| /Zephyr-latest/drivers/dma/ |
| D | dma_xilinx_axi_dma.c | 7 * SPDX-License-Identifier: Apache-2.0
13 #include <zephyr/irq.h>
36 /* decode error, i.e., DECERR on AXI bus from memory */
38 /* slave error, i.e., SLVERR on AXI bus from memory */
40 /* internal DMA error, e.g., 0-length transfer */
59 /* interrupt timeout - trigger interrupt after X cycles when no transfer. Unit is 125 * */
62 /* irqthreshold - this can be used to generate interrupts after X completed packets */
66 /* interrupt on error enable */
84 /* run-stop */
93 /* current interrupt was generated on error */
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| /Zephyr-latest/arch/riscv/core/ |
| D | ipi_clint.c | 4 * SPDX-License-Identifier: Apache-2.0
14 #error "Label 'clint' is not defined in the devicetree."
26 unsigned int id = _current_cpu->id; in arch_sched_directed_ipi()
53 atomic_val_t pending_ipi = atomic_clear(&cpu_pending_ipi[_current_cpu->id]); in sched_ipi_handler()
65 * No need to re-enable IRQs here as long as in sched_ipi_handler()
74 * Make sure there is no pending FPU flush request for this CPU while
82 atomic_val_t *pending_ipi = &cpu_pending_ipi[_current_cpu->id]; in arch_spin_relax()
86 * We may not be in IRQ context here hence cannot use in arch_spin_relax()
89 arch_float_disable(_current_cpu->arch.fpu_owner); in arch_spin_relax()
|
| /Zephyr-latest/include/zephyr/drivers/ |
| D | uart.h | 2 * Copyright (c) 2018-2019 Nordic Semiconductor ASA
5 * SPDX-License-Identifier: Apache-2.0
49 /** @brief Overrun error */
51 /** @brief Parity error */
53 /** @brief Framing error */
64 * @brief Collision error
66 * This error is raised when transmitted data does not match
69 * RS-485 half-duplex. This error is only valid on UARTs that
73 /** @brief Noise error */
79 UART_CFG_PARITY_NONE, /**< No parity */
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| /Zephyr-latest/tests/kernel/context/src/ |
| D | main.c | 2 * Copyright (c) 2012-2015 Wind River Systems, Inc.
4 * SPDX-License-Identifier: Apache-2.0
42 #define UNKNOWN_COMMAND -1
43 #define INVALID_BEHAVIOUR -2
46 * Get the timer type dependent IRQ number. If timer type
47 * is not defined in platform, generate an error
54 * The Cortex-M use the SYSTICK exception for the system timer, which is
55 * not considered an IRQ by the irq_enable/Disable APIs.
75 /* Cortex-M1 and Nios II do have a power saving instruction, so k_cpu_idle()
86 int error; /* error value (if any) */ member
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| /Zephyr-latest/drivers/timer/ |
| D | rv32m1_lptmr_timer.c | 4 * SPDX-License-Identifier: Apache-2.0
14 #include <zephyr/irq.h>
21 * - system clock based on an LPTMR instance, clocked by SIRC output
22 * SIRCDIV3, prescaler divide-by-1, SIRC at 8MHz
23 * - no tickless
38 #error "system timer misconfiguration; unsupported clock rate"
56 SYSTEM_TIMER_INSTANCE->CSR |= LPTMR_CSR_TCF(1); /* Rearm timer. */ in lptmr_irq_handler()
63 return cycle_count + SYSTEM_TIMER_INSTANCE->CNR; in sys_clock_cycle_get_32()
81 if ((SCG->SIRCCSR & SCG_SIRCCSR_SIRCEN_MASK) == SCG_SIRCCSR_SIRCEN(0)) { in sys_clock_driver_init()
85 * This is incompatible with this driver, which is SIRC-based. in sys_clock_driver_init()
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