| /Zephyr-latest/tests/subsys/mem_mgmt/mem_attr_heap/boards/ |
| D | qemu_cortex_m3.overlay | 2 #include <zephyr/dt-bindings/memory-attr/memory-attr.h>
3 #include <zephyr/dt-bindings/memory-attr/memory-attr-sw.h>
6 mem_cache: memory@20008000 {
7 compatible = "zephyr,memory-region", "mmio-sram";
9 zephyr,memory-region = "MEM_CACHEABLE";
10 zephyr,memory-attr = <( DT_MEM_CACHEABLE )>;
13 mem_cache_sw: memory@20009000 {
14 compatible = "zephyr,memory-region", "mmio-sram";
16 zephyr,memory-region = "MEM_CACHEABLE_SW";
17 zephyr,memory-attr = <( DT_MEM_CACHEABLE | DT_MEM_SW_ALLOC_CACHE )>;
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| /Zephyr-latest/tests/lib/devicetree/memory_region_flags/ |
| D | app.overlay | 7 #address-cells = < 0x1 >;
8 #size-cells = < 0x1 >;
11 compatible = "zephyr,memory-region";
13 zephyr,memory-region = "TEST_REGION_R";
14 zephyr,memory-region-flags = "r";
18 compatible = "zephyr,memory-region";
20 zephyr,memory-region = "TEST_REGION_NRWXAIL";
21 zephyr,memory-region-flags = "!rwxail";
25 compatible = "zephyr,memory-region";
27 zephyr,memory-region = "TEST_REGION_NO_FLAGS";
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| /Zephyr-latest/tests/subsys/mem_mgmt/mem_attr_heap/src/ |
| D | main.c | 4 * SPDX-License-Identifier: Apache-2.0
10 #include <zephyr/dt-bindings/memory-attr/memory-attr-sw.h>
21 const struct mem_attr_region_t *region; in ZTEST() local
35 zassert_equal(-EALREADY, ret, "Second init should be failing"); in ZTEST()
38 * Allocate 0x100 bytes of cacheable memory. in ZTEST()
41 zassert_not_null(block, "Failed to allocate memory"); in ZTEST()
44 * Check that the just allocated memory was allocated from the correct in ZTEST()
45 * memory region. in ZTEST()
47 region = mem_attr_heap_get_region(block); in ZTEST()
48 zassert_equal(region->dt_addr, ADDR_MEM_CACHE_SW, in ZTEST()
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| /Zephyr-latest/include/zephyr/linker/ |
| D | devicetree_regions.h | 5 * SPDX-License-Identifier: Apache-2.0
7 * Generate memory regions from devicetree nodes.
18 * @brief Get the linker memory-region name in a token form
20 * This attempts to use the zephyr,memory-region property (with
21 * non-alphanumeric characters replaced with underscores) returning a token.
28 * sram1: memory@2000000 {
29 * zephyr,memory-region = "MY_NAME";
31 * sram2: memory@2001000 {
32 * zephyr,memory-region = "MY@OTHER@NAME";
46 * @return the name of the memory memory region the node will generate
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| /Zephyr-latest/tests/lib/shared_multi_heap/boards/ |
| D | mps2_an521_cpu0.overlay | 4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/memory-attr/memory-attr.h>
8 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
11 /delete-node/ memory@38000000;
13 ssram2_3: memory@38000000 {
14 compatible = "zephyr,memory-region", "mmio-sram";
16 zephyr,memory-region = "SSRAM2_3";
19 res0: memory@38100000 {
20 compatible = "zephyr,memory-region", "mmio-sram";
22 zephyr,memory-region = "RES0";
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| D | qemu_cortex_a53.overlay | 4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/memory-attr/memory-attr.h>
8 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
12 res0: memory@42000000 {
13 compatible = "zephyr,memory-region", "mmio-sram";
15 zephyr,memory-region = "RES0";
16 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>;
19 res1: memory@43000000 {
20 compatible = "zephyr,memory-region", "mmio-sram";
22 zephyr,memory-region = "RES1";
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| /Zephyr-latest/dts/bindings/base/ |
| D | zephyr,memory-common.yaml | 2 # SPDX-License-Identifier: Apache-2.0
7 zephyr,memory-region:
11 memory region in the final executable. The region address and size
15 zephyr,memory-region-flags:
18 Set attributes such as read-only or executable for the linker script
19 memory region. The string set here will be specified in parentheses
22 zephyr,memory-region-mpu:
26 Signify that this node should result in a dedicated MPU region.
27 Deprecated in favor of 'zephyr,memory-attr'.
29 zephyr,memory-attr:
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| /Zephyr-latest/tests/lib/shared_multi_heap/src/ |
| D | main.c | 4 * SPDX-License-Identifier: Apache-2.0
9 #include <zephyr/linker/linker-defs.h>
11 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
22 struct shared_multi_heap_region region; member
28 .region = { \
41 static void smh_reg_map(struct shared_multi_heap_region *region) in smh_reg_map() argument
46 mem_attr = (region->attr == SMH_REG_ATTR_CACHEABLE) ? K_MEM_CACHE_WB : K_MEM_CACHE_NONE; in smh_reg_map()
49 k_mem_map_phys_bare(&v_addr, region->addr, region->size, mem_attr); in smh_reg_map()
51 region->addr = (uintptr_t) v_addr; in smh_reg_map()
56 * Given a virtual address retrieve the original memory region that the mapping
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| /Zephyr-latest/include/zephyr/mem_mgmt/ |
| D | mem_attr.h | 4 * SPDX-License-Identifier: Apache-2.0
11 * @brief Memory-Attr Interface
12 * @defgroup memory_attr_interface Memory-Attr Interface
19 #include <zephyr/dt-bindings/memory-attr/memory-attr.h>
38 * `zephyr,memory-attr`
41 * with the `zephyr,memory-attr` property. The macro is expanded once for each
51 * @brief memory-attr region structure.
53 * This structure represents the data gathered from DT about a memory-region
54 * marked with memory attributes.
57 /** Memory node full name */
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| /Zephyr-latest/include/zephyr/arch/xtensa/ |
| D | xtensa_mmu.h | 4 * SPDX-License-Identifier: Apache-2.0
13 * @defgroup xtensa_mmu_apis Xtensa Memory Management Unit (MMU) APIs
19 * @name Memory region permission and caching mode.
23 /** Memory region is executable. */
26 /** Memory region is writable. */
29 /** Memory region is both executable and writable */
32 /** Memory region has write-back cache. */
35 /** Memory region has write-through cache. */
43 * @name Memory domain and partitions
53 /* Read-Write access permission attributes */
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| /Zephyr-latest/dts/arm/st/h5/ |
| D | stm32h533Xe.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
10 sram1: memory@20000000 {
11 compatible = "zephyr,memory-region", "mmio-sram";
13 zephyr,memory-region = "SRAM1";
16 sram2: memory@20040000 {
17 compatible = "zephyr,memory-region", "mmio-sram";
19 zephyr,memory-region = "SRAM2";
22 sram3: memory@20050000 {
23 compatible = "zephyr,memory-region", "mmio-sram";
25 zephyr,memory-region = "SRAM3";
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| /Zephyr-latest/dts/bindings/reserved-memory/ |
| D | memory-region.yaml | 2 # SPDX-License-Identifier: Apache-2.0
4 # Memory region nodes may be referenced by other device nodes
5 # by adding a memory-region property to the device node.
8 memory-regions:
9 type: phandle-array
10 description: List of memory region phandles
12 memory-region-names:
13 type: string-array
14 description: A list of names, one for each corresponding phandle in memory-region
|
| D | nordic,owned-memory.yaml | 2 # SPDX-License-Identifier: Apache-2.0
5 Nordic Owned Memory
7 Memory region with permission attributes. Each enabled region of this kind
8 will be recorded in the UICR of the compiled domain. Memory ownership and
13 reserved-memory {
14 memory@2fc00000 {
15 compatible = "nordic,owned-memory";
23 A single local domain can request a memory region to be reserved on behalf of
24 multiple access owners. A single memory region shall be reserved by at most
26 the region defined above is enabled by Application on behalf of Radiocore,
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| /Zephyr-latest/include/zephyr/kernel/ |
| D | mm.h | 4 * SPDX-License-Identifier: Apache-2.0
19 * @brief Kernel Memory Management
20 * @defgroup kernel_memory_management Kernel Memory Management
36 /** Write-through caching. Used by certain drivers. */
39 /** Full write-back caching. Any RAM mapped wants this. */
48 #define K_MEM_CACHE_MASK (BIT(3) - 1)
53 * @name Region permission attributes.
55 * Default is read-only, no user, no exec
60 /** Region will have read/write access (and not read-only) */
63 /** Region will be executable (normally forbidden) */
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| /Zephyr-latest/soc/nordic/common/ |
| D | dmm.c | 3 * SPDX-License-Identifier: Apache-2.0
30 * stored in memory sections spanning over memory regions.
31 * These are used to determine memory left for dynamic bounce buffer allocator to work with.
46 const struct dmm_region *region; member
57 static struct dmm_heap *dmm_heap_find(void *region) in dmm_heap_find() argument
63 if (dh->region->dt_addr == (uintptr_t)region) { in dmm_heap_find()
71 static bool is_region_cacheable(const struct dmm_region *region) in is_region_cacheable() argument
73 return (IS_ENABLED(CONFIG_DCACHE) && (region->dt_attr & DT_MEM_CACHEABLE)); in is_region_cacheable()
83 const struct dmm_region *region) in is_user_buffer_correctly_preallocated() argument
87 if (!is_buffer_within_region(addr, user_length, region->dt_addr, region->dt_size)) { in is_user_buffer_correctly_preallocated()
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| /Zephyr-latest/samples/subsys/ipc/ipc_service/icmsg/boards/ |
| D | stm32h747i_disco_stm32h747xx_m7.overlay | 4 * SPDX-License-Identifier: Apache-2.0
9 /delete-property/ zephyr,ipc_shm;
12 /* Define new memory regions for TX and RX */
13 /delete-node/ memory@38000000;
15 sram_tx: memory@38000000 {
16 zephyr,memory-region = "SRAM_TX";
17 compatible = "zephyr,memory-region", "mmio-sram";
19 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) )>;
22 sram_rx: memory@38008000 {
23 zephyr,memory-region = "SRAM_RX";
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| /Zephyr-latest/samples/subsys/ipc/ipc_service/icmsg/remote/boards/ |
| D | stm32h747i_disco_stm32h747xx_m4.overlay | 4 * SPDX-License-Identifier: Apache-2.0
9 /delete-property/ zephyr,ipc_shm;
12 zephyr,shell-uart = &uart8;
15 /* Define new memory regions for TX and RX */
16 /delete-node/ memory@38000000;
18 sram_rx: memory@38000000 {
19 zephyr,memory-region = "SRAM_RX";
20 compatible = "zephyr,memory-region", "mmio-sram";
22 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) )>;
25 sram_tx: memory@38008000 {
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| /Zephyr-latest/dts/arm/st/h7/ |
| D | stm32h743.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/dt-bindings/display/panel.h>
12 compatible = "st,stm32h743", "st,stm32h7", "simple-bus";
14 flash-controller@52002000 {
16 compatible = "st,stm32-nv-flash", "soc-nv-flash";
17 write-block-size = <32>;
18 erase-block-size = <DT_SIZE_K(128)>;
20 max-erase-time = <4000>;
25 dma-requests= <107>;
29 dma-requests= <107>;
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| /Zephyr-latest/include/zephyr/multi_heap/ |
| D | shared_multi_heap.h | 4 * SPDX-License-Identifier: Apache-2.0
9 * @brief Public API for Shared Multi-Heap framework
28 * @brief Shared Multi-Heap (SMH) interface
29 * @defgroup shared_multi_heap Shared multi-heap interface
33 * The shared multi-heap manager uses the multi-heap allocator to manage a set
34 * of memory regions with different capabilities / attributes (cacheable,
35 * non-cacheable, etc...).
37 * All the different regions can be added at run-time to the shared multi-heap
39 * can be used by drivers or applications to request memory with certain
44 * - At boot time some platform code initialize the shared multi-heap
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| /Zephyr-latest/include/zephyr/drivers/mm/ |
| D | system_mm.h | 4 * SPDX-License-Identifier: Apache-2.0
9 * @brief Memory Management Driver APIs
11 * This contains APIs for a system-wide memory management
27 * @brief Memory Management Driver APIs
28 * @defgroup mm_drv_apis Memory Management Driver APIs
30 * This contains APIs for a system-wide memory management
48 /** Write-through caching */
51 /** Full write-back caching */
55 #define SYS_MM_MEM_CACHE_MASK (BIT(3) - 1)
62 * @name Region permission attributes.
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|
| /Zephyr-latest/doc/hardware/cache/ |
| D | guide.rst | 15 The information here assumes that the architecture-specific MPU support is
16 enabled. See the architecture-specific documentation for details.
21 in general ensures that memory will be seen in a coherent state from multiple
27 When dealing with memory shared between a processor core and other bus masters,
30 of this, data moved into and out of memory by DMA engines will be stale in the
39 disabling caching for only a portion of memory. This can be useful when cache
42 memory at runtime.
45 ---------------------------------
58 Disabling Caching for a Memory Region
59 -------------------------------------
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|
| /Zephyr-latest/doc/services/mem_mgmt/ |
| D | index.rst | 3 Memory Attributes
6 It is possible in the devicetree to mark the memory regions with attributes by
7 using the ``zephyr,memory-attr`` property. This property and the related memory
8 region can then be retrieved at run-time by leveraging a provided helper
12 and explained in :zephyr_file:`include/zephyr/dt-bindings/memory-attr/memory-attr.h`.
14 For example, to mark a memory region in the devicetree as non-volatile, cacheable,
15 out-of-order:
17 .. code-block:: devicetree
19 mem: memory@10000000 {
20 compatible = "mmio-sram";
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| /Zephyr-latest/samples/subsys/ipc/openamp/boards/ |
| D | mimxrt1170_evk_mimxrt1176_cm7_B.overlay | 4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
14 /* OpenAMP fails with full 512K OCRAM2 memory region as shared memory.
15 * Define a subset of the OCRAM2 region for demo to use
16 * Note that shared memory must have specific MPU attributes set.
18 ocram2_overlay: memory@202c0000{
19 compatible = "zephyr,memory-region", "mmio-sram";
21 zephyr,memory-region="OCRAM2_OVERLAY";
22 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_IO) )>;
|
| D | mimxrt1170_evk_mimxrt1176_cm7_A.overlay | 4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
14 /* OpenAMP fails with full 512K OCRAM2 memory region as shared memory.
15 * Define a subset of the OCRAM2 region for demo to use
16 * Note that shared memory must have specific MPU attributes set.
18 ocram2_overlay: memory@202c0000{
19 compatible = "zephyr,memory-region", "mmio-sram";
21 zephyr,memory-region="OCRAM2_OVERLAY";
22 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_IO) )>;
|
| /Zephyr-latest/include/zephyr/drivers/ |
| D | coredump.h | 4 * SPDX-License-Identifier: Apache-2.0
9 * @brief Public APIs for coredump pseudo-device driver
23 * @brief Coredump pseudo-device driver APIs
24 * @defgroup coredump_device_interface Coredump pseudo-device driver APIs
30 * @brief Structure describing a region in memory that may be
35 * of memory regions to be captured
38 /** Node of single-linked list, do not modify */
41 /** Address of start of memory region */
44 /** Size of memory region */
53 * @param dump_area_size Size of available memory at dump_area
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