Lines Matching +full:memory +full:- +full:region
4 * SPDX-License-Identifier: Apache-2.0
9 #include <zephyr/linker/linker-defs.h>
11 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
22 struct shared_multi_heap_region region; member
28 .region = { \
41 static void smh_reg_map(struct shared_multi_heap_region *region) in smh_reg_map() argument
46 mem_attr = (region->attr == SMH_REG_ATTR_CACHEABLE) ? K_MEM_CACHE_WB : K_MEM_CACHE_NONE; in smh_reg_map()
49 k_mem_map_phys_bare(&v_addr, region->addr, region->size, mem_attr); in smh_reg_map()
51 region->addr = (uintptr_t) v_addr; in smh_reg_map()
56 * Given a virtual address retrieve the original memory region that the mapping
62 if ((uintptr_t) v_addr >= map[reg].region.addr && in get_region_map()
63 (uintptr_t) v_addr < map[reg].region.addr + map[reg].region.size) { in get_region_map()
73 * All the memory regions defined in the DT with the MPU property `RAM` in mpu_to_reg_attr()
74 * can be accessed and memory can be retrieved from using the attribute in mpu_to_reg_attr()
77 * All the memory regions defined in the DT with the MPU property in mpu_to_reg_attr()
78 * `RAM_NOCACHE` can be accessed and memory can be retrieved from using in mpu_to_reg_attr()
81 * [MPU attr] -> [SMH attr] in mpu_to_reg_attr()
83 * RAM -> SMH_REG_ATTR_CACHEABLE in mpu_to_reg_attr()
84 * RAM_NOCACHE -> SMH_REG_ATTR_NON_CACHEABLE in mpu_to_reg_attr()
107 /* zephyr,memory-attr property not found. Skip it. */ in fill_multi_heap()
108 if (reg_map->region.attr == DT_MEM_ARM_MPU_UNKNOWN) { in fill_multi_heap()
112 /* Convert MPU attributes to shared-multi-heap capabilities */ in fill_multi_heap()
113 reg_map->region.attr = mpu_to_reg_attr(reg_map->region.attr); in fill_multi_heap()
116 reg_map->p_addr = reg_map->region.addr; in fill_multi_heap()
120 * For MMU-enabled platform we have to MMU-map the physical in fill_multi_heap()
121 * address retrieved by DT at run-time because the SMH in fill_multi_heap()
124 * For MPU-enabled platform the code is assuming that the in fill_multi_heap()
125 * region are configured at build-time, so no map is needed. in fill_multi_heap()
127 smh_reg_map(®_map->region); in fill_multi_heap()
130 shared_multi_heap_add(®_map->region, NULL); in fill_multi_heap()
144 * Return -EALREADY if already inited in ZTEST()
147 zassert_equal(-EALREADY, ret, "second init should fail"); in ZTEST()
150 * Fill the buffer pool with the memory heaps coming from DT in ZTEST()
156 * smaller region RES0 in ZTEST()
161 zassert_equal(reg_map->p_addr, RES0_CACHE_ADDR, "block in the wrong memory region"); in ZTEST()
162 zassert_equal(reg_map->region.attr, SMH_REG_ATTR_CACHEABLE, "wrong memory attribute"); in ZTEST()
166 * smaller cacheable region RES0 in ZTEST()
171 zassert_equal(reg_map->p_addr, RES0_CACHE_ADDR, "block in the wrong memory region"); in ZTEST()
172 zassert_equal(reg_map->region.attr, SMH_REG_ATTR_CACHEABLE, "wrong memory attribute"); in ZTEST()
176 * bigger cacheable region RES2 in ZTEST()
181 zassert_equal(reg_map->p_addr, RES2_CACHE_ADDR, "block in the wrong memory region"); in ZTEST()
182 zassert_equal(reg_map->region.attr, SMH_REG_ATTR_CACHEABLE, "wrong memory attribute"); in ZTEST()
185 * Request a non-cacheable chunk. It should be allocated in the in ZTEST()
186 * non-cacheable region RES1 in ZTEST()
191 zassert_equal(reg_map->p_addr, RES1_NOCACHE_ADDR, "block in the wrong memory region"); in ZTEST()
192 zassert_equal(reg_map->region.attr, SMH_REG_ATTR_NON_CACHEABLE, "wrong memory attribute"); in ZTEST()
195 * Request again a non-cacheable chunk. It should be allocated in the in ZTEST()
196 * non-cacheable region RES1 in ZTEST()
201 zassert_equal(reg_map->p_addr, RES1_NOCACHE_ADDR, "block in the wrong memory region"); in ZTEST()
202 zassert_equal(reg_map->region.attr, SMH_REG_ATTR_NON_CACHEABLE, "wrong memory attribute"); in ZTEST()
206 zassert_is_null(block, "allocated buffer too big for the region"); in ZTEST()
208 /* Request a 0-sized block */ in ZTEST()
212 /* Request a non-existent attribute */ in ZTEST()