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/Zephyr-latest/samples/subsys/rtio/sensor_batch_processing/
Dapp.overlay4 * SPDX-License-Identifier: Apache-2.0
9 #address-cells = <1>;
10 #size-cells = <0>;
15 sample-period = <100>;
16 sample-size = <16>;
17 max-msgs = <8>;
24 sample-period = <120>;
25 sample-size = <16>;
26 max-msgs = <4>;
/Zephyr-latest/drivers/i2c/
Di2c_nrfx_twim.c4 * SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/dt-bindings/i2c/i2c.h>
37 struct i2c_msg *msgs, in i2c_nrfx_twim_transfer() argument
40 struct i2c_nrfx_twim_data *dev_data = dev->data; in i2c_nrfx_twim_transfer()
41 const struct i2c_nrfx_twim_common_config *dev_config = dev->config; in i2c_nrfx_twim_transfer()
43 uint8_t *msg_buf = dev_config->msg_buf; in i2c_nrfx_twim_transfer()
45 uint16_t msg_buf_size = dev_config->msg_buf_size; in i2c_nrfx_twim_transfer()
49 k_sem_take(&dev_data->transfer_sync, K_FOREVER); in i2c_nrfx_twim_transfer()
52 k_sem_take(&dev_data->completion_sync, K_NO_WAIT); in i2c_nrfx_twim_transfer()
57 if (I2C_MSG_ADDR_10_BITS & msgs[i].flags) { in i2c_nrfx_twim_transfer()
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Di2c_andes_atciic100.c4 * SPDX-License-Identifier: Apache-2.0
44 struct i2c_atciic100_dev_data_t *dev_data = dev->data; in i2c_atciic100_default_control()
47 k_sem_init(&dev_data->bus_lock, 1, 1); in i2c_atciic100_default_control()
48 k_sem_init(&dev_data->device_sync_sem, 0, 1); in i2c_atciic100_default_control()
60 dev_data->fifo_depth = 2; in i2c_atciic100_default_control()
63 dev_data->fifo_depth = 4; in i2c_atciic100_default_control()
66 dev_data->fifo_depth = 8; in i2c_atciic100_default_control()
69 dev_data->fifo_depth = 16; in i2c_atciic100_default_control()
75 * 7-bit, CPU mode in i2c_atciic100_default_control()
88 dev_data->driver_state = I2C_DRV_INIT; in i2c_atciic100_default_control()
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Di2c_sam4l_twim.c3 * Copyright (c) 2020-2023 Gerson Fernando Budke <nandojve@gmail.com>
5 * SPDX-License-Identifier: Apache-2.0
33 #include "i2c-priv.h"
59 /** \internal Max value of NBYTES per transfer by hardware */
92 struct i2c_msg *msgs; member
109 const struct i2c_sam_twim_dev_cfg *const cfg = dev->config; in i2c_clk_set()
110 Twim *const twim = cfg->regs; in i2c_clk_set()
126 return -EIO; in i2c_clk_set()
130 TWIM_HSCWGR_HIGH(f_prescaled - in i2c_clk_set()
140 twim->HSCWGR = cwgr_reg_val; in i2c_clk_set()
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Di2c_nrfx_twim_rtio.c6 * SPDX-License-Identifier: Apache-2.0
11 #include <zephyr/dt-bindings/i2c/i2c.h>
31 const struct i2c_nrfx_twim_rtio_config *config = dev->config; in i2c_nrfx_twim_rtio_msg_start()
32 struct i2c_rtio *ctx = config->ctx; in i2c_nrfx_twim_rtio_msg_start()
45 const struct i2c_nrfx_twim_rtio_config *config = dev->config; in i2c_nrfx_twim_rtio_start()
46 struct i2c_rtio *ctx = config->ctx; in i2c_nrfx_twim_rtio_start()
47 struct rtio_sqe *sqe = &ctx->txn_curr->sqe; in i2c_nrfx_twim_rtio_start()
48 struct i2c_dt_spec *dt_spec = sqe->iodev->data; in i2c_nrfx_twim_rtio_start()
50 switch (sqe->op) { in i2c_nrfx_twim_rtio_start()
52 return i2c_nrfx_twim_rtio_msg_start(dev, I2C_MSG_READ | sqe->iodev_flags, in i2c_nrfx_twim_rtio_start()
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Di2c_gd32.c4 * SPDX-License-Identifier: Apache-2.0
25 #include "i2c-priv.h"
59 I2C_CTL1(cfg->reg) |= I2C_CTL1_ERRIE; in i2c_gd32_enable_interrupts()
60 I2C_CTL1(cfg->reg) |= I2C_CTL1_EVIE; in i2c_gd32_enable_interrupts()
61 I2C_CTL1(cfg->reg) |= I2C_CTL1_BUFIE; in i2c_gd32_enable_interrupts()
66 I2C_CTL1(cfg->reg) &= ~I2C_CTL1_ERRIE; in i2c_gd32_disable_interrupts()
67 I2C_CTL1(cfg->reg) &= ~I2C_CTL1_EVIE; in i2c_gd32_disable_interrupts()
68 I2C_CTL1(cfg->reg) &= ~I2C_CTL1_BUFIE; in i2c_gd32_disable_interrupts()
74 data->current->len--; in i2c_gd32_xfer_read()
75 *data->current->buf = I2C_DATA(cfg->reg); in i2c_gd32_xfer_read()
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Di2c_bcm_iproc.c5 * SPDX-License-Identifier: Apache-2.0
20 #include "i2c-priv.h"
123 #define M_RX_FIFO_MAX_THLD_VALUE (TX_RX_FIFO_SIZE - 1)
140 * max target read per interrupt is set to 10 bytes.
151 #define DEV_CFG(dev) ((struct iproc_i2c_config *)(dev)->config)
152 #define DEV_DATA(dev) ((struct iproc_i2c_data *)(dev)->data)
153 #define DEV_BASE(dev) ((DEV_CFG(dev))->base)
215 return -EINVAL; in iproc_i2c_target_set_address()
231 struct i2c_target_config *target_config = dd->target_cfg; in iproc_i2c_target_init()
250 ret = iproc_i2c_target_set_address(dev, target_config->address); in iproc_i2c_target_init()
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/Zephyr-latest/samples/subsys/rtio/sensor_batch_processing/dts/bindings/
Dvnd,sensor.yaml3 # SPDX-License-Identifier: Apache-2.0
12 sample-period:
16 sample-size:
20 max-msgs:
/Zephyr-latest/scripts/build/
Dgen_strerror_table.py5 # SPDX-License-Identifier: Apache-2.0
32 msgs = {}
37 pat = r'^#define[\s]+(E[A-Z_]*)[\s]+([1-9][0-9]*)[\s]+/\*\*<[\s]+(.*)[\s]+\*/[\s]*$'
48 msgs[symbol] = msg
50 highest_errno = max(int(errno), highest_errno)
67 print(f'[{symbol}] = "{msgs[symbol]}",', file=outf)
76 print(f'[{symbol}] = {len(msgs[symbol]) + 1},', file=outf)
84 '-i',
85 '--input',
90 '-o',
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Dgen_strsignal_table.py5 # SPDX-License-Identifier: Apache-2.0
27 msgs = {}
32 pat = r'^#define[\s]+(SIG[A-Z_]*)[\s]+([1-9][0-9]*)[\s]+/\*\*<[\s]+(.*)[\s]+\*/[\s]*$'
43 msgs[symbol] = msg
45 highest_signo = max(int(signo), highest_signo)
61 print(f'\t[{symbol}] = "{msgs[symbol]}",', file=outf)
69 '-i',
70 '--input',
75 '-o',
76 '--output',
/Zephyr-latest/drivers/sensor/bosch/bmi160/
Demul_bmi160.c4 * SPDX-License-Identifier: Apache-2.0
27 /** Run-time data used by the emulator */
51 const struct bmi160_emul_cfg *cfg = target->cfg; in emul_bmi160_get_reg_value()
54 return -EINVAL; in emul_bmi160_get_reg_value()
57 memcpy(out, cfg->reg + reg_number, count); in emul_bmi160_get_reg_value()
63 struct bmi160_emul_data *data = target->data; in reg_write()
64 const struct bmi160_emul_cfg *cfg = target->cfg; in reg_write()
67 cfg->reg[regn] = val; in reg_write()
104 data->pmu_status &= 3 << shift; in reg_write()
105 data->pmu_status |= pmu_val << shift; in reg_write()
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/Zephyr-latest/tests/boards/frdm_k64f/i2c/src/
Di2c.c4 * SPDX-License-Identifier: Apache-2.0
31 * Setup and enable the fxos8700 with its max sample rate and
91 static struct i2c_msg msgs[2] = { { .buf = &reg, .len = 1, .flags = I2C_MSG_WRITE }, variable
107 msgs, in test_i2c_fxos8700_sync()
144 res = i2c_transfer_cb(dev, msgs, 2, FXOS8700_I2C_ADDR, in test_i2c_fxos8700_async_cb()
161 res = i2c_transfer_cb(i2c_bus, msgs, 2, FXOS8700_I2C_ADDR, in test_i2c_fxos8700_transfer_cb()
227 zassert_true(signaled > 0, "expected signaled to be non-zero"); in test_i2c_fxos8700_transfer_signal()
/Zephyr-latest/drivers/i3c/
Di3c_cdns.c4 * SPDX-License-Identifier: Apache-2.0
472 /* Target T_LOW period in open-drain mode. */
476 * MIPI I3C v1.1.1 Spec defines SDA Signal Data Hold in Push Pull max as the
484 /* command tx fifo threshold - unused */
486 /* in-band-interrupt data fifo threshold - unused */
488 /* in-band-interrupt response queue threshold */
490 /* tx data threshold - unused */
611 for (i = 15; i >= 0; --i) { in i3c_cdns_crc5()
660 /* Returns [7:1] 7-bit addr, [0] even/xor parity */
668 b = b & (b - 1); in cdns_i3c_even_parity_byte()
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Di3c_npcx.c4 * SPDX-License-Identifier: Apache-2.0
103 #define I3C_BUS_TLOW_PP_MIN_NS 24 /* T_LOW period in push-pull mode */
104 #define I3C_BUS_THigh_PP_MIN_NS 24 /* T_High period in push-pull mode */
105 #define I3C_BUS_TLOW_OD_MIN_NS 200 /* T_LOW period in open-drain mode */
107 #define PPBAUD_DIV_MAX (BIT(GET_FIELD_SZ(NPCX_I3C_MCONFIG_PPBAUD)) - 1) /* PPBAUD divider max */
163 uint8_t ppbaud; /* Push-Pull high period */
164 uint8_t pplow; /* Push-Pull low period */
165 uint8_t odhpp; /* Open-Drain high period */
166 uint8_t odbaud; /* Open-Drain low period */
259 struct npcx_i3c_data *const data = dev->data; in npcx_i3c_mutex_lock()
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Di3c_shell.c4 * SPDX-License-Identifier: Apache-2.0
42 entry->syntax = NULL; \
43 entry->handler = NULL; \
44 entry->subcmd = NULL; \
45 entry->help = NULL; \
49 entry->syntax = i3c_desc->dev->name; \
66 entry->syntax = NULL; \
67 entry->handler = NULL; \
68 entry->subcmd = NULL; \
69 entry->help = NULL; \
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Di3c_common.c4 * SPDX-License-Identifier: Apache-2.0
20 void i3c_dump_msgs(const char *name, const struct i3c_msg *msgs, in i3c_dump_msgs() argument
23 LOG_DBG("I3C msg: %s, addr=%x", name, target->dynamic_addr); in i3c_dump_msgs()
25 const struct i3c_msg *msg = &msgs[i]; in i3c_dump_msgs()
28 msg->flags & I3C_MSG_READ ? 'R' : 'W', msg->len); in i3c_dump_msgs()
29 if (!(msg->flags & I3C_MSG_READ)) { in i3c_dump_msgs()
30 LOG_HEXDUMP_DBG(msg->buf, msg->len, "contents:"); in i3c_dump_msgs()
53 slots->slots[idx] &= ~((unsigned long)I3C_ADDR_SLOT_STATUS_MASK << bitpos); in i3c_addr_slots_set()
54 slots->slots[idx] |= status << bitpos; in i3c_addr_slots_set()
79 status = slots->slots[idx] >> bitpos; in i3c_addr_slots_status()
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/Zephyr-latest/include/zephyr/drivers/
Di3c.h5 * SPDX-License-Identifier: Apache-2.0
42 * - BCR[7:6]: Device Role
43 * - 0: I3C Target
44 * - 1: I3C Controller capable
45 * - 2: Reserved
46 * - 3: Reserved
48 * - BCR[5]: Advanced Capabilities
49 * - 0: Does not support optional advanced capabilities.
50 * - 1: Supports optional advanced capabilities which
53 * - BCR[4]: Virtual Target Support
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/Zephyr-latest/tests/bsim/bluetooth/mesh/src/
Dtest_access.c4 * SPDX-License-Identifier: Apache-2.0
82 uint8_t msgs; member
106 return -1; in model1_update()
109 model->pub->msg->data[1]++; in model1_update()
110 LOG_DBG("New pub: n: %d t: %d", model->pub->msg->data[1], k_uptime_get_32()); in model1_update()
249 * m5 m3------->mne3 mne5
266 ASSERT_OK(bt_mesh_model_extend(model, model - 2)); in model3_init()
267 ASSERT_OK(bt_mesh_model_extend(model, model - 1)); in model3_init()
269 if (model->rt->elem_idx == 1) { in model3_init()
278 ASSERT_OK(bt_mesh_model_extend(model, model - 1)); in model4_init()
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