Lines Matching +full:max +full:- +full:msgs
4 * SPDX-License-Identifier: Apache-2.0
27 /** Run-time data used by the emulator */
51 const struct bmi160_emul_cfg *cfg = target->cfg; in emul_bmi160_get_reg_value()
54 return -EINVAL; in emul_bmi160_get_reg_value()
57 memcpy(out, cfg->reg + reg_number, count); in emul_bmi160_get_reg_value()
63 struct bmi160_emul_data *data = target->data; in reg_write()
64 const struct bmi160_emul_cfg *cfg = target->cfg; in reg_write()
67 cfg->reg[regn] = val; in reg_write()
104 data->pmu_status &= 3 << shift; in reg_write()
105 data->pmu_status |= pmu_val << shift; in reg_write()
107 data->pmu_status); in reg_write()
121 struct bmi160_emul_data *data = target->data; in reg_read()
122 const struct bmi160_emul_cfg *cfg = target->cfg; in reg_read()
126 val = cfg->reg[regn]; in reg_read()
133 val = data->pmu_status; in reg_read()
173 data = target->data; in bmi160_emul_io_spi()
176 __ASSERT_NO_MSG(!tx_bufs || !rx_bufs || tx_bufs->count == rx_bufs->count); in bmi160_emul_io_spi()
177 count = tx_bufs ? tx_bufs->count : rx_bufs->count; in bmi160_emul_io_spi()
180 LOG_DBG("Unknown tx_bufs->count %d", count); in bmi160_emul_io_spi()
181 return -EIO; in bmi160_emul_io_spi()
183 tx = tx_bufs ? tx_bufs->buffers : NULL; in bmi160_emul_io_spi()
184 txd = tx_bufs ? &tx_bufs->buffers[1] : NULL; in bmi160_emul_io_spi()
185 rxd = rx_bufs ? &rx_bufs->buffers[1] : NULL; in bmi160_emul_io_spi()
189 return -EIO; in bmi160_emul_io_spi()
192 if (tx->len != 1) { in bmi160_emul_io_spi()
193 LOG_DBG("Unknown tx->len %d", tx->len); in bmi160_emul_io_spi()
194 return -EIO; in bmi160_emul_io_spi()
197 regn = *(uint8_t *)tx->buf; in bmi160_emul_io_spi()
200 return -EPERM; in bmi160_emul_io_spi()
203 if (txd->len == 1) { in bmi160_emul_io_spi()
207 *(uint8_t *)rxd->buf = val; in bmi160_emul_io_spi()
209 val = *(uint8_t *)txd->buf; in bmi160_emul_io_spi()
215 for (int i = 0; i < txd->len; ++i) { in bmi160_emul_io_spi()
216 ((uint8_t *)rxd->buf)[i] = reg_read(target, regn + i); in bmi160_emul_io_spi()
220 return -EIO; in bmi160_emul_io_spi()
229 static int bmi160_emul_transfer_i2c(const struct emul *target, struct i2c_msg *msgs, int num_msgs, in bmi160_emul_transfer_i2c() argument
234 data = target->data; in bmi160_emul_transfer_i2c()
236 __ASSERT_NO_MSG(msgs && num_msgs); in bmi160_emul_transfer_i2c()
238 i2c_dump_msgs_rw(target->dev, msgs, num_msgs, addr, false); in bmi160_emul_transfer_i2c()
241 if (msgs->flags & I2C_MSG_READ) { in bmi160_emul_transfer_i2c()
243 return -EIO; in bmi160_emul_transfer_i2c()
245 if (msgs->len != 1) { in bmi160_emul_transfer_i2c()
246 LOG_ERR("Unexpected msg0 length %d", msgs->len); in bmi160_emul_transfer_i2c()
247 return -EIO; in bmi160_emul_transfer_i2c()
249 data->cur_reg = msgs->buf[0]; in bmi160_emul_transfer_i2c()
252 msgs++; in bmi160_emul_transfer_i2c()
253 if (msgs->flags & I2C_MSG_READ) { in bmi160_emul_transfer_i2c()
254 for (int i = 0; i < msgs->len; ++i) { in bmi160_emul_transfer_i2c()
255 msgs->buf[i] = reg_read(target, data->cur_reg + i); in bmi160_emul_transfer_i2c()
258 if (msgs->len != 1) { in bmi160_emul_transfer_i2c()
259 LOG_ERR("Unexpected msg1 length %d", msgs->len); in bmi160_emul_transfer_i2c()
261 reg_write(target, data->cur_reg, msgs->buf[0]); in bmi160_emul_transfer_i2c()
266 return -EIO; in bmi160_emul_transfer_i2c()
290 const struct bmi160_emul_cfg *cfg = target->cfg; in bmi160_emul_backend_set_channel()
300 reg_lsb = BMI160_REG_DATA_ACC_X + (ch.chan_type - SENSOR_CHAN_ACCEL_X) * 2; in bmi160_emul_backend_set_channel()
303 switch (FIELD_GET(GENMASK(3, 0), cfg->reg[BMI160_REG_ACC_RANGE])) { in bmi160_emul_backend_set_channel()
321 reg_lsb = BMI160_REG_DATA_GYR_X + (ch.chan_type - SENSOR_CHAN_GYRO_X) * 2; in bmi160_emul_backend_set_channel()
324 switch (FIELD_GET(GENMASK(2, 0), cfg->reg[BMI160_REG_GYR_RANGE])) { in bmi160_emul_backend_set_channel()
341 return -EINVAL; in bmi160_emul_backend_set_channel()
350 return -EINVAL; in bmi160_emul_backend_set_channel()
355 intermediate >>= scale_shift - shift; in bmi160_emul_backend_set_channel()
357 /* Original value might be out-of-bounds, fix it (we're going to lose precision) */ in bmi160_emul_backend_set_channel()
358 intermediate <<= shift - scale_shift; in bmi160_emul_backend_set_channel()
363 intermediate -= INT64_C(23) << (31 - scale_shift); in bmi160_emul_backend_set_channel()
369 cfg->reg[reg_lsb] = FIELD_GET(GENMASK64(7, 0), intermediate); in bmi160_emul_backend_set_channel()
370 cfg->reg[reg_lsb + 1] = FIELD_GET(GENMASK64(15, 8), intermediate); in bmi160_emul_backend_set_channel()
378 const struct bmi160_emul_cfg *cfg = target->cfg; in bmi160_emul_backend_get_sample_range()
385 uint8_t acc_range = cfg->reg[BMI160_REG_ACC_RANGE]; in bmi160_emul_backend_get_sample_range()
401 return -EINVAL; in bmi160_emul_backend_get_sample_range()
406 *lower = -(*upper); in bmi160_emul_backend_get_sample_range()
407 *epsilon = intermediate * 2 / (1 << (16 - *shift)); in bmi160_emul_backend_get_sample_range()
414 uint8_t gyro_range = cfg->reg[BMI160_REG_GYR_RANGE]; in bmi160_emul_backend_get_sample_range()
433 return -EINVAL; in bmi160_emul_backend_get_sample_range()
439 *lower = -(*upper); in bmi160_emul_backend_get_sample_range()
440 *epsilon = intermediate * 2 / (1 << (16 - *shift)); in bmi160_emul_backend_get_sample_range()
444 return -EINVAL; in bmi160_emul_backend_get_sample_range()
452 return -EINVAL; in bmi160_emul_backend_set_offset()
455 const struct bmi160_emul_cfg *cfg = target->cfg; in bmi160_emul_backend_set_offset()
461 cfg->reg[BMI160_REG_OFFSET_EN] &= ~BIT(BMI160_ACC_OFS_EN_POS); in bmi160_emul_backend_set_offset()
463 cfg->reg[BMI160_REG_OFFSET_EN] &= ~BIT(BMI160_GYR_OFS_EN_POS); in bmi160_emul_backend_set_offset()
467 cfg->reg[BMI160_REG_OFFSET_EN] |= BIT(BMI160_ACC_OFS_EN_POS); in bmi160_emul_backend_set_offset()
469 cfg->reg[BMI160_REG_OFFSET_EN] |= BIT(BMI160_GYR_OFS_EN_POS); in bmi160_emul_backend_set_offset()
493 intermediate <<= (shift - scale_shift); in bmi160_emul_backend_set_offset()
496 scale >>= (scale_shift - shift); in bmi160_emul_backend_set_offset()
504 (reg_value >= -0x1ff - 1 && reg_value <= 0x1ff)); in bmi160_emul_backend_set_offset()
506 cfg->reg[BMI160_REG_OFFSET_ACC_X + i] = reg_value & 0xff; in bmi160_emul_backend_set_offset()
508 cfg->reg[BMI160_REG_OFFSET_GYR_X + i] = reg_value & 0xff; in bmi160_emul_backend_set_offset()
509 cfg->reg[BMI160_REG_OFFSET_EN] = in bmi160_emul_backend_set_offset()
510 (cfg->reg[BMI160_REG_OFFSET_EN] & ~GENMASK(i * 2 + 1, i * 2)) | in bmi160_emul_backend_set_offset()
525 return bmi160_emul_backend_set_offset(target, ch, attribute_value->values, in bmi160_emul_backend_set_attribute()
526 attribute_value->shift); in bmi160_emul_backend_set_attribute()
528 return -EINVAL; in bmi160_emul_backend_set_attribute()
534 q31_t *max, q31_t *increment, int8_t *shift) in bmi160_emul_backend_get_attribute_metadata() argument
545 * * INT8_MIN (or MAX) : yields the minimum (or maximum) values in bmi160_emul_backend_get_attribute_metadata()
546 * * INT32_MAX >> 3 : converts to q31 format within range [-8, 8] in bmi160_emul_backend_get_attribute_metadata()
549 *max = (q31_t)((int64_t)(0.0039 * 9.8065 * INT8_MAX * INT32_MAX) >> 3); in bmi160_emul_backend_get_attribute_metadata()
554 return -EINVAL; in bmi160_emul_backend_get_attribute_metadata()
562 * * INT10_MIN (or MAX) : yields the minimum (or maximum) values in bmi160_emul_backend_get_attribute_metadata()
563 * * INT32_MAX : converts to q31 format within range [-1, 1] in bmi160_emul_backend_get_attribute_metadata()
565 *min = (q31_t)(0.061 * 3.141593 / 180.0 * -512 * INT32_MAX); in bmi160_emul_backend_get_attribute_metadata()
566 *max = (q31_t)(0.061 * 3.141593 / 180.0 * 511 * INT32_MAX); in bmi160_emul_backend_get_attribute_metadata()
571 return -EINVAL; in bmi160_emul_backend_get_attribute_metadata()
573 return -EINVAL; in bmi160_emul_backend_get_attribute_metadata()
586 const struct bmi160_emul_cfg *cfg = target->cfg; in emul_bosch_bmi160_init()
587 struct bmi160_emul_data *data = target->data; in emul_bosch_bmi160_init()
588 uint8_t *reg = cfg->reg; in emul_bosch_bmi160_init()
592 data->pmu_status = 0; in emul_bosch_bmi160_init()
622 * bus-specific macro at preprocessor time.