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/Zephyr-latest/dts/bindings/input/
Dtouchscreen-common.yaml2 # SPDX-License-Identifier: Apache-2.0
9 screen-width:
13 Horizontal resolution of touchscreen (maximum x coordinate reported + 1). The default
14 corresponds to a valid value for non-inverted axis, required for a display with an inverted x
17 screen-height:
22 corresponds to a valid value for non-inverted axis, required for a display with an inverted y
25 inverted-x:
27 description: X axis is inverted.
29 inverted-y:
31 description: Y axis is inverted.
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/Zephyr-latest/include/zephyr/input/
Dinput_touch.h4 * SPDX-License-Identifier: Apache-2.0
31 * @param inverted_x X axis is inverted
32 * @param inverted_y Y axis is inverted
33 * @param swapped_x_y X and Y axes are swapped
35 * see touchscreem-common.yaml for more details
80 * @param x X coordinate as reported by the controller
85 uint32_t x, uint32_t y,
/Zephyr-latest/drivers/serial/
Duart_pl011_registers.h6 * SPDX-License-Identifier: Apache-2.0
45 #define PL011_BIT_MASK(x, y) (((2 << x) - 1) << y) argument
48 #define PL011_FR_CTS BIT(0) /* clear to send - inverted */
49 #define PL011_FR_DSR BIT(1) /* data set ready - inverted */
50 #define PL011_FR_DCD BIT(2) /* data carrier detect - inverted */
56 #define PL011_FR_RI BIT(8) /* ring indicator - inverted */
84 #define PL011_LCRH_WLEN_SIZE(x) (x - 5) argument
108 /* PL011 Control Register - vendor-specific fields */
/Zephyr-latest/dts/bindings/display/
Dsitronix,st7735r.yaml1 # Copyright (c) 2020, Kim Bøndergaard <kim@fam-boendergaard.dk>
2 # SPDX-License-Identifier: Apache-2.0
8 include: [mipi-dbi-spi-device.yaml, display-controller.yaml]
11 x-offset:
16 y-offset:
32 type: uint8-array
37 type: uint8-array
42 type: uint8-array
47 type: uint8-array
52 type: uint8-array
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/Zephyr-latest/subsys/fb/
Dcfb.c4 * SPDX-License-Identifier: Apache-2.0
19 #define LSB_BIT_MASK(x) BIT_MASK(x) argument
20 #define MSB_BIT_MASK(x) (BIT_MASK(x) << (8 - x)) argument
46 /** Resolution of a framebuffer in pixels in X direction */
64 /** Inverted */
65 bool inverted; member
72 return (uint8_t *)fptr->data + in get_glyph_ptr()
73 (c - fptr->first_char) * in get_glyph_ptr()
74 (fptr->width * fptr->height / 8U); in get_glyph_ptr()
78 uint8_t x, uint8_t y) in get_glyph_byte() argument
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Dcfb_shell.c11 * SPDX-License-Identifier: Apache-2.0
21 #define HELP_DRAW_POINT "<x> <y0>"
24 #define HELP_INVERT "[<x> <y> <width> <height>]"
93 return -EINVAL; in cmd_print()
99 return -EINVAL; in cmd_print()
114 int x, y; in cmd_draw_text() local
116 x = strtol(argv[1], NULL, 10); in cmd_draw_text()
118 err = cfb_draw_text(dev, argv[3], x, y); in cmd_draw_text()
134 pos.x = strtol(argv[1], NULL, 10); in cmd_draw_point()
153 start.x = strtol(argv[1], NULL, 10); in cmd_draw_line()
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/Zephyr-latest/include/zephyr/dt-bindings/pwm/
Dpwm.h4 * SPDX-License-Identifier: Apache-2.0
24 #define PWM_NSEC(x) (x) argument
26 #define PWM_USEC(x) (PWM_NSEC(x) * 1000UL) argument
28 #define PWM_MSEC(x) (PWM_USEC(x) * 1000UL) argument
30 #define PWM_SEC(x) (PWM_MSEC(x) * 1000UL) argument
32 #define PWM_HZ(x) (PWM_SEC(1UL) / (x)) argument
34 #define PWM_KHZ(x) (PWM_HZ((x) * 1000UL)) argument
46 /** PWM pin normal polarity (active-high pulse). */
49 /** PWM pin inverted polarity (active-low pulse). */
/Zephyr-latest/boards/shields/lcd_par_s035/boards/
Drd_rw612_bga.overlay4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>
11 * - Depopulate resistors R78, R604, R598, R15, R245, R243, R11, R20, R237,
13 * - Populate resistors R286, R19, R246, R242, R123, R239, R124, R125, R236,
15 * - Remove jumper JP30
16 * - Set jumper JP40 to postion 1-2, JP38 to 1-2, and JP16 to position 2-3
21 * ON-ON-OFF (8 bit 8080 mode), and connect the following pins
23 * |-----------|-------------|----------|
62 slew-rate = "ultra";
67 mipi-mode = "MIPI_DBI_MODE_8080_BUS_8_BIT";
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/Zephyr-latest/boards/st/stm32f429i_disc1/
Dstm32f429i_disc1.dts5 * SPDX-License-Identifier: Apache-2.0
8 /dts-v1/;
10 #include <st/f4/stm32f429zitx-pinctrl.dtsi>
11 #include <zephyr/dt-bindings/display/ili9xxx.h>
12 #include <zephyr/dt-bindings/input/input-event-codes.h>
20 zephyr,shell-uart = &usart1;
29 compatible = "zephyr,memory-region", "mmio-sram";
32 zephyr,memory-region = "SDRAM2";
36 compatible = "gpio-leds";
48 compatible = "gpio-keys";
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/Zephyr-latest/dts/bindings/qspi/
Dnxp,s32-qspi.yaml2 # SPDX-License-Identifier: Apache-2.0
10 compatible: "nxp,s32-qspi"
12 include: [base.yaml, pinctrl-device.yaml]
20 "#address-cells":
23 "#size-cells":
26 data-rate:
29 - SDR
30 - DDR
33 - Single Data Rate (SDR): sampling of incoming data occurs on single edges.
34 - Double Data Rate (DDR): sampling of incoming data occurs on both edges.
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/Zephyr-latest/drivers/display/
Ddisplay_st7796s.c4 * SPDX-License-Identifier: Apache-2.0
33 bool inverted; /* Display color inversion */ member
57 const struct st7796s_config *config = dev->config; in st7796s_send_cmd()
59 return mipi_dbi_command_write(config->mipi_dbi, &config->dbi_config, in st7796s_send_cmd()
64 const uint16_t x, const uint16_t y, in st7796s_set_cursor() argument
71 addr_data[0] = sys_cpu_to_be16(x); in st7796s_set_cursor()
72 addr_data[1] = sys_cpu_to_be16(x + width - 1); in st7796s_set_cursor()
82 addr_data[1] = sys_cpu_to_be16(y + height - 1); in st7796s_set_cursor()
100 const struct st7796s_config *config = dev->config; in st7796s_get_pixelfmt()
103 * Invert the pixel format for 8-bit 8080 Parallel Interface. in st7796s_get_pixelfmt()
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/Zephyr-latest/include/zephyr/drivers/
Di2s.h4 * SPDX-License-Identifier: Apache-2.0
9 * @brief Public APIs for the I2S (Inter-IC Sound) bus drivers.
20 * @brief I2S (Inter-IC Sound) Interface
23 * as common non-standard extensions such as PCM Short/Long Frame Sync,
55 * -. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-.
56 * SCK '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '
57 * -. .-------------------------------.
58 * WS '-------------------------------' '----
59 * -.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.
60 * SD | |MSB| |...| |LSB| x |...| x |MSB| |...| |LSB| x |...| x |
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/Zephyr-latest/samples/drivers/jesd216/src/
Dmain.c4 * SPDX-License-Identifier: Apache-2.0
40 [JESD216_MODE_111] = "1-1-1",
41 [JESD216_MODE_112] = "1-1-2",
42 [JESD216_MODE_114] = "1-1-4",
43 [JESD216_MODE_118] = "1-1-8",
44 [JESD216_MODE_122] = "1-2-2",
45 [JESD216_MODE_144] = "1-4-4",
46 [JESD216_MODE_188] = "1-8-8",
47 [JESD216_MODE_222] = "2-2-2",
48 [JESD216_MODE_444] = "4-4-4",
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/Zephyr-latest/boards/sipeed/longan_nano/
Dlongan_nano-common.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/input/input-event-codes.h>
8 #include <zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>
13 zephyr,shell-uart = &usart0;
21 compatible = "gpio-leds";
37 compatible = "gpio-keys";
46 compatible = "pwm-leds";
64 pwm-led0 = &pwm_led_green;
65 pwm-led1 = &pwm_led_blue;
71 compatible = "zephyr,mipi-dbi-spi";
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/Zephyr-latest/drivers/dai/intel/ssp/
Dssp.c4 * SPDX-License-Identifier: Apache-2.0
22 #define dai_set_drvdata(dai, data) (dai->priv_data = data)
23 #define dai_get_drvdata(dai) dai->priv_data
24 #define dai_get_plat_data(dai) dai->ssp_plat_data
25 #define dai_get_mn(dai) dai->ssp_plat_data->mn_inst
26 #define dai_get_ftable(dai) dai->ssp_plat_data->ftable
27 #define dai_get_fsources(dai) dai->ssp_plat_data->fsources
28 #define dai_mn_base(dai) dai->ssp_plat_data->mn_inst->base
29 #define dai_base(dai) dai->ssp_plat_data->base
30 #define dai_ip_base(dai) dai->ssp_plat_data->ip_base
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/Zephyr-latest/drivers/fpga/
Dfpga_ice40_bitbang.c5 * SPDX-License-Identifier: Apache-2.0
23 * polarity must be inverted during the 'leading clocks' phase and
30 * restore the default pinctrl settings. On some higher-end microcontrollers
34 * However, on lower-end microcontrollers, the amount of time that elapses
36 * leaves us with the bitbanging option. Of course, on lower-end
40 * in order to bitbang on lower-end microcontrollers, we actually require
61 * lattice,ice40-fpga.yaml for details.
65 for (; n > 0; --n) { in fpga_ice40_delay()
73 for (; n > 0; --n) { in fpga_ice40_send_clocks()
88 /* assert chip-select (active low) */ in fpga_ice40_spi_send_data()
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/Zephyr-latest/boards/weact/mini_stm32h7b0/
Dmini_stm32h7b0.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/h7/stm32h7b0vbtx-pinctrl.dtsi>
10 #include <zephyr/dt-bindings/input/input-event-codes.h>
11 #include <zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>
15 compatible = "weact,mini-stm32h7b0";
19 zephyr,shell-uart = &usb_cdc_acm_uart;
26 compatible = "gpio-leds";
34 compatible = "gpio-keys";
43 compatible = "zephyr,mipi-dbi-spi";
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/Zephyr-latest/drivers/mfd/
Dmfd_tle9104.c4 * SPDX-License-Identifier: Apache-2.0
22 …* https://www.infineon.com/dgdl/Infineon-TLE9104SH-DataSheet-v01_31-EN.pdf?fileId=5546d462766cbe86…
121 *destination &= ~GENMASK(pos + length - 1, pos); in tle9104_set_register_bits()
122 *destination |= FIELD_PREP(GENMASK(pos + length - 1, pos), value); in tle9104_set_register_bits()
127 return FIELD_GET(GENMASK(pos + length - 1, pos), value); in tle9104_get_register_bits()
135 parity--; in tle9104_calculate_parity()
159 const struct tle9104_config *config = dev->config; in tle9104_transceive_frame()
160 struct tle9104_data *data = dev->data; in tle9104_transceive_frame()
188 LOG_DBG("writing in register 0x%02X of TLE9104 value 0x%02X, complete frame 0x%04X", in tle9104_transceive_frame()
191 result = spi_transceive_dt(&config->bus, &tx, &rx); in tle9104_transceive_frame()
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/Zephyr-latest/drivers/input/
Dinput_stmpe811.c3 * SPDX-License-Identifier: Apache-2.0
84 * - bits [1-3] X, Y only acquisition mode
89 * Analog-to-digital Converter
91 * - bit [3] selects 12 bit ADC
92 * - bits [4-6] select ADC conversion time = 80
99 * - 00 : 1.625 MHz
100 * - 01 : 3.25 MHz
101 * - 10 : 6.5 MHz
102 * - 11 : 6.5 MHz
109 * - Fractional part : 7
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/Zephyr-latest/drivers/misc/coresight/
Dnrf_etr.c4 * SPDX-License-Identifier: Apache-2.0
52 fmt = "D%s\t%02x "; \
55 fmt = "D%s\t%04x "; \
58 fmt = "D%s\t%08x "; \
61 fmt = "D%s\t%016x "; \
71 static const uint32_t wsize_mask = DT_REG_SIZE(ETR_BUFFER_NODE) / sizeof(int) - 1;
72 static const uint32_t wsize_inc = DT_REG_SIZE(ETR_BUFFER_NODE) / sizeof(int) - 1;
104 "CTI211_1", /* 1 CTI211 triger out 1 inverted */
106 "CTI211_3", /* 3 CTI211 triger out 2 inverted*/
184 uint64_t ts = packet->timestamp; in log_message_process()
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/Zephyr-latest/boards/weact/mini_stm32h743/
Dmini_stm32h743.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/h7/stm32h743vitx-pinctrl.dtsi>
10 #include <zephyr/dt-bindings/input/input-event-codes.h>
11 #include <zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>
15 compatible = "weact,mini-stm32h743";
24 compatible = "gpio-leds";
32 compatible = "gpio-keys";
41 compatible = "zephyr,mipi-dbi-spi";
42 spi-dev = <&spi4>;
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/Zephyr-latest/drivers/adc/
Dadc_esp32.c4 * SPDX-License-Identifier: Apache-2.0
42 * for ESP32-S2 is doing it, so we copy that approach in Zephyr driver
101 return -ENOTSUP; in gain_to_atten()
107 /* Convert voltage by inverted attenuation to support zephyr gain values */
150 LOG_WRN("Skip software calibration - Not supported!"); in adc_calibration_init()
153 LOG_WRN("Skip software calibration - Invalid version!"); in adc_calibration_init()
175 struct adc_esp32_data *data = dev->data; in adc_esp32_dma_conv_done()
177 k_sem_give(&data->dma_conv_wait_lock); in adc_esp32_dma_conv_done()
182 const struct adc_esp32_conf *conf = dev->config; in adc_esp32_dma_start()
183 struct adc_esp32_data *data = dev->data; in adc_esp32_dma_start()
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Dadc_emul.c10 * SPDX-License-Identifier: Apache-2.0
111 const struct adc_emul_config *config = dev->config; in adc_emul_const_value_set()
112 struct adc_emul_data *data = dev->data; in adc_emul_const_value_set()
115 if (chan >= config->num_channels) { in adc_emul_const_value_set()
117 return -EINVAL; in adc_emul_const_value_set()
120 chan_cfg = &data->chan_cfg[chan]; in adc_emul_const_value_set()
122 k_mutex_lock(&data->cfg_mtx, K_FOREVER); in adc_emul_const_value_set()
124 chan_cfg->input = ADC_EMUL_CONST_VALUE; in adc_emul_const_value_set()
125 chan_cfg->const_value = value; in adc_emul_const_value_set()
127 k_mutex_unlock(&data->cfg_mtx); in adc_emul_const_value_set()
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/Zephyr-latest/boards/espressif/esp32_ethernet_kit/doc/
Dindex.rst6 The ESP32-Ethernet-Kit is an Ethernet-to-Wi-Fi development board that enables
7 Ethernet devices to be interconnected over Wi-Fi. At the same time, to provide
8 more flexible power supply options, the ESP32-Ethernet-Kit also supports power
11 .. _get-started-esp32-ethernet-kit-v1.2-overview:
13 ESP32-Ethernet-Kit is an ESP32-WROVER-E based development.
14 For more information, check the datasheet at `ESP32-WROVER-E Datasheet`_.
17 board B. The `Ethernet Board (A)`_ contains Bluetooth/Wi-Fi dual-mode
18 ESP32-WROVER-E module and IP101GRI, a Single Port 10/100 Fast Ethernet
23 .. _get-started-esp32-ethernet-kit-v1.2:
25 .. figure:: img/esp32-ethernet-kit-v1.2.jpg
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/Zephyr-latest/doc/releases/
Drelease-notes-3.6.rst12 * New :ref:`GNSS subsystem <gnss_api>` added, enabling geo-awareness in Zephyr applications.
13 * New API and drivers introduced for interfacing with :ref:`keyboard matrices <gpio-kbd>`.
16 * Integrated Trusted Firmware-M (TF-M) 2.0, including an update to Mbed TLS 3.5.2.
23 * Over 30 new supported boards, spanning all Zephyr-supported architectures.
37 * CVE-2023-5779 `Zephyr project bug tracker GHSA-7cmj-963q-jj47
38 <https://github.com/zephyrproject-rtos/zephyr/security/advisories/GHSA-7cmj-963q-jj47>`_
40 * CVE-2023-6249 `Zephyr project bug tracker GHSA-32f5-3p9h-2rqc
41 <https://github.com/zephyrproject-rtos/zephyr/security/advisories/GHSA-32f5-3p9h-2rqc>`_
43 * CVE-2023-6749 `Zephyr project bug tracker GHSA-757h-rw37-66hw
44 <https://github.com/zephyrproject-rtos/zephyr/security/advisories/GHSA-757h-rw37-66hw>`_
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