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/Zephyr-latest/tests/drivers/build_all/gpio/
Daltera.overlay4 * SPDX-License-Identifier: Apache-2.0
9 #address-cells = <1>;
10 #size-cells = <1>;
13 #address-cells = <1>;
14 #size-cells = <1>;
15 test_intc: interrupt-controller {
16 compatible = "riscv,cpu-intc";
17 #address-cells = < 0x0 >;
18 #interrupt-cells = < 0x1 >;
19 interrupt-controller;
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/Zephyr-latest/include/zephyr/usb/
Dusb_ch9.h4 * SPDX-License-Identifier: Apache-2.0
31 uint8_t direction : 1; member
33 uint8_t direction : 1;
39 /** USB Setup Data packet defined in spec. Table 9-2 */
51 /** USB Setup packet RequestType Direction values (from Table 9-2) */
55 /** USB Setup packet RequestType Type values (from Table 9-2) */
61 /** USB Setup packet RequestType Recipient values (from Table 9-2) */
67 /** Get data transfer direction from bmRequestType */
75 * @brief Check if request transfer direction is to host.
78 * @return true If transfer direction is to host
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/Zephyr-latest/drivers/gpio/
Dgpio_altera_pio.c4 * SPDX-License-Identifier: Apache-2.0
26 uint8_t direction; member
42 const struct gpio_altera_config *cfg = dev->config; in gpio_pin_direction()
43 const int direction = cfg->direction; in gpio_pin_direction() local
44 uintptr_t reg_base = cfg->reg_base; in gpio_pin_direction()
49 return -EINVAL; in gpio_pin_direction()
52 /* Check if the direction is Bidirectional */ in gpio_pin_direction()
53 if (direction != 0) { in gpio_pin_direction()
54 return -EINVAL; in gpio_pin_direction()
71 const struct gpio_altera_config *cfg = dev->config; in gpio_altera_configure()
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Dgpio_andes_atcgpio100.c4 * SPDX-License-Identifier: Apache-2.0
16 #include <zephyr/dt-bindings/gpio/andestech-atcgpio100.h>
30 #define REG_DIR 0x28 /* Channel direction reg. */
35 #define REG_INTE 0x50 /* Interrupt enable reg. */
36 #define REG_IMD0 0x54 /* Interrupt mode 0 ~ 7 reg. */
37 #define REG_IMD1 0x58 /* Interrupt mode 8 ~ 15 reg. */
38 #define REG_IMD2 0x5C /* Interrupt mode 16 ~ 23 reg. */
39 #define REG_IMD3 0x60 /* Interrupt mode 24 ~ 31 reg. */
40 #define REG_ISTA 0x64 /* Interrupt status reg. */
41 #define REG_DEBE 0x70 /* De-bounce enable reg. */
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Dgpio_grgpio.h4 * SPDX-License-Identifier: Apache-2.0
12 uint32_t dir; /* 0x08 I/O port direction register */
13 uint32_t imask; /* 0x0C Interrupt mask register */
14 uint32_t ipol; /* 0x10 Interrupt polarity register */
15 uint32_t iedge; /* 0x14 Interrupt edge register */
18 uint32_t irqmap[4]; /* 0x20 - 0x2C Interrupt map registers */
23 uint32_t iavail; /* 0x40 Interrupt available register */
24 uint32_t iflag; /* 0x44 Interrupt flag register */
28 uint32_t output_or; /* 0x54 I/O port output register, logical-OR */
29 uint32_t dir_or; /* 0x58 I/O port dir. register, logical-OR */
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DKconfig4 # SPDX-License-Identifier: Apache-2.0
7 bool "General-Purpose Input/Output (GPIO) drivers"
14 module-str = gpio
55 bool "Support for querying GPIO direction [EXPERIMENTAL]"
59 direction state.
61 With this option enabled, the application may query GPIO direction
88 bool "Support for enable/disable interrupt without re-config [EXPERIMENTAL]"
91 This option enables the support for enabling/disabling interrupt with
92 previous configuration, and enabling/disabling the interrupt only turns
93 on/off the interrupt signal without changing other registers, such as
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Dgpio_xlnx_ps_bank.c6 * SPDX-License-Identifier: Apache-2.0
24 #define DEV_CFG(_dev) ((const struct gpio_xlnx_ps_bank_dev_cfg *)(_dev)->config)
25 #define DEV_DATA(_dev) ((struct gpio_xlnx_ps_bank_dev_data *const)(_dev)->data)
34 * - Pull up
35 * - Pull down
36 * - Open drain
37 * - Open source.
45 * -EINVAL if the specified pin index is out of range,
46 * -ENOTSUP if the pin configuration data contains a flag
64 return -ENOTSUP; in gpio_xlnx_ps_pin_configure()
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Dgpio_max14906.c5 * SPDX-License-Identifier: Apache-2.0
29 struct max14906_data *data = dev->data; in max14906_pars_spi_diag()
33 LOG_ERR("[DIAG] MAX14906 in SPI diag - error detected\n"); in max14906_pars_spi_diag()
34 data->glob.interrupt.reg_bits.SHT_VDD_FAULT = MAX149X6_GET_BIT(rx_diag_buff[0], 5); in max14906_pars_spi_diag()
35 data->glob.interrupt.reg_bits.ABOVE_VDD_FAULT = in max14906_pars_spi_diag()
37 data->glob.interrupt.reg_bits.OW_OFF_FAULT = MAX149X6_GET_BIT(rx_diag_buff[0], 3); in max14906_pars_spi_diag()
38 data->glob.interrupt.reg_bits.CURR_LIM = MAX149X6_GET_BIT(rx_diag_buff[0], 2); in max14906_pars_spi_diag()
39 data->glob.interrupt.reg_bits.OVER_LD_FAULT = MAX149X6_GET_BIT(rx_diag_buff[0], 1); in max14906_pars_spi_diag()
43 ret = -EIO; in max14906_pars_spi_diag()
45 PRINT_ERR(data->glob.interrupt.reg_bits.SHT_VDD_FAULT); in max14906_pars_spi_diag()
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Dgpio_sedi.c3 * SPDX-License-Identifier: Apache-2.0
37 const struct gpio_sedi_config *config = dev->config; in gpio_sedi_suspend_device()
38 sedi_gpio_t gpio_dev = config->device; in gpio_sedi_suspend_device()
42 return -EBUSY; in gpio_sedi_suspend_device()
48 return -EIO; in gpio_sedi_suspend_device()
56 const struct gpio_sedi_config *config = dev->config; in gpio_sedi_resume_device_from_suspend()
57 sedi_gpio_t gpio_dev = config->device; in gpio_sedi_resume_device_from_suspend()
62 return -EIO; in gpio_sedi_resume_device_from_suspend()
82 ret = -ENOTSUP; in gpio_sedi_pm_action()
96 (struct gpio_sedi_data *)(dev->data); in gpio_sedi_callback()
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/Zephyr-latest/arch/x86/core/ia32/
Dintstub.S2 * Copyright (c) 2010-2014 Wind River Systems, Inc.
4 * SPDX-License-Identifier: Apache-2.0
9 * @brief Interrupt management support for IA-32 architecture
12 * the Intel IA-32 architecture. More specifically, the interrupt (asynchronous
14 * entering and exiting a C interrupt handler.
41 * @brief Inform the kernel of an interrupt
43 * This function is called from the interrupt stub created by IRQ_CONNECT()
44 * to inform the kernel of an interrupt. This routine increments
45 * _kernel.nested (to support interrupt nesting), switches to the
46 * base of the interrupt stack, if not already on the interrupt stack, and then
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Dexcstub.S2 * Copyright (c) 2011-2015 Wind River Systems, Inc.
4 * SPDX-License-Identifier: Apache-2.0
9 * @brief Exception management support for IA-32 architecture
12 * interrupts) on the Intel IA-32 architecture. More specifically,
36 * _not_ increment a thread/interrupt specific exception count. Also,
44 * Host-based tools and the target-based GDB agent depend on the stack frame
57 * The gen_idt tool creates an interrupt-gate descriptor for
66 * Clear the direction flag. It is automatically restored when the
81 * ESP -> ECX (excepting task)
118 leal 44(%esp), %eax /* Calculate ESP before interrupt occurred */
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/Zephyr-latest/soc/mediatek/mt8xxx/
Dmbox.c2 * SPDX-License-Identifier: Apache-2.0
12 /* Mailbox: a simple interrupt source. Each direction has a 5-bit
13 * command register and will latch an interrupt if any of the bits are
14 * non-zero. The interrupt bits get cleared/acknowledged by writing
16 * scratch registers for use as message data in each direction.
23 * There is an array of the devices. Linux's device-tree defines two.
71 struct mbox_data *data = ((struct device *)mbox)->data; in mtk_adsp_mbox_set_handler()
74 data->handlers[chan] = handler; in mtk_adsp_mbox_set_handler()
75 data->handler_arg[chan] = arg; in mtk_adsp_mbox_set_handler()
81 const struct mbox_cfg *cfg = ((struct device *)mbox)->config; in mtk_adsp_mbox_signal()
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/Zephyr-latest/drivers/usb/device/
Dusb_dc_sam_usbhs.c4 * SPDX-License-Identifier: Apache-2.0
30 * The new Atmel DFP headers provide mode-specific interrupt register field
54 BUILD_ASSERT(USB_MAXIMUM_SPEED, "low-speed is not supported");
75 PMC->CKGR_UCKR |= CKGR_UCKR_UPLLEN; in usb_dc_enable_clock()
78 while (!(PMC->PMC_SR & PMC_SR_LOCKU)) { in usb_dc_enable_clock()
83 if ((USBHS->USBHS_DEVCTRL & USBHS_DEVCTRL_SPDCONF_Msk) in usb_dc_enable_clock()
86 PMC->PMC_MCKR &= ~PMC_MCKR_UPLLDIV2; in usb_dc_enable_clock()
87 PMC->PMC_USB = PMC_USB_USBDIV(9) | PMC_USB_USBS; in usb_dc_enable_clock()
90 PMC->PMC_SCER |= PMC_SCER_USBCLK; in usb_dc_enable_clock()
98 PMC->PMC_SCER &= ~PMC_SCER_USBCLK; in usb_dc_disable_clock()
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/Zephyr-latest/include/zephyr/drivers/pcie/endpoint/
Dpcie_ep.h8 * SPDX-License-Identifier: Apache-2.0
23 PCIE_OB_LOWMEM, /**< PCIe OB window within 32-bit address range */
24 PCIE_OB_HIGHMEM, /**< PCIe OB window above 32-bit address range */
28 PCIE_EP_IRQ_LEGACY, /**< Raise Legacy interrupt */
29 PCIE_EP_IRQ_MSI, /**< Raise MSI interrupt */
30 PCIE_EP_IRQ_MSIX, /**< Raise MSIX interrupt */
49 * These callbacks execute in interrupt context. Therefore, use only
50 * interrupt-safe APIS. Registration of callbacks is done via
95 (const struct pcie_ep_driver_api *)dev->api; in pcie_ep_conf_read()
97 return api->conf_read(dev, offset, data); in pcie_ep_conf_read()
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/Zephyr-latest/drivers/dai/nxp/sai/
Dsai.c4 * SPDX-License-Identifier: Apache-2.0
26 * 2) The SAI ISR should stop the SAI whenever a FIFO error interrupt
53 cfg = dev->config; in sai_mclk_config()
54 data = dev->data; in sai_mclk_config()
56 mclk_config.mclkOutputEnable = cfg->mclk_is_output; in sai_mclk_config()
65 ret = get_mclk_rate(&cfg->clk_data, bclk_source, &mclk_rate); in sai_mclk_config()
73 LOG_DBG("target MCLK is %u", bespoke->mclk_rate); in sai_mclk_config()
79 mclk_config.mclkHz = bespoke->mclk_rate; in sai_mclk_config()
82 SAI_SetMasterClockConfig(UINT_TO_I2S(data->regmap), &mclk_config); in sai_mclk_config()
84 set_msel(data->regmap, msel); in sai_mclk_config()
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/Zephyr-latest/arch/x86/include/
Dkernel_arch_data.h3 * SPDX-License-Identifier: Apache-2.0
10 * Exception/interrupt vector definitions: vectors 20 to 31 are reserved
11 * for Intel; vectors 32 to 255 are user defined interrupt vectors.
41 * EFLAGS/RFLAGS definitions. (RFLAGS is just zero-extended EFLAGS.)
45 #define EFLAGS_DF BIT(10) /* Direction flag */
/Zephyr-latest/drivers/dma/
Ddma_intel_adsp_hda.c4 * SPDX-License-Identifier: Apache-2.0
34 const struct intel_adsp_hda_dma_cfg *const cfg = dev->config; in intel_adsp_hda_dma_host_in_config()
39 __ASSERT(channel < cfg->dma_channels, "Channel does not exist"); in intel_adsp_hda_dma_host_in_config()
40 __ASSERT(dma_cfg->block_count == 1, in intel_adsp_hda_dma_host_in_config()
43 __ASSERT(dma_cfg->channel_direction == cfg->direction, in intel_adsp_hda_dma_host_in_config()
44 "Unexpected channel direction, HDA host in supports " in intel_adsp_hda_dma_host_in_config()
47 blk_cfg = dma_cfg->head_block; in intel_adsp_hda_dma_host_in_config()
48 buf = (uint8_t *)(uintptr_t)(blk_cfg->source_address); in intel_adsp_hda_dma_host_in_config()
49 res = intel_adsp_hda_set_buffer(cfg->base, cfg->regblock_size, channel, buf, in intel_adsp_hda_dma_host_in_config()
50 blk_cfg->block_size); in intel_adsp_hda_dma_host_in_config()
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Ddma_dw_axi.c4 * SPDX-License-Identifier: Apache-2.0
17 #define DEV_CFG(_dev) ((const struct dma_dw_axi_dev_cfg *)(_dev)->config)
18 #define DEV_DATA(_dev) ((struct dma_dw_axi_dev_data *const)(_dev)->data)
29 #define DMA_DW_AXI_GET_MSIZE(blen) ((blen == 1) ? (0U) : (find_msb_set(blen) - 2U))
82 /* channel interrupt status enable register */
84 /* channel interrupt status register */
86 /* channel interrupt signal enable register */
88 /* channel interrupt clear register */
91 /* bitfield configuration for multi-block transfer */
111 /* interrupt on completion of block transfer */
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/Zephyr-latest/drivers/wifi/infineon/
Dairoc_whd_hal_sdio.c5 * SPDX-License-Identifier: Apache-2.0
42 struct airoc_wifi_data *data = dev->data; in airoc_wifi_init_primary()
43 const struct airoc_wifi_config *config = dev->config; in airoc_wifi_init_primary()
52 .host_oob_pin = (void *)&config->wifi_host_wake_gpio, in airoc_wifi_init_primary()
62 return -ENODEV; in airoc_wifi_init_primary()
65 if (!device_is_ready(config->bus_dev.bus_sdio)) { in airoc_wifi_init_primary()
67 return -ENODEV; in airoc_wifi_init_primary()
70 ret = sd_init(config->bus_dev.bus_sdio, &data->card); in airoc_wifi_init_primary()
76 ret = sdio_init_func(&data->card, &data->sdio_func1, BACKPLANE_FUNCTION); in airoc_wifi_init_primary()
81 ret = sdio_init_func(&data->card, &data->sdio_func2, WLAN_FUNCTION); in airoc_wifi_init_primary()
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/Zephyr-latest/include/zephyr/drivers/mfd/
Dmfd_ite_it8801.h4 * SPDX-License-Identifier: Apache-2.0
17 /* 0xf9: Gather interrupt status register */
20 /* 0xfb: Gather interrupt enable control register */
55 /* GPIO direction */
63 /* GPIO pull-down enable */
65 /* GPIO pull-up enable */
80 /* Control push-pull flag */
82 /* 0x5f: PWM output open-drain disable register */
121 /* Define the IT8801 MFD interrupt callback function handler */
129 /* Register the interrupt of IT8801 MFD callback function */
/Zephyr-latest/dts/bindings/gpio/
Dxlnx,ps-gpio.yaml3 # SPDX-License-Identifier: Apache-2.0
7 Xilinx Zynq-7000/ZynqMP MIO/EMIO GPIO controller node.
9 This GPIO controller is contained in both the Xilinx Zynq-7000 and
11 which can be mapped in the system design tools (MIO pins), or SoC-
18 Zynq-7000 (comp. Zynq-7000 TRM, chap. 14.1.2, p. 381):
32 The controller is interrupt-capable. Certain pins both in the Zynq-
34 direction.
36 compatible: "xlnx,ps-gpio"
/Zephyr-latest/include/zephyr/dt-bindings/sensor/
Dtmag5273.h4 * SPDX-License-Identifier: Apache-2.0
9 #include <zephyr/dt-bindings/dt-util.h>
34 /* Interrupt-Mode */
44 /* Threshold direction */
/Zephyr-latest/drivers/i2c/
Di2c_imx.c5 * SPDX-License-Identifier: Apache-2.0
21 #include "i2c-priv.h"
24 ((I2C_Type *)((const struct i2c_imx_config * const)(dev)->config)->base)
54 struct i2c_imx_data *data = dev->data; in i2c_imx_write()
55 struct i2c_master_transfer *transfer = &data->transfer; in i2c_imx_write()
57 transfer->isBusy = true; in i2c_imx_write()
59 /* Clear I2C interrupt flag to avoid spurious interrupt */ in i2c_imx_write()
64 transfer->currentDir = i2cDirectionTransmit; in i2c_imx_write()
66 transfer->txBuff = txBuffer; in i2c_imx_write()
67 transfer->txSize = txSize; in i2c_imx_write()
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/Zephyr-latest/arch/xtensa/core/
Dgen_vectors.py3 # SPDX-License-Identifier: Apache-2.0
9 # Takes a pre-processed (gcc -dM) core-isa.h file as its first
20 # lacks VECBASE, but the core-isa.h interface is inexplicably
36 # + XEA2 interrupt vectors are in sections named
39 # exist) are technically implemented as standard interrupt vectors
40 # (of a platform-dependent level), but the code for them is emitted
42 # and not a section corresponding to their interrupt level.
46 # can only back-reference immediates for MOVI/L32R instructions) as
57 # Translation for the core-isa.h vs. linker section naming conventions
90 # direction, so ignore the INTLEVEL
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/Zephyr-latest/drivers/ieee802154/
Dieee802154_dw1000_regs.h4 * SPDX-License-Identifier: Apache-2.0
7 * https://github.com/Decawave/mynewt-dw1000-core.git
14 * Copyright (C) 2017-2018, Decawave Limited, All Rights Reserved
24 * http://www.apache.org/licenses/LICENSE-2.0
75 /* Frame Filtering Behave as a Co-ordinator */
91 /* Host interrupt polarity */
117 * Receiver Auto-Re-enable.
118 * This bit is used to cause the receiver to re-enable automatically
126 /* System Time Counter (40-bit) */
180 * of non-standard values
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