| /Zephyr-latest/drivers/i2c/ |
| D | Kconfig | 1 # I2C configuration options
7 # I2C options
9 menuconfig I2C config
10 bool "Inter-Integrated Circuit (I2C) bus drivers"
12 Enable I2C Driver Configuration
14 if I2C
17 bool "I2C Shell"
20 Enable I2C Shell.
22 The I2C shell supports scanning, bus recovery, I2C read and write
26 bool "I2C device Stats"
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| D | i2c_ll_stm32_v1.c | 7 * I2C Driver for: STM32F1, STM32F2, STM32F4 and STM32L1
18 #include <zephyr/drivers/i2c.h>
25 #include "i2c-priv.h"
34 static void stm32_i2c_generate_start_condition(I2C_TypeDef *i2c) in stm32_i2c_generate_start_condition() argument
36 uint16_t cr1 = LL_I2C_ReadReg(i2c, CR1); in stm32_i2c_generate_start_condition()
40 LL_I2C_WriteReg(i2c, CR1, cr1 & ~I2C_CR1_STOP); in stm32_i2c_generate_start_condition()
43 LL_I2C_GenerateStartCondition(i2c); in stm32_i2c_generate_start_condition()
52 I2C_TypeDef *i2c = cfg->i2c; in stm32_i2c_disable_transfer_interrupts() local
54 LL_I2C_DisableIT_TX(i2c); in stm32_i2c_disable_transfer_interrupts()
55 LL_I2C_DisableIT_RX(i2c); in stm32_i2c_disable_transfer_interrupts()
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| D | i2c_npcx_controller.h | 17 * @brief Lock the mutex of npcx i2c controller.
19 * @param i2c_dev Pointer to the device structure for i2c controller instance.
24 * @brief Unlock the mutex of npcx i2c controller.
26 * @param i2c_dev Pointer to the device structure for i2c controller instance.
31 * @brief Configure operation of a npcx i2c controller.
33 * @param i2c_dev Pointer to the device structure for i2c controller instance.
35 * for the I2C controller.
39 * @retval -ERANGE Out of supported i2c frequency.
44 * @brief Get I2C controller speed.
46 * @param i2c_dev Pointer to the device structure for i2c controller instance.
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| D | Kconfig.it8xxx2 | 5 bool "ITE IT8XXX2 I2C driver"
10 Enable I2C support on it8xxx2_evb.
17 bool "IT8XXX2 I2C FIFO mode"
21 the time between each byte to improve the I2C bus clock
22 stretching during I2C transaction.
23 The I2C controller supports two 32-bytes FIFOs,
25 I2C FIFO mode of it8xxx2 can support I2C APIs including:
31 bool "ITE IT8XXX2 I2C enhance driver"
36 This option can enable the enhance I2C
42 bool "IT8XXX2 I2C command queue mode"
[all …]
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| D | i2c_max32.c | 10 #include <zephyr/drivers/i2c.h>
75 mxc_i2c_regs_t *i2c = cfg->regs; in api_configure() local
78 case I2C_SPEED_STANDARD: /** I2C Standard Speed: 100 kHz */ in api_configure()
79 ret = MXC_I2C_SetFrequency(i2c, MXC_I2C_STD_MODE); in api_configure()
82 case I2C_SPEED_FAST: /** I2C Fast Speed: 400 kHz */ in api_configure()
83 ret = MXC_I2C_SetFrequency(i2c, MXC_I2C_FAST_SPEED); in api_configure()
87 case I2C_SPEED_FAST_PLUS: /** I2C Fast Plus Speed: 1 MHz */ in api_configure()
88 ret = MXC_I2C_SetFrequency(i2c, MXC_I2C_FASTPLUS_SPEED); in api_configure()
93 case I2C_SPEED_HIGH: /** I2C High Speed: 3.4 MHz */ in api_configure()
94 ret = MXC_I2C_SetFrequency(i2c, MXC_I2C_HIGH_SPEED); in api_configure()
[all …]
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| D | i2c_ll_stm32_v2.c | 7 * I2C Driver for: STM32F0, STM32F3, STM32F7, STM32L0, STM32L4, STM32WB and
19 #include <zephyr/drivers/i2c.h>
28 #include "i2c-priv.h"
33 /* Use the algorithm to calcuate the I2C timing */
126 I2C_TypeDef *i2c = cfg->i2c; in msg_init() local
128 if (LL_I2C_IsEnabledReloadMode(i2c)) { in msg_init()
129 LL_I2C_SetTransferSize(i2c, msg->len); in msg_init()
132 LL_I2C_SetMasterAddressingMode(i2c, in msg_init()
134 LL_I2C_SetSlaveAddr(i2c, (uint32_t) slave); in msg_init()
136 LL_I2C_SetMasterAddressingMode(i2c, in msg_init()
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| D | i2c_max32_rtio.c | 10 #include <zephyr/drivers/i2c.h>
11 #include <zephyr/drivers/i2c/rtio.h>
72 mxc_i2c_regs_t *i2c = cfg->regs; in max32_do_configure() local
75 case I2C_SPEED_STANDARD: /** I2C Standard Speed: 100 kHz */ in max32_do_configure()
76 ret = MXC_I2C_SetFrequency(i2c, MXC_I2C_STD_MODE); in max32_do_configure()
79 case I2C_SPEED_FAST: /** I2C Fast Speed: 400 kHz */ in max32_do_configure()
80 ret = MXC_I2C_SetFrequency(i2c, MXC_I2C_FAST_SPEED); in max32_do_configure()
84 case I2C_SPEED_FAST_PLUS: /** I2C Fast Plus Speed: 1 MHz */ in max32_do_configure()
85 ret = MXC_I2C_SetFrequency(i2c, MXC_I2C_FASTPLUS_SPEED); in max32_do_configure()
90 case I2C_SPEED_HIGH: /** I2C High Speed: 3.4 MHz */ in max32_do_configure()
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| D | i2c_npcx_port.c | 11 * @brief Nuvoton NPCX smb/i2c port driver
13 * This file contains the driver of SMBus/I2C buses (ports) which provides
14 * pin-muxing for each i2c io-pads. In order to support "SMBus Multi-Bus"
16 * between Zephyr i2c api functions and i2c controller driver which provides
17 * full support for SMBus/I2C transactions.
23 * SDA_N Port 0----| |----| SMB/I2C |
33 #include <zephyr/drivers/i2c.h>
35 #include <zephyr/dt-bindings/i2c/i2c.h>
42 #include "i2c-priv.h"
53 /* I2C api functions */
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| D | Kconfig.sc18im704 | 5 bool "NXP SC18IM704 I2C controller driver"
10 Enables NXP SC18IM704 I2C controller driver
15 int "SC18IM704 I2C init priority"
18 SC18IM704 I2C controller initialization priority.
23 bool "Verify SC18IM704 I2C transfers"
26 Verify the I2C state register after I2C transfers to detect errors.
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| D | i2c_ifx_xmc4.c | 9 * @brief I2C driver for Infineon XMC MCU family.
17 #include <zephyr/drivers/i2c.h>
20 #include "i2c-priv.h"
52 /* I2C speed */
71 XMC_USIC_CH_t *i2c; member
104 /* Acquire semaphore (block I2C operation for another thread) */ in ifx_xmc4_i2c_configure()
109 XMC_I2C_CH_Stop(config->i2c); in ifx_xmc4_i2c_configure()
111 /* Configure the I2C resource */ in ifx_xmc4_i2c_configure()
113 XMC_I2C_CH_Init(config->i2c, &data->cfg); in ifx_xmc4_i2c_configure()
114 XMC_I2C_CH_SetInputSource(config->i2c, XMC_I2C_CH_INPUT_SCL, config->scl_src); in ifx_xmc4_i2c_configure()
[all …]
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| D | Kconfig.ifx_cat1 | 1 # Infineon CAT1 I2C configuration options
9 bool "Infineon CAT1 I2C driver"
15 This option enables the I2C driver for Infineon CAT1 family.
18 int "I2C Target data buffer length"
23 Buffer to receive data as an I2C Target.
26 bool "Support Asynchronous I2C driver"
30 Configure the I2C driver to be non-blocking/Asynchronous mode.
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| /Zephyr-latest/samples/drivers/i2c/rtio_loopback/ |
| D | README.rst | 1 .. zephyr:code-sample:: i2c-rtio-loopback
2 :name: I2C RTIO loopback
5 Perform I2C transfers between I2C controller and custom I2C target using RTIO.
10 This sample demonstrates how to perform I2C transfers, synchronously and async
11 using RTIO. It uses up to two I2C controllers, acting as I2C controller and
19 * Two I2C controllers, one supporting the I2C controller role, one supporting the
20 I2C peripheral role, both connected to the same I2C bus.
21 * An I2C controller supporting both I2C controller and peripheral role
26 Remember to set up the I2C bus, connecting SCL and SDA pull-up resistors, and
27 connecting the relevant I2C controllers to the bus physically.
[all …]
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| /Zephyr-latest/samples/modules/tflite-micro/magic_wand/renode/ |
| D | litex-vexriscv-tflite.resc | 11 logLevel 3 i2c
17 i2c.adxl345 MaxFifoDepth 1
18 i2c.adxl345 FeedSample $ORIGIN/circle.data
19 i2c.adxl345 FeedSample 0 15000 15000 128
20 i2c.adxl345 FeedSample 0 0 0 128
21 i2c.adxl345 FeedSample $ORIGIN/angle.data
22 i2c.adxl345 FeedSample 0 15000 15000 128
23 i2c.adxl345 FeedSample 0 0 0 128
24 i2c.adxl345 FeedSample $ORIGIN/circle.data
25 i2c.adxl345 FeedSample 0 15000 15000 128
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| /Zephyr-latest/dts/bindings/test/ |
| D | vnd,i2c-mux.yaml | 5 I2C mux
7 This is an I2C device that is also (multiple) I2C controllers. We
8 model this as a node which is an I2C device, whose children are I2C
9 controllers, and whose grandchildren are therefore I2C devices.
11 compatible: "vnd,i2c-mux"
13 include: "i2c-device.yaml"
16 description: I2C mux controller
17 compatible: "vnd,i2c-mux-controller"
18 include: "i2c-controller.yaml"
|
| /Zephyr-latest/tests/boards/mec15xxevb_assy6853/i2c_api/src/ |
| D | main.c | 7 #include <zephyr/drivers/i2c.h>
18 * @brief Test i2c api by communicating with pca95xx
20 * - get i2c mainline device
25 ZTEST(i2c, test_i2c_pca95xx) in ZTEST() argument
31 /* get i2c device */ in ZTEST()
32 const struct i2c_dt_spec i2c = I2C_DT_SPEC_GET(DT_COMPAT_GET_ANY_STATUS_OKAY(nxp_pca95xx)); in ZTEST() local
34 zassert_true(device_is_ready(i2c.bus), "I2C controller device is not ready"); in ZTEST()
36 /* configure i2c device */ in ZTEST()
37 ret = i2c_configure(i2c.bus, i2c_cfg); in ZTEST()
38 zassert_true(ret == 0, "Failed to configure i2c device"); in ZTEST()
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| /Zephyr-latest/doc/hardware/peripherals/ |
| D | i2c.rst | 3 Inter-Integrated Circuit (I2C) Bus
11 The terminology used in Zephyr I2C APIs follows that of the
12 `NXP I2C Bus Specification Rev 7.0 <i2c-specification_>`_. These changed
15 `I2C`_ (Inter-Integrated Circuit, pronounced "eye
18 on an I2C bus. Devices on the bus can operate in two roles: as a
20 "target" that responds to transaction commands. A I2C controller on a
26 I2C Controller API
29 Zephyr's I2C controller API is used when an I2C peripheral controls the bus,
31 the most common mode, used to interact with I2C devices like sensors and
34 This API is supported in all in-tree I2C peripheral drivers and is
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| /Zephyr-latest/drivers/led/ |
| D | is31fl3216a.c | 9 #include <zephyr/drivers/i2c.h>
33 struct i2c_dt_spec i2c; member
36 static int is31fl3216a_write_buffer(const struct i2c_dt_spec *i2c, in is31fl3216a_write_buffer() argument
41 status = i2c_write_dt(i2c, buffer, num_bytes); in is31fl3216a_write_buffer()
50 static int is31fl3216a_write_reg(const struct i2c_dt_spec *i2c, uint8_t reg, in is31fl3216a_write_reg() argument
55 return is31fl3216a_write_buffer(i2c, buffer, sizeof(buffer)); in is31fl3216a_write_reg()
58 static int is31fl3216a_update_pwm(const struct i2c_dt_spec *i2c) in is31fl3216a_update_pwm() argument
60 return is31fl3216a_write_reg(i2c, IS31FL3216A_REG_UPDATE, 0); in is31fl3216a_update_pwm()
97 status = is31fl3216a_write_buffer(&config->i2c, i2c_buffer, in is31fl3216a_led_write_channels()
103 return is31fl3216a_update_pwm(&config->i2c); in is31fl3216a_led_write_channels()
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| /Zephyr-latest/samples/boards/st/i2c_timing/ |
| D | README.rst | 2 :name: I2C V2 timings
5 Retrieve I2C V2 timings at runtime.
9 This sample simply demonstrate the **get_config** API of the stm32 I2C driver.
10 The I2C peripheral configuration is checked regarding the I2C bitrate which can be:
17 In case of the I2C V2, the I2C peripheral of the STM32 microcontrollers have
18 a TIMING register to write in order to generate the correct I2C clock signal.
19 This value depends on the peripheral clock input and the I2C speed.
23 Because the code sequence to calculate the I2C V2 TIMING value is heavy,
33 &i2c {
45 - enable ``i2c`` node in your board DT file.
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| /Zephyr-latest/tests/drivers/i2c/i2c_ram/ |
| D | testcase.yaml | 2 depends_on: i2c
5 - i2c
6 filter: dt_alias_exists("i2c-ram")
11 drivers.i2c.ram:
12 depends_on: i2c
15 - i2c
16 drivers.i2c.ram.rtio:
21 drivers.i2c.ram.pm:
27 drivers.i2c.ram.pm.rtio:
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| /Zephyr-latest/tests/boards/mec172xevb_assy6906/i2c_api/src/ |
| D | main.c | 7 #include <zephyr/drivers/i2c.h>
18 * @brief Test i2c api by communicating with pca95xx
20 * - get i2c mainline device
31 /* get i2c device */ in ZTEST()
32 const struct i2c_dt_spec i2c = I2C_DT_SPEC_GET(DT_COMPAT_GET_ANY_STATUS_OKAY(nxp_pca95xx)); in ZTEST() local
34 zassert_true(device_is_ready(i2c.bus), "I2C controller device is not ready"); in ZTEST()
36 /* configure i2c device */ in ZTEST()
37 ret = i2c_configure(i2c.bus, i2c_cfg); in ZTEST()
38 zassert_true(ret == 0, "Failed to configure i2c device"); in ZTEST()
45 ret = i2c_write_dt(&i2c, datas, 3); in ZTEST()
[all …]
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| /Zephyr-latest/samples/drivers/i2c/custom_target/ |
| D | README.rst | 1 .. zephyr:code-sample:: i2c-custom-target
2 :name: I2C Custom Target
5 Setup a custom I2C target on the I2C interface.
10 This sample demonstrates how to setup an I2C custom target on the I2C interface
11 using the :ref:`i2c-target-api`.
16 This sample requires an I2C peripheral which is capable of acting as a target.
23 The code for this sample can be found in :zephyr_file:`samples/drivers/i2c/custom_target`.
28 :zephyr-app: samples/drivers/i2c/custom_target
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| /Zephyr-latest/drivers/i2c/target/ |
| D | Kconfig | 1 # I2C Target configuration options
7 # I2C options
10 bool "I2C Target Drivers"
12 Enable I2C Target Driver Configuration
20 I2C Target device driver initialization priority.
23 bool "I2C target driver for buffer mode [EXPERIMENTAL]"
28 source "drivers/i2c/target/Kconfig.eeprom"
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| /Zephyr-latest/samples/drivers/i2c/target_eeprom/ |
| D | README.rst | 1 .. zephyr:code-sample:: i2c-eeprom-target
2 :name: I2C Target
5 Setup an I2C target on the I2C interface.
10 This sample demonstrates how to setup and use the :ref:`i2c-target-api` using the
11 :dtcompatible:`zephyr,i2c-target-eeprom` device.
16 This sample requires an I2C peripheral which is capable of acting as a target.
23 The code for this sample can be found in :zephyr_file:`samples/drivers/i2c/target_eeprom`.
28 :zephyr-app: samples/drivers/i2c/target_eeprom
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| /Zephyr-latest/dts/bindings/i2c/ |
| D | st,stm32-i2c-v2.yaml | 4 description: STM32 I2C V2 controller
6 compatible: "st,stm32-i2c-v2"
8 include: [i2c-controller.yaml, pinctrl-device.yaml]
26 An optional table of pre-computed i2c timing values with the
33 Because timing value is valid for a given I2C peripheral clock
34 frequency and target I2C bus clock, each timing value must be
50 GPIO to which the I2C SCL signal is routed. This is only needed for
51 I2C bus recovery support.
56 GPIO to which the I2C SDA signal is routed. This is only needed for
57 I2C bus recovery support.
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| D | espressif,esp32-i2c.yaml | 5 description: ESP32 I2C
7 compatible: "espressif,esp32-i2c"
9 include: [i2c-controller.yaml, pinctrl-device.yaml]
24 GPIO to which the I2C SCL signal is routed. This is only required
26 the I2C bus in case of a communication failure
31 GPIO to which the I2C SDA signal is routed. This is only required
33 the I2C bus in case of a communication failure
37 description: Set I2C TX data as LSB
41 description: Set I2C RX data as LSB
46 Timeout for unchanged SCL during clock stretching of the I2C target in
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