1# Copyright (c) 2017 I-SENSE group of ICCS
2# SPDX-License-Identifier: Apache-2.0
3
4description: STM32 I2C V2 controller
5
6compatible: "st,stm32-i2c-v2"
7
8include: [i2c-controller.yaml, pinctrl-device.yaml]
9
10properties:
11  reg:
12    required: true
13
14  interrupts:
15    required: true
16
17  pinctrl-0:
18    required: true
19
20  pinctrl-names:
21    required: true
22
23  timings:
24    type: array
25    description: |
26        An optional table of pre-computed i2c timing values with the
27        matching clock configuration.
28
29        Precise timings values for a given Hardware can be pre-computed
30        with a tool like STM32CubeMX or directly from I2C_TIMINGR register
31        description.
32
33        Because timing value is valid for a given I2C peripheral clock
34        frequency and target I2C bus clock, each timing value must be
35        provided with the matching configuration.
36
37        The resulting table entries should look like <periph_clock
38        clock-frequency timing>
39
40        For example timings could be defined as
41
42            timings = <64000000 I2C_BITRATE_STANDARD 0x10707DBC>,
43                      <64000000 I2C_BITRATE_FAST 0x00603D56>,
44                      <56000000 I2C_BITRATE_STANDARD 0x10606DA4>,
45                      <56000000 I2C_BITRATE_FAST 0x00501D63>;
46
47  scl-gpios:
48    type: phandle-array
49    description: |
50      GPIO to which the I2C SCL signal is routed. This is only needed for
51      I2C bus recovery support.
52
53  sda-gpios:
54    type: phandle-array
55    description: |
56      GPIO to which the I2C SDA signal is routed. This is only needed for
57      I2C bus recovery support.
58