| /Zephyr-Core-2.7.6/dts/bindings/ethernet/ |
| D | ethernet-phy.yaml | 1 # Copyright (c) 2021 IP-Logix Inc.
2 # SPDX-License-Identifier: Apache-2.0
8 compatible: "ethernet-phy"
21 no-reset:
25 fixed-link:
30 - "10BASE-T Half-Duplex"
31 - "10BASE-T Full-Duplex"
32 - "100BASE-T Half-Duplex"
33 - "100BASE-T Full-Duplex"
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| D | ethernet,fixed-link.yaml | 3 # SPDX-License-Identifier: Apache-2.0
5 child-binding:
13 - 100
14 - 10
15 full-duplex:
18 description: The fixed link operates in full duplex mode
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| D | xlnx,gem.yaml | 3 # SPDX-License-Identifier: Apache-2.0
19 clock-frequency:
27 which it will be adjusted at run-time. Therefore, the value of this
29 respective GEM's TX clock - by default, this is the IO PLL.
31 mdc-divider:
42 init-mdio-phy:
46 Activates the management of a PHY associated with the controller in-
47 stance. If this parameter is activated at the board level, the de-
48 fault values of the associated parameters mdio-phy-address, phy-poll-
49 interval, link-speed and advertise-lower-link-speeds should be checked
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| /Zephyr-Core-2.7.6/include/net/ |
| D | mii.h | 4 * SPDX-License-Identifier: Apache-2.0
30 /** Auto-Negotiation Advertisement Register */
32 /** Auto-Negotiation Link Partner Ability Reg */
34 /** Auto-Negotiation Expansion Register */
36 /** Auto-Negotiation Next Page Transmit Register */
38 /** Auto-Negotiation Link Partner Received Next Page Reg */
54 /** Auto-Negotiation enable */
60 /** restart auto-negotiation */
62 /** full duplex mode */
76 /** 100BASE-T4 capable */
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| D | phy.h | 8 * Copyright (c) 2021 IP-Logix Inc.
10 * SPDX-License-Identifier: Apache-2.0
30 /** 10Base-T Half-Duplex */
32 /** 10Base-T Full-Duplex */
34 /** 100Base-T Half-Duplex */
36 /** 100Base-T Full-Duplex */
104 * @retval -EIO If communication with PHY failed.
105 * @retval -ENOTSUP If not supported.
114 (const struct ethphy_driver_api *)dev->api; in z_impl_phy_configure_link()
116 return api->cfg_link(dev, speeds); in z_impl_phy_configure_link()
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| /Zephyr-Core-2.7.6/drivers/ethernet/ |
| D | Kconfig.enc28j60 | 4 # SPDX-License-Identifier: Apache-2.0
10 ENC28J60C Stand-Alone Ethernet Controller
46 bool "ENC28J60 full duplex"
49 Enable Full Duplex. Device is configured half duplex
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| D | Kconfig.stm32_hal | 5 # SPDX-License-Identifier: Apache-2.0
7 DT_COMPAT_ST_STM32_ETHERNET := st,stm32-ethernet
89 PHY's carrier status is re-evaluated.
107 bool "Enable this if using half duplex"
110 Set this if using half duplex when autonegotiation is disabled otherwise
111 duplex mode is full duplex
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| D | phy_xlnx_gem.c | 6 * - Marvell Alaska 88E1111 (QEMU simulated PHY)
7 * - Marvell Alaska 88E1510/88E1518/88E1512/88E1514 (Zedboard)
8 * - Texas Instruments TLK105
9 * - Texas Instruments DP83822
12 * SPDX-License-Identifier: Apache-2.0
34 * @return 16-bit data word received from the PHY
44 * MDIO read operation as described in Zynq-7000 TRM, in phy_xlnx_gem_mdio_read()
80 * Wait until gem.net_status[phy_mgmt_idle] == 1 -> current command in phy_xlnx_gem_mdio_read()
97 * Read the data returned by the PHY -> lower 16 bits of the PHY main- in phy_xlnx_gem_mdio_read()
111 * @param value 16-bit data word to be written to the target register
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| D | eth_enc424j600.c | 1 /* ENC424J600 Stand-alone Ethernet Controller with SPI
7 * SPDX-License-Identifier: Apache-2.0
29 const struct enc424j600_config *config = dev->config; in enc424j600_write_sbc()
40 spi_write_dt(&config->spi, &tx); in enc424j600_write_sbc()
46 const struct enc424j600_config *config = dev->config; in enc424j600_write_sfru()
62 spi_write_dt(&config->spi, &tx); in enc424j600_write_sfru()
68 const struct enc424j600_config *config = dev->config; in enc424j600_read_sfru()
90 if (!spi_transceive_dt(&config->spi, &tx, &rx)) { in enc424j600_read_sfru()
101 const struct enc424j600_config *config = dev->config; in enc424j600_modify_sfru()
117 spi_write_dt(&config->spi, &tx); in enc424j600_modify_sfru()
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| D | eth_gecko.c | 5 * SPDX-License-Identifier: Apache-2.0
12 * - no link monitoring through PHY interrupt
53 eth->NETWORKCTRL &= ~(ETH_NETWORKCTRL_ENBTX | ETH_NETWORKCTRL_ENBRX); in link_configure()
55 /* Set duplex mode and speed */ in link_configure()
56 val = eth->NETWORKCFG; in link_configure()
60 eth->NETWORKCFG = val; in link_configure()
63 eth->NETWORKCTRL |= (ETH_NETWORKCTRL_ENBTX | ETH_NETWORKCTRL_ENBRX); in link_configure()
69 ETH_TypeDef *eth = cfg->regs; in eth_gecko_setup_mac()
73 /* PHY auto-negotiate link parameters */ in eth_gecko_setup_mac()
74 result = phy_gecko_auto_negotiate(&cfg->phy, &link_status); in eth_gecko_setup_mac()
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| D | phy_gecko.c | 5 * SPDX-License-Identifier: Apache-2.0
18 /* Maximum time to establish a link through auto-negotiation for
19 * 10BASE-T, 100BASE-TX is 3.7s, to add an extra margin the timeout
27 eth->NETWORKCTRL |= ETH_NETWORKCTRL_MANPORTEN; in mdio_bus_enable()
33 eth->NETWORKCTRL &= ~ETH_NETWORKCTRL_MANPORTEN; in mdio_bus_disable()
41 while (!(eth->NETWORKSTATUS & ETH_NETWORKSTATUS_MANDONE)) { in mdio_bus_wait()
42 if (retries-- == 0U) { in mdio_bus_wait()
44 return -ETIMEDOUT; in mdio_bus_wait()
60 eth->PHYMNGMNT = ETH_PHYMNGMNT_WRITE0_DEFAULT in mdio_bus_send()
83 ETH_TypeDef *const eth = phy->regs; in phy_read()
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| D | eth_enc424j600_priv.h | 1 /* ENC424J600 Stand-alone Ethernet Controller with SPI
6 * SPDX-License-Identifier: Apache-2.0
266 /* Full-Duplex mode Inter-Packet Gap default value */
|
| /Zephyr-Core-2.7.6/dts/arm/xilinx/ |
| D | zynqmp.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv7-r.dtsi>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/ethernet/xlnx_gem.h>
15 compatible = "soc-nv-flash";
20 compatible = "mmio-sram";
30 interrupt-names = "irq_0";
43 interrupt-names = "irq_0", "irq_1", "irq_2";
57 interrupt-names = "irq_0", "irq_1", "irq_2";
71 interrupt-names = "irq_0", "irq_1", "irq_2";
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| /Zephyr-Core-2.7.6/dts/bindings/sensor/ |
| D | st,lis2mdl-common.yaml | 2 # SPDX-License-Identifier: Apache-2.0
5 irq-gpios:
6 type: phandle-array
14 single-mode:
21 cancel-offset:
28 spi-full-duplex:
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| /Zephyr-Core-2.7.6/doc/reference/networking/ |
| D | ethernet.rst | 28 * Half/full duplex
33 * :ref:`Priority queues <traffic-class-support>`
39 see what is supported by ``net iface`` net-shell command. It will print
|
| D | gptp.rst | 14 the `IEEE 802.1AS-2011 standard`_ (Timing and Synchronization for
15 Time-Sensitive Applications in Bridged Local Area Networks).
21 `IEEE 802.1AS-2011 standard`_. Mandatory requirements for a full-duplex
22 point-to-point link endpoint, as defined in Annex A of the standard,
38 - :ref:`frdm_k64f`
39 - :ref:`sam_e70_xplained`
40 - :ref:`native_posix` (only usable for simple testing, limited capabilities
42 - :ref:`qemu_x86` (emulated, limited capabilities due to lack of hardware clock)
49 - :kconfig:`CONFIG_NET_GPTP`
57 - ``ClockTargetPhaseDiscontinuity`` interface (:c:func:`gptp_register_phase_dis_cb`)
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| /Zephyr-Core-2.7.6/subsys/net/l2/ethernet/gptp/ |
| D | gptp_md.h | 4 * SPDX-License-Identifier: Apache-2.0
9 * @brief GPTP Media Dependent interface for full duplex and point to point
|
| /Zephyr-Core-2.7.6/soc/arm/nuvoton_npcx/npcx9/ |
| D | Kconfig.defconfig.series | 1 # Nuvoton Cortex-M4 Embedded Controller
4 # SPDX-License-Identifier: Apache-2.0
17 Disable Cortex-M system tick if NPCX_ITIM_TIMER is enabled.
24 controller generates both Low-Frequency clock domain (32.768 KHz,
25 i.e. LFCLK clock signal) and High-Frequency clock signals (OFMCLK,
33 modules which support full-duplex asynchronous receiver-transmitter
34 with 16-byte transmit and receive buffers.
41 ports that support input/output, input-only and output-only
49 modules. Each module generates a single 16-bit PWM output. A 16-bit
50 clock prescaler and a 16-bit counter determine the cycle time, the
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| /Zephyr-Core-2.7.6/boards/arm/ip_k66f/ |
| D | ip_k66f.dts | 4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
18 dsa-spi = &spi1;
24 zephyr,code-partition = &slot0_partition;
28 compatible = "gpio-leds";
42 clock-frequency = <120000000>;
46 pllfll-select = <KINETIS_SIM_PLLFLLSEL_MCGPLLCLK>;
47 er32k-select = <KINETIS_SIM_ER32KSEL_RTC>;
50 clock-div = <3>;
54 clock-div = <7>;
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| /Zephyr-Core-2.7.6/samples/net/cloud/mqtt_azure/ |
| D | README.rst | 1 .. _mqtt-azure-sample:
12 - Acquire a DHCPv4 lease
13 - Establish a TLS connection with Azure Cloud IoT hub
14 - Publish data to the Azure cloud
15 - SOCKS5 supported
16 - DNS supported
24 - Azure Cloud account
25 - Azure IOT Cloud credentials and required information
26 - Freedom Board (FRDM-K64F)
27 - Network connectivity
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| /Zephyr-Core-2.7.6/boards/xtensa/intel_s1000_crb/support/ |
| D | device.py | 5 # SPDX-License-Identifier: Apache-2.0
105 Transmit and receive full duplex data over SPI
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| /Zephyr-Core-2.7.6/samples/net/telnet/ |
| D | README.rst | 1 .. _telnet-console-sample:
18 - :ref:`networking_with_qemu`
34 .. zephyr-app-commands::
35 :zephyr-app: samples/net/telnet
36 :host-os: unix
43 .. code-block:: console
52 .. code-block:: console
64 Freedom-K64F Board
68 Freedom-K64F board. Unlike running it on QEMU, :ref:`Freedom-K64F board
73 logs, follow the :ref:`Freedom-K64F board <frdm_k64f>` documentation section.
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| /Zephyr-Core-2.7.6/boards/arm/sensortile_box/ |
| D | sensortile_box.dts | 4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/l4/stm32l4r9z(g-i)tx-pinctrl.dtsi>
13 compatible = "st,sensortile-box";
17 zephyr,shell-uart = &usart1;
23 compatible = "gpio-leds";
36 compatible = "gpio-keys";
51 clock-frequency = <DT_FREQ_M(16)>;
56 div-m = <4>;
57 mul-n = <40>;
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| /Zephyr-Core-2.7.6/boards/arm/sam4l_ek/doc/ |
| D | index.rst | 3 SAM4L-EK
9 The SAM4L series embeds picoPower technology for ultra-low power consumption.
14 provide full logic and RAM retention, associated with fast wake-up capability
18 interrupt wake-up support.
20 The SAM4L-EK is a full featured design to develop for Atmel SAM4L SoC series.
21 The kit is equipped with a rich set of peripherals that make the ATSAM4L-EK a
22 perfect evaluation platform. Download the `SAM4L-EK Online User Guide`_ for
25 .. image:: img/atmel-sam4l-ek-callouts.jpeg
28 :alt: SAM4L-EK
33 - ATSAM4LC4C ARM Cortex-M4 Processor
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| /Zephyr-Core-2.7.6/boards/arm/96b_avenger96/doc/ |
| D | index.rst | 10 multi-core processor, composed of a dual Cortex®-A7 and a single Cortex®-M4
11 core. Zephyr OS is ported to run on the Cortex®-M4 core.
13 - Board features:
15 - PMIC: STPMIC1A
16 - RAM: 1024 Mbyte @ 533MHz
17 - Storage:
19 - eMMC: v4.51: 8 Gbyte
20 - QSPI: 2Mbyte
21 - EEPROM: 128 byte
22 - microSD Socket: UHS-1 v3.01
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