1/*
2 * Copyright (c) 2020 DENX Software Engineering GmbH
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/dts-v1/;
8
9#include <nxp/MK66FN2M0VMD18.dtsi>
10
11/ {
12	model = "SEGGER MK66F IP Switch board";
13	compatible = "nxp,mk66f18", "nxp,k66f", "nxp,k6x";
14
15	aliases {
16		led0 = &red0_led;
17		led2 = &red2_led;
18		dsa-spi = &spi1;
19	};
20
21	chosen {
22		zephyr,sram = &sram0;
23		zephyr,flash = &flash0;
24		zephyr,code-partition = &slot0_partition;
25	};
26
27	leds {
28		compatible = "gpio-leds";
29		red0_led: led_0 {
30			gpios = <&gpioa 8 GPIO_ACTIVE_HIGH>;
31			label = "User LD1";
32		};
33
34		red2_led: led_2 {
35			gpios = <&gpioa 10 GPIO_ACTIVE_HIGH>;
36			label = "User LD2";
37		};
38	};
39};
40
41&cpu0 {
42	clock-frequency = <120000000>;
43};
44
45&sim {
46	pllfll-select = <KINETIS_SIM_PLLFLLSEL_MCGPLLCLK>;
47	er32k-select = <KINETIS_SIM_ER32KSEL_RTC>;
48
49	bus_clk {
50		clock-div = <3>;
51	};
52
53	flash_clk {
54		clock-div = <7>;
55	};
56};
57
58&gpioa {
59	status = "okay";
60};
61
62&gpiob {
63	status = "okay";
64};
65
66&flash0 {
67
68	partitions {
69		compatible = "fixed-partitions";
70		#address-cells = <1>;
71		#size-cells = <1>;
72
73		boot_partition: partition@0 {
74			label = "mcuboot";
75			reg = <0x00000000 0x00010000>;
76			read-only;
77		};
78
79		/*
80		 * The flash starting at 0x00010000 and ending at
81		 * 0x0001ffff (sectors 16-31) is reserved for use
82		 * by the application.
83		 */
84		storage_partition: partition@1e000 {
85			label = "storage";
86			reg = <0x0001e000 0x00002000>;
87		};
88
89		slot0_partition: partition@20000 {
90			label = "image-0";
91			reg = <0x00020000 0x00060000>;
92		};
93		slot1_partition: partition@80000 {
94			label = "image-1";
95			reg = <0x00080000 0x00060000>;
96		};
97		scratch_partition: partition@e0000 {
98			label = "image-scratch";
99			reg = <0x000e0000 0x00020000>;
100		};
101	};
102};
103
104&enet {
105	status = "okay";
106	pinctrl-0 = <&RMII0_RXD1_PTA12 &RMII0_RXD0_PTA13
107		     &RMII0_CRS_DV_PTA14 &RMII0_TXEN_PTA15
108		     &RMII0_TXD0_PTA16 &RMII0_TXD1_PTA17
109		     &ENET_1588_CLKIN_PTE26 /* used for RMII ref clk */>;
110
111	fixed-link {
112		speed = <100>;
113		full-duplex;
114	};
115};
116
117&spi1 {
118	status = "okay";
119	pinctrl-0 = <&SPI1_PCS0_PTB10 &SPI1_SCK_PTB11
120		     &SPI1_SOUT_PTB16 &SPI1_SIN_PTB17>;
121
122	clock-frequency = <44000000>;
123	cs-gpios = <&gpioe 4 GPIO_ACTIVE_LOW>;
124
125	ksz8794: dsa@0 {
126		compatible = "microchip,ksz8794";
127		reg = <0>;
128
129		label = "dsa";
130		spi-max-frequency = <44000000>;
131		reset-gpios = <&gpiob 22 GPIO_ACTIVE_LOW>;
132
133		spi-cpol;
134		spi-cpha;
135		dsa-master-port = <&enet>;
136		dsa-slave-ports = <3>;
137
138		lan3: lan_3 {
139			label = "lan3";
140		};
141
142		lan2: lan_2 {
143			label = "lan2";
144		};
145
146		lan1: lan_1 {
147			label = "lan1";
148		};
149	};
150};
151
152&gpioa {
153	status = "okay";
154};
155
156&gpiob {
157	status = "okay";
158};
159
160&gpioe {
161	status = "okay";
162};
163