1# Nuvoton Cortex-M4 Embedded Controller
2
3# Copyright (c) 2021 Nuvoton Technology Corporation.
4# SPDX-License-Identifier: Apache-2.0
5
6if SOC_SERIES_NPCX9
7
8config SOC_SERIES
9	default "npcx9"
10
11config NUM_IRQS
12	default 64
13
14config CORTEX_M_SYSTICK
15	default !NPCX_ITIM_TIMER
16	help
17	  Disable Cortex-M system tick if NPCX_ITIM_TIMER is enabled.
18
19config CLOCK_CONTROL_NPCX
20	default y
21	depends on CLOCK_CONTROL
22	help
23	  Enable support for NPCX clock controller driver. The NPCX clock
24	  controller generates both Low-Frequency clock domain (32.768 KHz,
25	  i.e. LFCLK clock signal) and High-Frequency clock signals (OFMCLK,
26	  AHB6_CLK, APBn_CLK, and FMCLK) for the Core domain modules.
27
28config UART_NPCX
29	default y
30	depends on SERIAL
31	help
32	  Enable support for NPCX UART driver. In NPCX9 series, it includes 4
33	  modules which support full-duplex asynchronous receiver-transmitter
34	  with 16-byte transmit and receive buffers.
35
36config GPIO_NPCX
37	default y
38	depends on GPIO
39	help
40	  Enable support for NPCX GPIO driver. In NPCX9 series, it includes 16
41	  ports that support input/output, input-only and output-only
42	  configurations.
43
44config PWM_NPCX
45	default y
46	depends on PWM
47	help
48	  Enable support for NPCX PWM driver. In NPCX9 series, it includes 8
49	  modules. Each module generates a single 16-bit PWM output. A 16-bit
50	  clock prescaler and a 16-bit counter determine the cycle time, the
51	  minimum possible pulse width and the duty cycle steps.
52
53config ADC_NPCX
54	default y
55	depends on ADC
56	help
57	  Enable support for NPCX ADC driver. In NPCX9 series, it includes a
58	  10-bit resolution Analog-to-Digital Converter (ADC). Up to 12 voltage
59	  inputs can be measured and a internal voltage reference (VREF), 2.816V
60	  (typical) is used for measurement.
61
62config WDT_NPCX
63	default y
64	depends on WATCHDOG
65	help
66	  Enable support for NPCX Watchdog driver. Besides watchdog
67	  functionality, it also provides the protection mechanism over software
68	  execution. After setting the configuration registers, the software can
69	  lock it to provide a higher level of protection against subsequent
70	  erroneous software action. Once a section of the TWD is locked, only
71	  reset or the unlock sequence releases it.
72
73config ESPI_NPCX
74	default y
75	depends on ESPI
76	help
77	  Enable support for NPCX ESPI driver. The Intel Enhanced Serial
78	  Peripheral Interface (eSPI) provides a path for migrating host
79	  sub-devices via LPC to a lower pin count, higher bandwidth bus.
80	  So far, this driver supports all of functionalities beside flash
81	  channel support. It will be supported in the future. Please refer
82	  https://www.intel.com/content/www/us/en/support/articles/000020952/
83	  software/chipset-software.html for more detail.
84
85config I2C_NPCX
86	default y
87	depends on I2C
88	help
89	  Enable support for NPCX I2C driver. The NPCX SMB/I2C modules provides
90	  full support for a two-wire SMBus/I2C synchronous serial interface.
91	  Each interface is a two-wire serial interface that is compatible with
92	  both Intel SMBus and Philips I2C physical layer. There are 8 SMBus
93	  modules and 10 buses in NPCX9 series.
94
95config TACH_NPCX
96	default y
97	depends on SENSOR
98	help
99	  Enable support for NPCX tachometer sensor driver. The NPCX9 series
100	  contains two tachometer (TACH) modules that contains two counters
101	  (counter A and B). They are used to capture/compare a counter value
102	  when an event is generated on comparison of signals match.
103
104if SOC_POWER_MANAGEMENT
105
106config PM
107	default y if SYS_CLOCK_EXISTS
108	help
109	  Enable the kernel handles extra power management policies whenever
110	  system enters idle state.
111
112config PM_DEVICE
113	default y
114	help
115	  Enable device power management support.
116
117endif # SOC_POWER_MANAGEMENT
118
119source "soc/arm/nuvoton_npcx/npcx9/Kconfig.defconfig.npcx9*"
120
121endif # SOC_SERIES_NPCX9
122