| /Zephyr-latest/dts/bindings/clock/ |
| D | nordic,nrf-hsfll-global.yaml | 17 supported-clock-frequencies = <64000000
36 supported-clock-frequencies:
38 description: Supported clock frequencies in ascending order
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| D | mediatek,mt8195_cpuclk.yaml | 9 description: Available frequencies in ascending order
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| D | nordic,nrf-hsfll-local.yaml | 7 The local HSFLL mixed-mode IP generates several clock frequencies in the range
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| /Zephyr-latest/include/zephyr/dt-bindings/clock/ |
| D | esp32c6_clock.h | 15 /* Supported CPU frequencies */
20 /* Supported XTAL Frequencies */
28 /* Supported RTC slow clock frequencies */
34 /* RTC slow clock frequencies */
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| D | esp32c2_clock.h | 15 /* Supported CPU frequencies */
22 /* Supported XTAL frequencies */
36 /* RTC slow clock frequencies */
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| D | esp32c3_clock.h | 15 /* Supported CPU frequencies */
20 /* Supported XTAL frequencies */
34 /* RTC slow clock frequencies */
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| D | esp32s2_clock.h | 16 /* Supported PLL CPU frequencies */
22 /* Supported XTAL frequencies */
35 /* RTC slow clock frequencies */
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| D | esp32_clock.h | 17 /* Supported PLL CPU frequencies */
23 /* Supported XTAL frequencies */
38 /* RTC slow clock frequencies */
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| D | esp32s3_clock.h | 15 /* Supported PLL CPU frequencies */
21 /* Supported XTAL frequencies */
35 /* RTC slow clock frequencies */
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| /Zephyr-latest/dts/bindings/usb/uac2/ |
| D | zephyr,uac2-clock-source.yaml | 48 sampling-frequencies:
52 Sampling Frequencies, in Hz, this Clock Source Entity can generate.
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| /Zephyr-latest/dts/bindings/timer/ |
| D | nxp,imx-gpt.yaml | 20 description: gpt frequencies
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| /Zephyr-latest/soc/atmel/sam/sam4e/ |
| D | soc.c | 64 * hurt lower clock frequencies. However, a high frequency with too in clock_init()
66 * is the safe setting for all of this SoCs usable frequencies. in clock_init()
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| /Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32h7_devices/boards/ |
| D | spi1_pllq_2_d1ppre_4.overlay | 13 * APB2 and PLL_Q clock frequencies are equal.
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| /Zephyr-latest/dts/bindings/cpu/ |
| D | espressif,riscv.yaml | 15 Defines the CPU clock source, each corresponding to different frequencies:
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| D | espressif,xtensa-lx6.yaml | 15 Defines the CPU clock source, each corresponding to different frequencies:
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| D | espressif,xtensa-lx7.yaml | 15 Defines the CPU clock source, each corresponding to different frequencies:
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| /Zephyr-latest/tests/kernel/timer/cycle64/ |
| D | testcase.yaml | 10 # As other platforms are added with varying timer frequencies, increase
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| /Zephyr-latest/soc/atmel/sam/sam4s/ |
| D | soc.c | 67 * hurt lower clock frequencies. However, a high frequency with too in clock_init()
69 * is the safe setting for all of this SoCs usable frequencies. in clock_init()
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| /Zephyr-latest/samples/drivers/memc/boards/ |
| D | frdm_rw612.overlay | 16 * higher frequencies at 3.3V
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| /Zephyr-latest/dts/bindings/sensor/ |
| D | ti,fdc2x1x.yaml | 233 1 = divide by 1. Choose for sensor frequencies between
235 2 = divide by 2. Choose for sensor frequencies between 5MHz
239 2 = divide by 2. Choose for sensor frequencies between
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| /Zephyr-latest/subsys/usb/device_next/class/ |
| D | usbd_uac2.c | 73 const uint8_t id, const uint32_t **frequencies);
587 const uint32_t *frequencies; in get_clock_source_request() local
599 count = clock_frequencies(c_data, clock_id, &frequencies); in get_clock_source_request()
605 frequencies[0]); in get_clock_source_request()
618 layout3_range_response(buf, setup->wLength, frequencies, in get_clock_source_request()
619 frequencies, NULL, count); in get_clock_source_request()
637 const uint32_t *frequencies; in set_clock_source_request() local
649 count = clock_frequencies(c_data, clock_id, &frequencies); in set_clock_source_request()
662 hz = find_closest(requested, frequencies, count); in set_clock_source_request()
976 const uint8_t id, const uint32_t **frequencies) in DT_INST_FOREACH_STATUS_OKAY()
[all …]
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| /Zephyr-latest/tests/subsys/usb/uac2/ |
| D | app.overlay | 21 sampling-frequencies = <48000>;
108 sampling-frequencies = <192000>;
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| /Zephyr-latest/samples/subsys/usb/uac2_explicit_feedback/ |
| D | app.overlay | 20 sampling-frequencies = <48000>;
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| /Zephyr-latest/drivers/mspi/ |
| D | Kconfig | 56 controllers that need this to proper function at high frequencies.
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| /Zephyr-latest/tests/drivers/sdhc/ |
| D | README.txt | 16 * Set_IO test: Verify that the SDHC will reject clock frequencies outside of
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