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/Zephyr-latest/dts/bindings/usb/
Dusb-audio-hs.yaml2 # SPDX-License-Identifier: Apache-2.0
8 compatible: "usb-audio-hs"
10 include: [usb-audio.yaml, usb-audio-feature-volume.yaml]
13 mic-resolution:
17 - 8
18 - 16
19 - 24
20 - 32
21 mic-sync-type:
29 - "No Synchronization"
[all …]
Dusb-audio-hp.yaml2 # SPDX-License-Identifier: Apache-2.0
8 compatible: "usb-audio-hp"
10 include: [usb-audio.yaml, usb-audio-feature-volume.yaml]
17 - 8
18 - 16
19 - 24
20 - 32
21 sample-rate-hz:
24 polling-interval:
27 # channel configuration options
[all …]
Dusb-audio-mic.yaml2 # SPDX-License-Identifier: Apache-2.0
8 compatible: "usb-audio-mic"
10 include: usb-audio.yaml
17 - 8
18 - 16
19 - 24
20 - 32
21 sync-type:
29 - "No Synchronization"
30 - "Asynchronous"
[all …]
/Zephyr-latest/drivers/interrupt_controller/
DKconfig.rv32m14 # SPDX-License-Identifier: Apache-2.0
12 Select this option to enable support for the RV32M1 INTMUX
15 eight channels; each channel has its own level 1 interrupt to
28 bool "INTMUX channel 0"
30 Enable support for INTMUX channel 0.
33 bool "INTMUX channel 1"
35 Enable support for INTMUX channel 1.
38 bool "INTMUX channel 2"
40 Enable support for INTMUX channel 2.
43 bool "INTMUX channel 3"
[all …]
/Zephyr-latest/dts/bindings/pwm/
Dtelink,b91-pwm.yaml2 # SPDX-License-Identifier: Apache-2.0
7 include: [pwm-controller.yaml, pinctrl-device.yaml, base.yaml]
9 compatible: "telink,b91-pwm"
13 pinctrl-0:
16 clock-frequency:
21 clk32k-ch0-enable:
23 description: Enable 32K Source Clock for PWM Channel 0
25 clk32k-ch1-enable:
27 description: Enable 32K Source Clock for PWM Channel 1
29 clk32k-ch2-enable:
[all …]
/Zephyr-latest/drivers/espi/
DKconfig.xec4 # SPDX-License-Identifier: Apache-2.0
12 Enable the Microchip XEC ESPI driver for MEC15xx family.
20 Enable the Microchip XEC ESPI driver for MEC172x series.
52 int "eSPI OOB channel buffer size in bytes"
61 int "eSPI Flash channel buffer size in bytes"
74 Enable the Microchip XEC TAF ESPI driver for MEC15xx family.
82 Enable the Microchip XEC TAF ESPI driver for MEC172x series.
112 Enable a 32 byte mailbox interface accessible via Host I/O over the
113 ESPI Peripheral Channel.
118 Enable ACPI EC2 interface accessible via Host I/O over the
[all …]
DKconfig4 # SPDX-License-Identifier: Apache-2.0
9 Enable ESPI Driver.
22 module-str = espi
38 bool "eSPI peripheral channel"
41 eSPI Controller supports peripheral channel.
44 bool "eSPI virtual wire channel"
47 eSPI Controller supports virtual wires channel.
54 Enable the checking of the eSPI virtual wire valid bit. If this
64 Enable automatic acknowledgment from eSPI target towards eSPI controller
75 Enable automatic acknowledgment from target basic configuration been
[all …]
/Zephyr-latest/drivers/serial/
DKconfig.rtt4 # SPDX-License-Identifier: Apache-2.0
14 This option enables access RTT channel as UART device.
25 …Enable UART on (default) RTT channel 0. Default channel has to be configured in non-blocking skip …
33 Enable UART on RTT channel 1
41 Enable UART on RTT channel 2
49 Enable UART on RTT channel 3
/Zephyr-latest/drivers/mbox/
Dmbox_nrfx_ipc.c4 * SPDX-License-Identifier: Apache-2.0
36 const struct mbox_nrf_conf *conf = dev->config; in is_rx_channel_valid()
38 return ((ch < IPC_CONF_NUM) && (conf->rx_mask & BIT(ch))); in is_rx_channel_valid()
43 const struct mbox_nrf_conf *conf = dev->config; in is_tx_channel_valid()
45 return ((ch < IPC_CONF_NUM) && (conf->tx_mask & BIT(ch))); in is_tx_channel_valid()
51 const struct device *dev = data->dev; in mbox_dispatcher()
53 uint32_t channel = event_idx; in mbox_dispatcher() local
55 if (!is_rx_channel_valid(dev, channel)) { in mbox_dispatcher()
56 LOG_WRN("RX event on illegal channel"); in mbox_dispatcher()
59 if (!(data->enabled_mask & BIT(channel))) { in mbox_dispatcher()
[all …]
/Zephyr-latest/drivers/ps2/
Dps2_npcx_controller.h4 * SPDX-License-Identifier: Apache-2.0
20 * @param channel_id Channel ID of the PS/2 to write data.
24 * @retval -EINVAL Channel ID is invalid.
25 * @retval -ETIMEDOUT Timeout occurred for a PS/2 write transaction.
31 * @brief Set the PS/2 controller to turn on/off the PS/2 channel.
34 * @param channel_id Channel ID of the PS/2 to enable or disable.
35 * @param enable True to enable channel, false to disable channel.
38 * @retval -EINVAL Channel ID is invalid.
40 int ps2_npcx_ctrl_enable_interface(const struct device *dev, uint8_t channel,
41 bool enable);
[all …]
Dps2_npcx_controller.c4 * SPDX-License-Identifier: Apache-2.0
21 #include <zephyr/dt-bindings/clock/npcx_clock.h>
30 * Set WDAT3-0 and clear CLK3-0 in the PSOSIG register to
39 * The max duration of a PS/2 clock is about 100 micro-seconds.
56 * (i.e. the bit position of CLK3-0 in the PS2_PSOSIG register)
71 ((struct ps2_reg *)((const struct ps2_npcx_ctrl_config *)(dev)->config)->base)
81 struct ps2_npcx_ctrl_data *const data = dev->data; in ps2_npcx_ctrl_configure()
84 LOG_ERR("unexpected channel ID: %d", channel_id); in ps2_npcx_ctrl_configure()
85 return -EINVAL; in ps2_npcx_ctrl_configure()
89 return -EINVAL; in ps2_npcx_ctrl_configure()
[all …]
/Zephyr-latest/dts/bindings/adc/
Dmaxim,max1125x-base.yaml3 include: [adc-controller.yaml, spi-device.yaml]
6 "#io-channel-cells":
8 gpio0-enable:
10 description: this option for gpio0 enable or disable
11 gpio1-enable:
13 description: this option for gpio1 enable or disable
14 gpio0-direction:
16 description: this option for gpio0 direction enable for input, disable for output
17 gpio1-direction:
19 description: this option for gpio0 direction enable for input, disable for output
[all …]
/Zephyr-latest/dts/bindings/dma/
Draspberrypi,pico-dma.yaml2 # SPDX-License-Identifier: Apache-2.0
7 channel: Select channel for data transmitting
10 Use the definitions defined in `zephyr/dt-bindings/dma/rpi-pico-dma-rp2040.h`,
11 or `zephyr/dt-bindings/dma/rpi-pico-dma-rp2350.h`
13 channel-config: A 32bit mask specifying the DMA channel configuration
14 - bit 3: Enable Quiet IRQ
15 - bit 1: Enable Byte Swap
16 - bit 0: Enable High Priority
18 compatible: "raspberrypi,pico-dma"
20 include: [dma-controller.yaml, reset-device.yaml]
[all …]
/Zephyr-latest/drivers/dma/
Ddma_dw_axi.c4 * SPDX-License-Identifier: Apache-2.0
17 #define DEV_CFG(_dev) ((const struct dma_dw_axi_dev_cfg *)(_dev)->config)
18 #define DEV_DATA(_dev) ((struct dma_dw_axi_dev_data *const)(_dev)->data)
29 #define DMA_DW_AXI_GET_MSIZE(blen) ((blen == 1) ? (0U) : (find_msb_set(blen) - 2U))
44 /* Channel enable by setting ch_en and ch_en_we */
46 /* Channel enable by setting ch_susp and ch_susp_we */
48 /* Channel enable by setting ch_abort and ch_abort_we */
51 /* channel susp/resume write enable pos */
53 /* channel resume bit pos */
58 /* source address register for a channel */
[all …]
Ddma_sam0.c4 * SPDX-License-Identifier: Apache-2.0
30 /* Handles DMA interrupts and dispatches to the individual channel */
33 struct dma_sam0_data *data = dev->data; in dma_sam0_isr()
35 uint16_t pend = DMA_REGS->INTPEND.reg; in dma_sam0_isr()
36 uint32_t channel; in dma_sam0_isr() local
38 /* Acknowledge all interrupts for the channel in pend */ in dma_sam0_isr()
39 DMA_REGS->INTPEND.reg = pend; in dma_sam0_isr()
41 channel = (pend & DMAC_INTPEND_ID_Msk) >> DMAC_INTPEND_ID_Pos; in dma_sam0_isr()
42 chdata = &data->channels[channel]; in dma_sam0_isr()
45 if (chdata->cb) { in dma_sam0_isr()
[all …]
Ddma_sam_xdmac.c4 * SPDX-License-Identifier: Apache-2.0
31 /* DMA channel configuration */
53 const struct sam_xdmac_dev_cfg *const dev_cfg = dev->config; in sam_xdmac_isr()
54 struct sam_xdmac_dev_data *const dev_data = dev->data; in sam_xdmac_isr()
56 Xdmac * const xdmac = dev_cfg->regs; in sam_xdmac_isr()
62 isr_status = xdmac->XDMAC_GIS; in sam_xdmac_isr()
64 for (int channel = 0; channel < DMA_CHANNELS_NO; channel++) { in sam_xdmac_isr() local
65 if (!(isr_status & (1 << channel))) { in sam_xdmac_isr()
69 channel_cfg = &dev_data->dma_channels[channel]; in sam_xdmac_isr()
71 /* Get channel errors */ in sam_xdmac_isr()
[all …]
/Zephyr-latest/dts/bindings/led/
Dti,lp5562.yaml5 include: i2c-device.yaml
8 red-output-current:
11 description: Output current of red channel in 0.1 mA (0-25.5 mA).
12 Default value is the power-on default. Valid range = 0 - 255
13 green-output-current:
16 description: Output current of green channel in 0.1 mA (0-25.5 mA)
17 Default value is the power-on default. Valid range = 0 - 255
18 blue-output-current:
21 description: Output current of blue channel in 0.1 mA (0-25.5 mA)
22 Default value is the power-on default. Valid range = 0 - 255
[all …]
/Zephyr-latest/tests/drivers/build_all/adc/boards/
Dnative_sim.overlay4 * SPDX-License-Identifier: Apache-2.0
9 * with real-world devicetree nodes, to allow these tests to run on
15 #address-cells = <1>;
16 #size-cells = <1>;
19 compatible = "zephyr,adc-emul";
21 ref-internal-mv = <3300>;
22 ref-external1-mv = <5000>;
23 #io-channel-cells = <1>;
29 gpio-controller;
31 #gpio-cells = <0x2>;
[all …]
/Zephyr-latest/drivers/pwm/
Dpwm_gd32.c4 * SPDX-License-Identifier: Apache-2.0
36 /** Flag to indicate if timer has 32-bit counter */
50 /** Obtain channel enable bit for the given channel */
52 /** Obtain polarity bit for the given channel */
54 /** Obtain CHCTL0/1 mask for the given channel (0 or 1) */
60 static int pwm_gd32_set_cycles(const struct device *dev, uint32_t channel, in pwm_gd32_set_cycles() argument
64 const struct pwm_gd32_config *config = dev->config; in pwm_gd32_set_cycles()
66 if (channel >= config->channels) { in pwm_gd32_set_cycles()
67 return -EINVAL; in pwm_gd32_set_cycles()
70 /* 16-bit timers can count up to UINT16_MAX */ in pwm_gd32_set_cycles()
[all …]
/Zephyr-latest/samples/bluetooth/bap_broadcast_sink/
DKconfig2 # SPDX-License-Identifier: Apache-2.0
9 # enable PAST support if we can
47 bool "Enable the LC3 codec"
48 # By default let's enable it in the platforms we know are capable of supporting it
64 phone or PC as a USB-in device (such as a USB microphone).
65 USB audio only supports a single audio channel.
68 bool "Use specific Broadcast Channel Audio Location"
72 Enables the use of a specific Channel Audio Location (see config TARGET_BROADCAST_CHANNEL).
75 int "Broadcast Channel Audio Location to sync to"
80 Channel Audio Location to sync to. These corresponds to the bt_audio_location,
/Zephyr-latest/subsys/bluetooth/controller/
DKconfig3 # Copyright (c) 2016-2017 Nordic Semiconductor ASA
4 # SPDX-License-Identifier: Apache-2.0
142 bool "Software-based BLE Link Layer"
154 Enable the Host Controller interface (HCI) in the Controller.
171 compliant with FIPS PUB 140-2.
177 A Controller implementation could also provide custom bare-metal
194 FIPS-197 compliant cryptographic implementations. In this case the
203 User-defined string that will be returned by the Zephyr VS Read Build
246 controller. Number of required RX buffers would worst-case be
299 int "Number of SDU fragments that the ISO-AL can buffer"
[all …]
/Zephyr-latest/dts/bindings/ospi/
Dst,stm32-ospi.yaml2 # SPDX-License-Identifier: Apache-2.0
9 pinctrl-0 = <&octospi_clk_pe9 &octospi_ncs_pe10 &octospi_dqs_pe11
16 dma-names = "tx_rx";
21 compatible: "st,stm32-ospi"
23 include: [base.yaml, pinctrl-device.yaml]
34 pinctrl-0:
37 pinctrl-names:
40 clock-names:
45 Optional DMA channel specifier, required for DMA transactions.
50 - &dma1: dma controller phandle
[all …]
/Zephyr-latest/dts/bindings/mbox/
Dnxp,s32-mru.yaml2 # SPDX-License-Identifier: Apache-2.0
14 - Each channel uses only the first mailbox, as current API does not allow
15 to group hardware channel's mailboxes in logical channels.
16 - The MTU is fixed to the size of one mailbox, as current API does not
17 allow variable length per channel.
19 In a normal use-case for IPC, the receiver core must enable and set the number
21 a devicetree overlay. In turn, the sender(s) must enable the MRU instance of the
30 rx-channels = <2>;
39 compatible: "nxp,s32-mru"
41 include: [base.yaml, mailbox-controller.yaml]
[all …]
/Zephyr-latest/dts/bindings/dac/
Dnxp,kinetis-dac32.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "nxp,kinetis-dac32"
8 include: [dac-controller.yaml, pinctrl-device.yaml]
14 voltage-reference:
19 low-power-mode:
21 description: Enable low-power mode
25 description: Enable output buffer
27 "#io-channel-cells":
30 io-channel-cells:
31 - output
/Zephyr-latest/drivers/adc/
DKconfig.nrfx4 # SPDX-License-Identifier: Apache-2.0
13 Enable support for nrfx ADC driver for nRF51 MCU series.
21 Number of ADC channels to be supported by the driver. Each channel
23 to be used when sampling this channel.
31 Enable support for nrfx SAADC driver.

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