Searched full:driving (Results 1 – 25 of 79) sorted by relevance
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/Zephyr-latest/dts/bindings/clock/ |
D | st,stm32-lse-clock.yaml | 11 driving-capability: 15 LSE driving capability, within the range 0 to 3. 16 0 represents the lowests driving capability, 3
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/Zephyr-latest/dts/bindings/pwm/ |
D | nxp,ftm-pwm.yaml | 26 * system: it's the bus interface clock driving the FTM module. Usually 33 driving the FTM module. Refer to the chip specific documentation for
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/Zephyr-latest/dts/bindings/display/ |
D | solomon,ssd16xx-common.yaml | 65 description: Gate driving voltage values 69 description: Source driving voltage values
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D | lcd-controller.yaml | 4 # Common fields for LCD controllers driving a panel.
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D | istech,ist3931.yaml | 42 description: LCD bias ratio of the voltage required for driving the LCD
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/Zephyr-latest/drivers/spi/ |
D | Kconfig.rpi_pico | 12 Enable driving SPI via PIO on the PICO
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/Zephyr-latest/dts/bindings/watchdog/ |
D | nxp,fs26-wdog.yaml | 15 The FS26 uses a 32-bit SPI interface. The MCU is the primary driving MOSI and 16 FS26 is the secondary driving MISO. Therefore the FS26 devicetree node must be
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/Zephyr-latest/include/zephyr/dt-bindings/gpio/ |
D | renesas-rz-gpio.h | 13 * The pin driving ability flags are encoded in the 8 upper bits of @ref gpio_dt_flags_t as 15 * - Bit 9..8: Pin driving ability value
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/Zephyr-latest/samples/basic/servo_motor/dts/bindings/ |
D | pwm-servo.yaml | 14 description: PWM specifier driving the servo motor.
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/Zephyr-latest/drivers/gpio/ |
D | Kconfig.mmio32 | 12 driving an LED, or chip-select line for an SPI device.
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/Zephyr-latest/dts/bindings/sensor/ |
D | st,vl53l1x.yaml | 14 Driving the XSHUT pin low puts the VL53L1X into hardware
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/Zephyr-latest/samples/boards/nordic/nrf_led_matrix/ |
D | README.rst | 18 of GPIOs available for driving an LED matrix. To do it, one needs to add an
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/Zephyr-latest/dts/bindings/spi/ |
D | microchip,xec-qmspi.yaml | 58 description: Delay in system clocks from CS# de-assertion to driving HOLD# and WP#
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D | microchip,xec-qmspi-ldma.yaml | 71 Delay in QMSPI main clocks from CS# de-assertion to driving HOLD#
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/Zephyr-latest/dts/bindings/haptics/ |
D | ti,drv2605.yaml | 32 Selects the feedback gain ratio between braking gain and driving gain.
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/Zephyr-latest/soc/ene/kb1200/reg/ |
D | gpio.h | 28 volatile uint32_t GPIODC; /*Driving Control Register */
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/Zephyr-latest/drivers/pinctrl/ |
D | pinctrl_ite_it8xxx2.c | 24 /* port driving select control */ 132 /* Driving current selection. */ in pinctrl_it8xxx2_set() 136 /* Driving current selects low. */ in pinctrl_it8xxx2_set() 139 /* Driving current selects high. */ in pinctrl_it8xxx2_set()
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/Zephyr-latest/soc/ite/ec/common/ |
D | pinctrl_soc.h | 76 /* Pin driving select control */ 117 * @brief Utility macro to obtain configuration of driving current selection.
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/Zephyr-latest/drivers/clock_control/ |
D | clock_stm32_mco.c | 26 /* clock subsystem driving this peripheral */
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/Zephyr-latest/dts/bindings/pinctrl/ |
D | nuvoton,numaker-pinctrl.yaml | 73 Set the driving strength of a pin. Hardware default configuration is low and
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D | pincfg-node.yaml | 105 enable output on a pin without actively driving it (e.g. enable an output
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/Zephyr-latest/drivers/serial/ |
D | uart_stm32.h | 32 /* clock subsystem driving this peripheral */
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/Zephyr-latest/drivers/display/ |
D | ssd1306_regs.h | 87 * Timing and Driving Scheme Setting Command Table
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/Zephyr-latest/soc/atmel/sam/common/ |
D | Kconfig | 24 The main clock is being used to drive the PLL, and thus driving the
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/Zephyr-latest/dts/bindings/gpio/ |
D | nordic,nrf-gpio-forwarder.yaml | 13 core is responsible for configuring the pins and driving them as needed.
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