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/Zephyr-latest/drivers/dma/
Ddmamux_stm32.c86 #if defined(CONFIG_DMA_STM32_BDMA) && DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(dmamux2))
87 static const struct dmamux_stm32_dma_fops dmamux2 = { variable
104 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(dmamux2)) in get_dma_fops()
105 if (dev_config->base == DT_REG_ADDR(DT_NODELABEL(dmamux2))) { in get_dma_fops()
106 return &dmamux2; in get_dma_fops()
108 #endif /* DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(dmamux2)) */ in get_dma_fops()
267 /* DMA 1 and DMA2 for DMAMUX1, BDMA for DMAMUX2 */ in dmamux_stm32_init()
283 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(dmamux2)) && DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(bdma1)) in dmamux_stm32_init()
284 if (config->base == DT_REG_ADDR(DT_NODELABEL(dmamux2))) { in dmamux_stm32_init()
345 * H7 series implements DMAMUX1 and DMAMUX2
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/Zephyr-latest/tests/drivers/dma/loop_transfer/boards/
Dnucleo_h743zi.overlay28 tst_dma1: &dmamux2 {
Dstm32h750b_dk.overlay29 tst_dma1: &dmamux2 {
/Zephyr-latest/tests/drivers/dma/chan_blen_transfer/boards/
Dnucleo_h743zi.overlay30 tst_dma1: &dmamux2 {
/Zephyr-latest/dts/bindings/dma/
Dst,stm32-bdma.yaml57 using dmamux2
60 dmas = < &dmamux2 0 17 0x2C80 >;
/Zephyr-latest/dts/arm/st/h7/
Dstm32h7a3.dtsi31 dmamux2: dmamux@58025800 { label
90 dmas = <&dmamux2 0 12 0x20440 &dmamux2 1 11 0x20480>;
Dstm32h743.dtsi28 dmamux2: dmamux@58025800 { label
Dstm32h745.dtsi35 dmamux2: dmamux@58025800 { label
Dstm32h723.dtsi63 dmamux2: dmamux@58025800 { label
Dstm32h7.dtsi984 dmamux2: dmamux@58025800 { label
989 /* dmamux2 has no dedicated clock, so we enable bdma clock */