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/Zephyr-latest/doc/build/dts/
Dzephyr_dt_i2c_high_level.svg1 <?xml version="1.0" encoding="UTF-8"?>
2 <!DOCTYPE svg PUBLIC "-//W3C//DTD SVG 1.1//EN" "http://www.w3.org/Graphics/SVG/1.1/DTD/svg11.dtd">
3 …-color: rgb(255, 255, 255);" xmlns:xlink="http://www.w3.org/1999/xlink" version="1.1" width="429px…
Dzephyr_dt_i2c_example.svg1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
6 xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
9 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
11 style="background-color: rgb(255, 255, 255);"
15 viewBox="-0.5 -0.5 945 708"
16 …-10-03T19:55:39.802Z&quot; agent=&quot;Mozilla/5.0 (X11; Linux x86_64; rv:69.0) Gecko/20100101 Fir…
19 inkscape:version="0.92.4 5da689c313, 2019-01-14"
20 inkscape:export-filename="/home/mbolivar/zp/zephyr/doc/guides/dts/zephyr_dt_i2c_example.png"
21 inkscape:export-xdpi="96"
22 inkscape:export-ydpi="96">
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/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32h7_devices/boards/
Dcore_init.overlay4 * SPDX-License-Identifier: Apache-2.0
19 /delete-property/ hse-bypass;
20 /delete-property/ clock-frequency;
25 /delete-property/ hsi-div;
41 /delete-property/ div-m;
42 /delete-property/ mul-n;
43 /delete-property/ div-p;
44 /delete-property/ div-q;
45 /delete-property/ div-r;
46 /delete-property/ clocks;
[all …]
Dspi1_pllq_2_d1ppre_4.overlay4 * SPDX-License-Identifier: Apache-2.0
12 /* With this particular div-q and d1ppre values
19 /delete-property/ div-q;
20 div-q = <2>;
24 /delete-property/ d1ppre;
29 /delete-property/ clocks;
Dspi1_pllq_1_d1ppre_1.overlay4 * SPDX-License-Identifier: Apache-2.0
13 /delete-property/ div-q;
14 div-q = <1>;
18 /delete-property/ d1ppre;
23 /delete-property/ clocks;
/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32h7_core/boards/
Dclear_clocks.overlay4 * SPDX-License-Identifier: Apache-2.0
14 /delete-property/ hse-bypass;
15 /delete-property/ clock-frequency;
20 /delete-property/ hsi-div;
36 /delete-property/ div-m;
37 /delete-property/ mul-n;
38 /delete-property/ div-p;
39 /delete-property/ div-q;
40 /delete-property/ div-r;
41 /delete-property/ clocks;
[all …]
/Zephyr-latest/tests/drivers/spi/spi_loopback/boards/
Dnucleo_h723zg.overlay4 * SPDX-License-Identifier: Apache-2.0
7 /* Set div-q to get test clk freq into acceptable SPI freq range */
9 /delete-property/ div-q;
10 div-q = <8>;
15 /delete-property/ clocks;
19 compatible = "test-spi-loopback-slow";
21 spi-max-frequency = <500000>;
24 compatible = "test-spi-loopback-fast";
26 spi-max-frequency = <16000000>;
Dnucleo_h743zi.overlay4 * SPDX-License-Identifier: Apache-2.0
7 /* Set div-q to get test clk freq into acceptable SPI freq range */
9 /delete-property/ div-q;
10 div-q = <8>;
14 zephyr,memory-attr = < DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) >;
20 dma-names = "tx", "rx";
22 compatible = "test-spi-loopback-slow";
24 spi-max-frequency = <500000>;
27 compatible = "test-spi-loopback-fast";
29 spi-max-frequency = <16000000>;
Dnucleo_h745zi_q_stm32h745xx_m4.overlay4 * SPDX-License-Identifier: Apache-2.0
7 /* Set div-q to get test clk freq into acceptable SPI freq range */
9 /delete-property/ div-q;
10 div-q = <8>;
14 zephyr,memory-attr = < DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) >;
20 dma-names = "tx", "rx";
22 compatible = "test-spi-loopback-slow";
24 spi-max-frequency = <500000>;
27 compatible = "test-spi-loopback-fast";
29 spi-max-frequency = <16000000>;
Dnucleo_h745zi_q_stm32h745xx_m7.overlay4 * SPDX-License-Identifier: Apache-2.0
7 /* Set div-q to get test clk freq into acceptable SPI freq range */
9 /delete-property/ div-q;
10 div-q = <8>;
14 zephyr,memory-attr = < DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) >;
20 dma-names = "tx", "rx";
22 compatible = "test-spi-loopback-slow";
24 spi-max-frequency = <500000>;
27 compatible = "test-spi-loopback-fast";
29 spi-max-frequency = <16000000>;
Dnucleo_h753zi.overlay4 * SPDX-License-Identifier: Apache-2.0
7 /* Set div-q to get test clk freq into acceptable SPI freq range */
9 /delete-property/ div-q;
10 div-q = <8>;
14 zephyr,memory-attr = < DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) >;
20 dma-names = "tx", "rx";
22 compatible = "test-spi-loopback-slow";
24 spi-max-frequency = <500000>;
27 compatible = "test-spi-loopback-fast";
29 spi-max-frequency = <16000000>;
/Zephyr-latest/doc/project/
Drelease_cycle.svg1 <?xml version="1.0" encoding="UTF-8"?>
2 <!-- Do not edit this file with editors other than diagrams.net -->
3 <!DOCTYPE svg PUBLIC "-//W3C//DTD SVG 1.1//EN" "http://www.w3.org/Graphics/SVG/1.1/DTD/svg11.dtd">
4 …-0.5 -0.5 658 146" content="&lt;mxfile host=&quot;app.diagrams.net&quot; modified=&quot;2022-03-29…
/Zephyr-latest/tests/drivers/spi/spi_loopback/
Doverlay-stm32-spi-16bits.overlay4 * SPDX-License-Identifier: Apache-2.0
7 /* Set div-q to get test clk freq into acceptable SPI freq range */
9 /delete-property/ div-q;
10 div-q = <8>;
14 zephyr,memory-attr = < DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) >;
20 dma-names = "tx", "rx";
22 compatible = "test-spi-loopback-slow";
24 spi-max-frequency = <500000>;
27 compatible = "test-spi-loopback-fast";
29 spi-max-frequency = <16000000>;
/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32h5_core/boards/
Dclear_clocks.overlay5 * SPDX-License-Identifier: Apache-2.0
13 /* Keep csi on to be the usart1-console clock */
25 /delete-property/ clock-frequency;
26 /delete-property/ hse-bypass;
31 /delete-property/ hsi-div;
39 /delete-property/ div-m;
40 /delete-property/ mul-n;
41 /delete-property/ div-p;
42 /delete-property/ div-q;
43 /delete-property/ div-r;
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/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices/boards/
Dg4_i2c1_hsi_adc1_pllp.overlay4 * SPDX-License-Identifier: Apache-2.0
13 /delete-property/ hse-bypass;
14 /delete-property/ clock-frequency;
22 /delete-property/ div-m;
23 /delete-property/ mul-n;
24 /delete-property/ div-p;
25 /delete-property/ div-q;
26 /delete-property/ div-r;
27 /delete-property/ clocks;
32 /delete-property/ clocks;
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Dg0_i2c1_hsi_lptim1_lse_adc1_pllp.overlay4 * SPDX-License-Identifier: Apache-2.0
13 /delete-property/ hse-bypass;
14 /delete-property/ clock-frequency;
22 /delete-property/ div-m;
23 /delete-property/ mul-n;
24 /delete-property/ div-p;
25 /delete-property/ div-q;
26 /delete-property/ div-r;
27 /delete-property/ clocks;
32 /delete-property/ clocks;
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Dg0_i2c1_sysclk_lptim1_lsi.overlay4 * SPDX-License-Identifier: Apache-2.0
13 /delete-property/ hse-bypass;
14 /delete-property/ clock-frequency;
22 /delete-property/ div-m;
23 /delete-property/ mul-n;
24 /delete-property/ div-p;
25 /delete-property/ div-q;
26 /delete-property/ div-r;
27 /delete-property/ clocks;
32 /delete-property/ clocks;
[all …]
Dl4_i2c1_hsi_lptim1_lse.overlay4 * SPDX-License-Identifier: Apache-2.0
13 /delete-property/ hse-bypass;
14 /delete-property/ clock-frequency;
23 /delete-property/ msi-range;
27 /delete-property/ div-m;
28 /delete-property/ mul-n;
29 /delete-property/ div-p;
30 /delete-property/ div-q;
31 /delete-property/ div-r;
32 /delete-property/ clocks;
[all …]
Dl4_i2c1_sysclk_lptim1_lsi.overlay4 * SPDX-License-Identifier: Apache-2.0
13 /delete-property/ hse-bypass;
14 /delete-property/ clock-frequency;
23 /delete-property/ msi-range;
27 /delete-property/ div-m;
28 /delete-property/ mul-n;
29 /delete-property/ div-p;
30 /delete-property/ div-q;
31 /delete-property/ div-r;
32 /delete-property/ clocks;
[all …]
Dwl_i2c1_hsi_lptim1_lse_adc1_pllp.overlay4 * SPDX-License-Identifier: Apache-2.0
13 /delete-property/ hse-bypass;
14 /delete-property/ clock-frequency;
15 /delete-property/ hse-tcxo;
16 /delete-property/ hse-div2;
21 /delete-property/ hsi-div;
26 /delete-property/ msi-range;
30 /delete-property/ div-m;
31 /delete-property/ mul-n;
32 /delete-property/ div-p;
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/Zephyr-latest/doc/hardware/emulator/img/
Ddevice_class_emulator.svg1 <?xml version="1.0" encoding="UTF-8"?>
2 <!-- Do not edit this file with editors other than draw.io -->
3 <!DOCTYPE svg PUBLIC "-//W3C//DTD SVG 1.1//EN" "http://www.w3.org/Graphics/SVG/1.1/DTD/svg11.dtd">
4 …-0.5 -0.5 374 449" content="&lt;mxfile host=&quot;Electron&quot; modified=&quot;2023-12-23T14:45:4…
/Zephyr-latest/doc/connectivity/bluetooth/api/mesh/images/
Dblob_srv.svg1 <?xml version="1.0" encoding="UTF-8"?>
2 <!DOCTYPE svg PUBLIC "-//W3C//DTD SVG 1.1//EN" "http://www.w3.org/Graphics/SVG/1.1/DTD/svg11.dtd">
3 …-0.5 -0.5 581 516"><defs/><g><rect x="0" y="0" width="100" height="40" fill="#ffffff" stroke="#000…
/Zephyr-latest/dts/bindings/clock/
Dst,stm32g0-pll-clock.yaml2 # SPDX-License-Identifier: Apache-2.0
14 f(PLL_P) = f(VCO clock) / PLLP --> to I2S
15 f(PLL_Q) = f(VCO clock) / PLLQ --> to RNG
16 f(PLL_R) = f(VCO clock) / PLLR --> PLLCLK (System Clock)
22 compatible: "st,stm32g0-pll-clock"
24 include: [clock-controller.yaml, base.yaml]
27 "#clock-cells":
33 div-m:
38 Valid range: 1 - 8
40 mul-n:
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Dst,stm32u0-pll-clock.yaml2 # SPDX-License-Identifier: Apache-2.0
14 f(PLL_P) = f(VCO clock) / PLLP --> to ADC
15 f(PLL_Q) = f(VCO clock) / PLLQ --> to RNG
16 f(PLL_R) = f(VCO clock) / PLLR --> PLLCLK (System Clock)
22 compatible: "st,stm32u0-pll-clock"
24 include: [clock-controller.yaml, base.yaml]
27 "#clock-cells":
33 div-m:
39 Valid range: 1 - 8
41 mul-n:
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/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32u5_devices/boards/
Dcore_init.overlay4 * SPDX-License-Identifier: Apache-2.0
19 /delete-property/ clock-frequency;
20 /delete-property/ hse-bypass;
33 /delete-property/ msi-range;
34 /delete-property/ msi-pll-mode;
39 /delete-property/ msi-range;
40 /delete-property/ msi-pll-mode;
44 /delete-property/ div-m;
45 /delete-property/ mul-n;
46 /delete-property/ div-q;
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