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/Zephyr-latest/dts/bindings/serial/
Dst,stm32-uart-base.yaml2 # SPDX-License-Identifier: Apache-2.0
5 description: STM32 UART-BASE
8 - name: uart-controller.yaml
9 property-blocklist:
10 - clock-frequency
11 - name: pinctrl-device.yaml
12 - name: reset-device.yaml
13 - name: uart-controller-pin-inversion.yaml
28 single-wire:
31 Enable the single wire half-duplex communication.
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/Zephyr-latest/soc/microchip/mec/mec15xx/
Ddevice_power.c5 * SPDX-License-Identifier: Apache-2.0
27 * Some peripherals if enabled always assert their CLK_REQ bits.
41 SCB->SCR &= ~(1ul << 2); in soc_lite_sleep_enable()
42 PCR_REGS->SYS_SLP_CTRL = MCHP_PCR_SYS_SLP_LIGHT; in soc_lite_sleep_enable()
47 * a minimum of 3ms to lock. During this time the main clock
52 SCB->SCR = (1ul << 2); /* Cortex-M4 SLEEPDEEP */ in soc_deep_sleep_enable()
53 PCR_REGS->SYS_SLP_CTRL = MCHP_PCR_SYS_SLP_HEAVY; in soc_deep_sleep_enable()
57 * Clear PCR Sleep control sleep all causing HW to de-assert all peripheral
60 * peripheral state therefore we force HW to de-assert the SLP_EN signals.
64 PCR_REGS->SYS_SLP_CTRL = 0U; in soc_deep_sleep_disable()
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/Zephyr-latest/drivers/watchdog/
Dwdt_dw.c1 /* SPDX-License-Identifier: Apache-2.0 */
23 /* Device run time data */
57 struct dw_wdt_dev_data *const dev_data = dev->data; in dw_wdt_setup()
68 dw_wdt_response_mode_set((uint32_t)reg_base, !!dev_data->callback); in dw_wdt_setup()
71 return dw_wdt_configure((uint32_t)reg_base, dev_data->config); in dw_wdt_setup()
76 __maybe_unused const struct dw_wdt_dev_cfg *const dev_config = dev->config;
77 struct dw_wdt_dev_data *const dev_data = dev->data;
82 return -ENODATA;
86 if (config->callback && !dev_config->irq_config) {
88 if (config->callback) {
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/Zephyr-latest/lib/heap/
DKconfig3 # SPDX-License-Identifier: Apache-2.0
9 depends on ASSERT
40 requested allocation) to maintain constant time performance.
44 (linear time) searching of the free list. The default is
60 such as memory allocation and de-allocation.
75 Heaps using reduced-size chunk headers can accommodate so called
78 Heaps using full-size chunk headers can have a total size up to
81 On 32-bit system the tradeoff is selectable between:
83 - "small" heaps with low memory and runtime overhead;
85 - "big" heaps with bigger memory overhead even for small heaps;
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/Zephyr-latest/soc/microchip/mec/mec172x/
Dpower.c5 * SPDX-License-Identifier: Apache-2.0
34 * We touch the Cortex-M's primary mask and base priority registers
68 * to assert SLP_EN to all peripherals on WFI. in z_power_soc_deep_sleep()
72 SCB->SCR |= BIT(2); in z_power_soc_deep_sleep()
73 pcr->SYS_SLP_CTRL = MCHP_PCR_SYS_SLP_HEAVY; in z_power_soc_deep_sleep()
74 pcr->OSC_ID = pcr->SYS_SLP_CTRL; in z_power_soc_deep_sleep()
86 * PM post ops. This de-asserts peripheral SLP_EN signals. in z_power_soc_deep_sleep()
88 pcr->SYS_SLP_CTRL = 0U; in z_power_soc_deep_sleep()
89 SCB->SCR &= ~BIT(2); in z_power_soc_deep_sleep()
92 htmr0->PRLD = 0U; /* make sure its stopped */ in z_power_soc_deep_sleep()
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Ddevice_power.c5 * SPDX-License-Identifier: Apache-2.0
53 sys_write32(pcr->CLK_REQ[i], vbm_addr); in soc_debug_sleep_clk_req()
57 sys_write32(pcr->SYS_SLP_CTRL, vbm_addr); in soc_debug_sleep_clk_req()
59 sys_write32(ecs->SLP_STS_MIRROR, vbm_addr); in soc_debug_sleep_clk_req()
77 regs->GIRQ22.SRC = UINT32_MAX; in soc_deep_sleep_non_wake_en()
78 regs->GIRQ22.EN_SET = MCHP_ESPI_WK_CLK_GIRQ_BIT; in soc_deep_sleep_non_wake_en()
87 regs->GIRQ22.EN_CLR = UINT32_MAX; in soc_deep_sleep_non_wake_dis()
88 regs->GIRQ22.SRC = UINT32_MAX; in soc_deep_sleep_non_wake_dis()
92 /* When MEC172x drivers are power-aware this should be move there */
100 regs->GIRQ21.SRC = MCHP_KEYSCAN_GIRQ_BIT; in soc_deep_sleep_wake_en()
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/Zephyr-latest/drivers/fpga/
Dfpga_ice40_bitbang.c5 * SPDX-License-Identifier: Apache-2.0
30 * restore the default pinctrl settings. On some higher-end microcontrollers
34 * However, on lower-end microcontrollers, the amount of time that elapses
36 * leaves us with the bitbanging option. Of course, on lower-end
37 * microcontrollers, the amount of time required to execute something
40 * in order to bitbang on lower-end microcontrollers, we actually require
61 * lattice,ice40-fpga.yaml for details.
65 for (; n > 0; --n) { in fpga_ice40_delay()
73 for (; n > 0; --n) { in fpga_ice40_send_clocks()
88 /* assert chip-select (active low) */ in fpga_ice40_spi_send_data()
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/Zephyr-latest/drivers/wifi/nrf_wifi/
DKconfig.nrfwifi1 # Nordic Wi-Fi driver for nRF70 series SoCs
5 # SPDX-License-Identifier: Apache-2.0
21 Nordic Wi-Fi Driver
124 bool "Wi-Fi interface auto start on boot"
145 bool "Low power mode in nRF Wi-Fi chipsets"
169 module-dep = LOG
170 module-str = Log level for Wi-Fi nRF70 driver
171 module-help = Sets log level for Wi-Fi nRF70 driver
193 # Wi-Fi and SR Coexistence Hardware configuration.
195 bool "Wi-Fi and SR coexistence support"
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/Zephyr-latest/subsys/mgmt/ec_host_cmd/backends/
Dec_host_cmd_backend_shi_ite.c4 * SPDX-License-Identifier: Apache-2.0
14 #include <zephyr/dt-bindings/gpio/ite-it8xxx2-gpio.h>
32 (SPI_TX_MAX_FIFO_SIZE - EC_SHI_PREAMBLE_LENGTH - EC_SHI_PAST_END_LENGTH)
57 * this config will be used at initial time
93 if (atomic_test_and_set_bit(data->pm_policy_state_flag, flag) == 0) { in shi_ite_pm_policy_state_lock_get()
95 k_work_reschedule(&data->cs_off_put, K_SECONDS(3)); in shi_ite_pm_policy_state_lock_get()
102 if (atomic_test_and_clear_bit(data->pm_policy_state_flag, flag) == 1) { in shi_ite_pm_policy_state_lock_put()
104 k_work_cancel_delayable(&data->cs_off_put); in shi_ite_pm_policy_state_lock_put()
109 * When AP is In S0 state, AP assert CS of SPI for a new command transaction.
110 * Under the condition, SoC will not enter deep sleep until AP de-assert the CS.
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/Zephyr-latest/drivers/spi/
Dspi_xec_qmspi_ldma.c4 * SPDX-License-Identifier: Apache-2.0
20 #include <zephyr/dt-bindings/clock/mchp_xec_pcr.h>
21 #include <zephyr/dt-bindings/interrupt-controller/mchp-xec-ecia.h>
35 * data bytes will be left shifted by 1. Work-around for SPI Mode 3 is
94 /* Device run time data */
123 return -ETIMEDOUT; in xec_qmspi_spin_yield()
133 * Some QMSPI timing register may be modified by the Boot-ROM OTP
144 taps[0] = regs->TM_TAPS; in qmspi_reset()
145 taps[1] = regs->TM_TAPS_ADJ; in qmspi_reset()
146 taps[2] = regs->TM_TAPS_CTRL; in qmspi_reset()
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Dspi_xec_qmspi.c4 * SPDX-License-Identifier: Apache-2.0
35 /* Device run time data */
58 REG8(&regs->TX_FIFO) = data8; in txb_wr8()
63 return REG8(&regs->RX_FIFO); in rxb_rd8()
87 qmode = regs->MODE & ~(MCHP_QMSPI_M_FDIV_MASK); in qmspi_set_frequency()
89 regs->MODE = qmode; in qmspi_set_frequency()
129 if (((regs->MODE >> MCHP_QMSPI_M_FDIV_POS) & in qmspi_set_signalling_mode()
135 regs->MODE = (regs->MODE & ~(MCHP_QMSPI_M_SIG_MASK)) in qmspi_set_signalling_mode()
148 switch (config->operation & SPI_LINES_MASK) { in qmspi_config_get_lines()
174 * NOTE: QMSPI can control two chip selects. At this time we use CS0# only.
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Dspi_sam.c6 * SPDX-License-Identifier: Apache-2.0
50 /* Device run time data */
66 struct spi_sam_data *data = dev->data; in spi_spin_lock()
68 return k_spin_lock(&data->lock); in spi_spin_lock()
73 struct spi_sam_data *data = dev->data; in spi_spin_unlock()
75 k_spin_unlock(&data->lock, key); in spi_spin_unlock()
83 * select decode(SPI_MR.PCSDEC = 0), based on Atmel | SMART ARM-based in spi_slave_to_mr_pcs()
97 const struct spi_sam_config *cfg = dev->config; in spi_sam_configure()
98 struct spi_sam_data *data = dev->data; in spi_sam_configure()
99 Spi *regs = cfg->regs; in spi_sam_configure()
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/Zephyr-latest/tests/arch/arm/arm_interrupt/src/
Darm_interrupt.c4 * SPDX-License-Identifier: Apache-2.0
13 static volatile int expected_reason = -1;
31 (pEsf->basic.r0 == 0) && in check_esf_matches_expectations()
32 (pEsf->basic.r1 == 1) && in check_esf_matches_expectations()
33 (pEsf->basic.r2 == 2) && in check_esf_matches_expectations()
34 (pEsf->basic.r3 == 3) && in check_esf_matches_expectations()
35 (pEsf->basic.lr == 15) && in check_esf_matches_expectations()
36 (*(uint16_t *)pEsf->basic.pc == expected_fault_instruction); in check_esf_matches_expectations()
39 return -1; in check_esf_matches_expectations()
43 const struct _callee_saved *callee_regs = pEsf->extra_info.callee; in check_esf_matches_expectations()
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/Zephyr-latest/soc/nxp/imxrt/imxrt5xx/cm33/
Dsoc.c2 * Copyright 2022-2023, NXP
4 * SPDX-License-Identifier: Apache-2.0
11 * This module provides routines to initialize and support board-level
35 /* Board System oscillator settling time in us */
176 /* Wait until host_needclk de-asserts */ in usb_device_clock_init()
177 while (SYSCTL0->USB0CLKSTAT & SYSCTL0_USB0CLKSTAT_HOST_NEED_CLKST_MASK) { in usb_device_clock_init()
183 USBHSH->PORTMODE |= USBHSH_PORTMODE_DEV_ENABLE_MASK; in usb_device_clock_init()
203 MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk; in soc_reset_hook()
243 /* Updated XTAL oscillator settling time */ in rt5xx_clock_init()
270 /* Set up clock selectors - Attach clocks to the peripheries. */ in rt5xx_clock_init()
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/Zephyr-latest/drivers/led/
Dlp5562.c4 * SPDX-License-Identifier: Apache-2.0
13 * The LP5562 is a 4-channel LED driver that communicates over I2C. The four
23 * - Set the brightness.
24 * - Fade the brightness over time.
25 * - Loop parts of the program or the whole program.
26 * - Add delays.
27 * - Synchronize between the engines.
189 * @retval -EINVAL If an invalid channel is given.
208 return -EINVAL; in lp5562_get_pwm_reg()
221 * @retval -EINVAL If a source is given that is not a valid engine.
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/Zephyr-latest/doc/releases/
Drelease-notes-2.1.rst13 * Expanded support for ARMv6-M architecture.
50 hardware-based stack overflow detection) in ARMv6-M architecture
51 * Added QEMU support for ARMv6-M architecture
52 * Extended test coverage for ARM-specific kernel features in ARMv6-M
54 * Enhanced runtime MPU programming in ARMv8-M architecture, making
55 the full partitioning of kernel SRAM memory a user-configurable
57 * Added CMSIS support for Cortex-R architectures.
59 * Added missing Cortex-R CPU device tree bindings.
60 * Fixed incorrect Cortex-R device tree specification.
68 * RISC-V:
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Drelease-notes-3.3.rst14 * Introduced :ref:`USB-C <usbc_api>` device stack with PD (power delivery)
17 CMSIS-DSP as the default backend.
30 * CVE-2023-0359: Under embargo until 2023-04-20
32 * CVE-2023-0779: Under embargo until 2023-04-22
66 removed in favor of new :dtcompatible:`zephyr,flash-disk` devicetree binding.
71 * Starting from this release ``zephyr-`` prefixed tags won't be created
82 image states). Use of a truncated hash or non-sha256 hash will still work
88 registration function at boot-up. If applications register this then
93 application code, these will now automatically be registered at boot-up (this
129 This may cause out-of-tree scripts or commands to fail if they have relied
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Drelease-notes-3.0.rst22 * CVE-2021-3835: `Zephyr project bug tracker GHSA-fm6v-8625-99jf
23 <https://github.com/zephyrproject-rtos/zephyr/security/advisories/GHSA-fm6v-8625-99jf>`_
25 * CVE-2021-3861: `Zephyr project bug tracker GHSA-hvfp-w4h8-gxvj
26 <https://github.com/zephyrproject-rtos/zephyr/security/advisories/GHSA-hvfp-w4h8-gxvj>`_
28 * CVE-2021-3966: `Zephyr project bug tracker GHSA-hfxq-3w6x-fv2m
29 <https://github.com/zephyrproject-rtos/zephyr/security/advisories/GHSA-hfxq-3w6x-fv2m>`_
36 <https://github.com/zephyrproject-rtos/zephyr/issues?q=is%3Aissue+is%3Aopen+label%3Abug>`_.
53 * Added ``ranges`` and ``dma-ranges`` as invalid property to be used with DT_PROP_LEN()
58 CRC-16-ANSI checksum. A new function, :c:func:`crc16_reflect`, has been
69 * The following Kconfig options related to radio front-end modules (FEMs) were
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/Zephyr-latest/drivers/sensor/st/lis2dh/
Dlis2dh_trigger.c4 * SPDX-License-Identifier: Apache-2.0
32 const struct lis2dh_config *cfg = dev->config; in setup_int1()
34 gpio_pin_interrupt_configure_dt(&cfg->gpio_drdy, in setup_int1()
36 ? gpio_int_cfg[cfg->int1_mode] in setup_int1()
45 const struct lis2dh_config *cfg = dev->config; in lis2dh_trigger_drdy_set()
46 struct lis2dh_data *lis2dh = dev->data; in lis2dh_trigger_drdy_set()
49 if (cfg->gpio_drdy.port == NULL) { in lis2dh_trigger_drdy_set()
51 return -ENOTSUP; in lis2dh_trigger_drdy_set()
57 atomic_clear_bit(&lis2dh->trig_flags, TRIGGED_INT1); in lis2dh_trigger_drdy_set()
59 status = lis2dh->hw_tf->update_reg(dev, LIS2DH_REG_CTRL3, in lis2dh_trigger_drdy_set()
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/Zephyr-latest/drivers/i2c/
Di2c_mchp_xec_v2.c5 * SPDX-License-Identifier: Apache-2.0
25 #include "i2c-priv.h"
112 * i2c_baud_clk_period/bus_clk_period - 2 = (low_period + hi_period)
113 * bus_clk_reg (16MHz/100KHz -2) = 0x4F + 0x4F
114 * (16MHz/400KHz -2) = 0x0F + 0x17
115 * (16MHz/1MHz -2) = 0x05 + 0x09
144 (const struct i2c_xec_config *const) (dev->config); in i2c_ctl_wr()
146 (struct i2c_xec_data *const) (dev->data); in i2c_ctl_wr()
147 struct i2c_smb_regs *regs = (struct i2c_smb_regs *)cfg->base_addr; in i2c_ctl_wr()
149 data->i2c_ctrl = ctrl; in i2c_ctl_wr()
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/Zephyr-latest/drivers/espi/
Despi_mchp_xec_v2.c5 * SPDX-License-Identifier: Apache-2.0
16 #include <zephyr/dt-bindings/interrupt-controller/mchp-xec-ecia.h>
40 * length specified is non-zero.
61 ((struct espi_iom_regs *)ESPI_XEC_CONFIG(dev)->base_addr)
64 ((struct espi_msvw_ar_regs *)(ESPI_XEC_CONFIG(dev)->vw_base_addr))
70 (ESPI_XEC_CONFIG(dev)->vw_base_addr + ESPI_XEC_SMVW_REG_OFS))
77 * ------------------------------------------------------------------------|
79 * ------------------------------------------------------------------------|
81 * ------------------------------------------------------------------------|
88 * ------------------------------------------------------------------------|
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Despi_npcx.c4 * SPDX-License-Identifier: Apache-2.0
9 #include <assert.h>
15 #include <zephyr/dt-bindings/espi/npcx_espi.h>
32 /* mapping table between eSPI reset signal and wake-up input */
77 ((struct espi_reg *)((const struct espi_npcx_config *)(dev)->config)->base)
132 /* eSPI Virtual Wire Input (Master-to-Slave) signals configuration structure */
136 uint8_t bitmask; /* VW signal bits-mask */
140 /* eSPI Virtual Wire Output (Slave-to-Master) signals configuration structure */
144 uint8_t bitmask; /* VW signal bits-mask */
149 * npcxn-espi-vws-map.dtsi device tree file for more detail.
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/Zephyr-latest/doc/contribute/coding_guidelines/
Dindex.rst13 but not enforced. Rules are not yet enforced in CI and pull-requests cannot be
33 Coding guideline rules may be removed/changed at any time by filing a
41 <https://github.com/zephyrproject-rtos/zephyr/issues/58903>`__ is being worked on.
46 The coding guideline rules are based on MISRA-C 2012 and are a **subset** of MISRA-C.
54 available through the project. If you need a copy of MISRA-C 2012, please
60 .. list-table:: Main rules
61 :header-rows: 1
64 * - Zephyr rule
65 - Description
66 - MISRA-C 2012 rule
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/Zephyr-latest/cmake/modules/
Dextensions.cmake1 # SPDX-License-Identifier: Apache-2.0
14 # 1. Zephyr-aware extensions
21 # 2. Kconfig-aware extensions
23 # 3. CMake-generic extensions
44 # 1. Zephyr-aware extensions
49 # "zephyr". zephyr is a catch-all CMake library for source files that
52 # [0] https://cmake.org/cmake/help/latest/manual/cmake-buildsystem.7.html
66 # As a very high-level introduction here are two call graphs that are
72 # zephyr_library_compile_options() --> target_compile_options()
75 # zephyr_cc_option() ---> target_cc_option()
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/Zephyr-latest/samples/modules/tflite-micro/hello_world/train/
Dtrain_hello_world_model.ipynb31 "<table class=\"tfo-notebook-buttons\" align=\"left\">\n",
36 …o_world_model.ipynb\"><img src=\"https://www.tensorflow.org/images/GitHub-Mark-32px.png\" />View s…
53 "id": "5PYwRFppd-WB"
84 "outputId": "510567d6-300e-40e2-f5b8-c3520a3f3a8b",
97 …"Requirement already satisfied: tensorflow==2.4.0rc0 in /usr/local/lib/python3.6/dist-packages (2.…
98 …"Requirement already satisfied: termcolor~=1.1.0 in /usr/local/lib/python3.6/dist-packages (from t…
99 …"Requirement already satisfied: gast==0.3.3 in /usr/local/lib/python3.6/dist-packages (from tensor…
100 …"Requirement already satisfied: astunparse~=1.6.3 in /usr/local/lib/python3.6/dist-packages (from …
101 …"Requirement already satisfied: absl-py~=0.10 in /usr/local/lib/python3.6/dist-packages (from tens…
102 …"Requirement already satisfied: keras-preprocessing~=1.1.2 in /usr/local/lib/python3.6/dist-packag…
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