| /Zephyr-latest/dts/bindings/pwm/ |
| D | nxp,imx-pwm.yaml | 40 - "half-cycle"
41 - "full-cycle"
42 - "half-and-full-cycle"
46 "half-cycle" - registers loaded on a PWM half cycle;
47 "full-cycle" - registers loaded on a PWM full cycle;
48 "half-and-full-cycle" - registers loaded on a PWM half & full cycle.
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| D | nxp,s32-emios-pwm.yaml | 22 duty-cycle = <32768>;
30 duty-cycle = <32768>;
39 duty-cycle = <32768>;
102 - OPWFMB: provides waveforms with variable duty cycle and frequency,
109 The new period and cycle take effect in next period boundary.
115 The new period and cycle take effect in next period boundary.
135 duty-cycle:
138 Duty-cycle (in ticks) for PWM channel at boot time.
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| /Zephyr-latest/samples/drivers/led/pwm/ |
| D | Kconfig | 5 int "Blinking delay for short cycle demo"
8 Specifies the LED on/off delay in milliseconds for short cycle
10 If set to 0, the short-cycle blinking demo will not be performed.
13 int "Blinking delay for long cycle demo"
16 Specifies the LED on/off delay in milliseconds for long cycle
18 If set to 0, the long-cycle blinking demo will not be performed.
|
| /Zephyr-latest/samples/drivers/charger/ |
| D | README.rst | 16 cycle.
17 - After the charge cycle is initiated, the sample application will check the status property of the
19 - Once the charger device reports that the charge cycle has completed, the application returns.
21 Note that this sample terminates once the charge cycle completes and does not attempt to "top-off"
23 health state and the implications the environment may have on the charge cycle execution. The
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| /Zephyr-latest/arch/arm/include/cortex_m/ |
| D | dwt.h | 91 * @brief Initialize and Enable the DWT cycle counter
93 * This routine enables the cycle counter and initializes its value to zero.
99 /* Clear and enable the cycle counter */ in z_arm_dwt_init_cycle_counter()
103 /* Assert that the cycle counter is indeed implemented. in z_arm_dwt_init_cycle_counter()
104 * The field is called NOCYCCNT. So 1 means there is no cycle counter. in z_arm_dwt_init_cycle_counter()
107 "DWT implements no cycle counter. " in z_arm_dwt_init_cycle_counter()
108 "Cannot be used for cycle counting\n"); in z_arm_dwt_init_cycle_counter()
114 * @brief Return the current value of the cycle counter
116 * This routine returns the current value of the DWT Cycle Counter (DWT.CYCCNT)
118 * @return the cycle counter value
[all …]
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| /Zephyr-latest/dts/bindings/memory-controllers/ |
| D | atmel,sam-smc.yaml | 29 atmel,smc-cycle-timing = <7 7>;
36 each MCK cycle will be equivalent to 8ns. Since the memory full cycle is
37 55ns, as per specification, it requires atmel,smc-cycle-timing of at least
38 7 pulses (56ns). The atmel,smc-cycle-timing is composed of three parts:
41 is66wv51216dbll-55 a minimum setup of 5ns (1 cycle) with at least 45ns
43 Note: Since no hold parameter is available at SMC the atmel,smc-cycle-timing
47 cycle-timing (7) = setup (1) + pulse (6) + hold (0)
50 cycle-timing (10) = setup (1) + pulse (6) + hold (3)
139 atmel,smc-cycle-timing:
146 is defined as: cycle = setup + pulse + hold
[all …]
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| D | renesas,ra-sdram.yaml | 12 precharge-cycle-count = <3>;
71 precharge-cycle-count:
74 description: Number of precharge-cycle-count.
129 - TREFW: Auto-Refresh Cycle/Self-Refresh Clearing Cycle Count Setting.
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| /Zephyr-latest/doc/hardware/peripherals/ |
| D | charger.rst | 13 The action of charging a battery pack is referred to as a charge cycle. When the charge cycle is
23 Initiating a Charge Cycle
26 A charge cycle is initiated or terminated using :c:func:`charger_charge_enable`.
|
| /Zephyr-latest/tests/benchmarks/cmsis_dsp/common/ |
| D | benchmark_common.h | 14 /* Use cycle counting on the Cortex-M devices that support DWT */
25 /* Start DWT cycle counter */ in benchmark_begin()
32 /* Stop DWT cycle counter */ in benchmark_end()
38 /* Return DWT cycle counter value */ in benchmark_end()
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| /Zephyr-latest/tests/kernel/common/src/ |
| D | clock.c | 71 * @brief Test 32-bit clock cycle functionality
76 * cycle counter
102 * the delta cycle should be greater than 1 milli-second.
114 /**TESTPOINT: cycle elapse*/ in ZTEST()
117 /*break if cycle counter wrap around*/ in ZTEST()
123 /**TESTPOINT: cycle/uptime cross check*/ in ZTEST()
132 /*avoid cycle counter wrap around*/ in ZTEST()
134 /* delta cycle should be greater than 1 milli-second*/ in ZTEST()
145 * @brief Test 64-bit clock cycle functionality
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| /Zephyr-latest/drivers/pwm/ |
| D | Kconfig.it8xxx2 | 13 Supports three 16-bit prescalers each with 8-bit cycle timer, and
14 eight PWM channels each with 8-bit duty cycle.
|
| /Zephyr-latest/dts/bindings/i2c/ |
| D | ite,enhance-i2c.yaml | 17 The resulting SCL cycle time is given by the following formula:
18 SCL cycle = 2 * (psr + prescale_tweak + 2) *
19 SMBus clock cycle
|
| /Zephyr-latest/soc/ene/kb1200/reg/ |
| D | pwm.h | 18 volatile uint16_t PWMCYC; /*Cycle Length Register */
20 volatile uint32_t PWMCHC; /*Current High/Cycle Length Register */
|
| /Zephyr-latest/drivers/espi/ |
| D | Kconfig.it8xxx2 | 132 # status bit to indicate which cycle triggered the interrupt and data registers
138 bool "EC accepts 0x81 I/O cycle from eSPI transaction"
141 With this option enabled, EC will accept 0x81 I/O cycle from the Host.
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| /Zephyr-latest/include/zephyr/drivers/timer/ |
| D | system_timer.h | 122 * @brief Hardware cycle counter
124 * Timer drivers are generally responsible for the system cycle
127 * arch_k_cycle_get_32()) to implement the cycle counter, though the
137 * @return The current cycle time. This should count up monotonically
145 * @brief 64 bit hardware cycle counter
156 * @return The current cycle time. This should count up monotonically
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| /Zephyr-latest/samples/boards/microchip/mec15xxevb_assy6853/power_management/src/ |
| D | power_mgmt.h | 21 * @param cycles to repeat the cycle described above.
33 * @param cycles to repeat the cycle described above.
|
| /Zephyr-latest/dts/bindings/clock/ |
| D | litex,clkout.yaml | 44 default duty cycle numerator value
50 default duty cycle denominator value
|
| /Zephyr-latest/tests/subsys/pm/power_mgmt_soc/src/ |
| D | power_mgmt.h | 19 * @param cycles to repeat the cycle described above.
29 * @param cycles to repeat the cycle described above.
|
| /Zephyr-latest/drivers/led_strip/ |
| D | tlc59731.c | 20 * cycle time.
24 * A zero is represented by no additional pulses within a cycle.
26 * (half a cycle) after the first one. We need at least some delay to get to
29 * the cycle. This time can be slightly shorter because the second pulse
30 * already closes the cycle.
|
| /Zephyr-latest/samples/basic/fade_led/ |
| D | README.rst | 14 cycle. Each cycle takes 2.5 seconds, and the cycles repeat forever. The PWM
|
| /Zephyr-latest/arch/arm/core/cortex_m/ |
| D | timing.c | 22 * @brief Return the current frequency of the cycle counter
24 * This routine returns the current frequency of the DWT Cycle Counter
27 * @return the cycle counter frequency value
|
| /Zephyr-latest/drivers/timer/ |
| D | ambiq_stimer.c | 63 /* Read current cycle count. */ in update_tick_counter()
66 /* If current cycle count is smaller than the last time stamp, a counter overflow happened. in update_tick_counter()
99 /*Calculate the elapsed ticks based on the current cycle count*/ in stimer_isr()
107 /* Read current cycle count. */ in stimer_isr()
110 /* If current cycle count is smaller than the last time stamp, a counter in stimer_isr()
|
| /Zephyr-latest/doc/services/portability/posix/implementation/ |
| D | index.rst | 42 ``libzfoo`` also depends on ``libposix``, then there is a dependency cycle. The cycle can be
46 :caption: Dependency cycle between POSIX and another Zephyr library
|
| /Zephyr-latest/subsys/usb/usb_c/ |
| D | Kconfig | 38 int "USB-C state machine cycle time in milliseconds"
41 The USB-C state machine is run in a loop and the cycle time is the
|
| /Zephyr-latest/dts/bindings/sensor/ |
| D | vishay,vcnl4040.yaml | 36 led-duty-cycle:
40 description: LED duty cycle in Hz
|
