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/Zephyr-latest/dts/bindings/mtd/
Dnxp,imx-flexspi-device.yaml18 default corresponds to the reset value of the register field.
26 default corresponds to the reset value of the register field.
33 registers FLASHA1CR0 through FLASHB2CR0. The default corresponds to the
41 registers FLASHA1CR0 through FLASHB2CR0. The default corresponds to the
57 FLASHB2CR0. The default corresponds to the reset value of the register
82 corresponds to the reset value of the register field.
90 corresponds to the reset value of the register field.
/Zephyr-latest/dts/bindings/fs/
Dzephyr,fstab,littlefs.yaml29 This corresponds to CONFIG_FS_LITTLEFS_READ_SIZE.
40 This corresponds to CONFIG_FS_LITTLEFS_PROG_SIZE.
57 This corresponds to CONFIG_FS_LITTLEFS_CACHE_SIZE.
72 This corresponds to CONFIG_FS_LITTLEFS_LOOKAHEAD_SIZE.
84 This corresponds to CONFIG_FS_LITTLEFS_BLOCK_CYCLES.
/Zephyr-latest/dts/bindings/sensor/
Davago,apds9306.yaml25 The default corresponds to the reset value of the register field.
39 The default corresponds to the reset value of the register field.
54 The default corresponds to the reset value of the register field.
Dnxp,lpcmp.yaml42 The default corresponds to the reset value of the register field.
53 The default corresponds to the reset value of the register field.
65 The default corresponds to the reset value of the register field.
Dhc-sr04.yaml20 Input pin. The pulse received on this pin corresponds to
/Zephyr-latest/dts/bindings/spi/
Dsnps,designware-spi.yaml27 RX/TX FIFO depth. Corresponds to the SSI_TX_FIFO_DEPTH
35 Master. Corresponds to SSI_IS_MASTER of the Designware
41 Maximum transfer size. Corresponds to SPI_MAX_XFER_SIZE
/Zephyr-latest/dts/bindings/dac/
Dadi,ad569x-base.yaml20 The default corresponds to the reset value of the register field.
32 The default corresponds to the reset value of the register field.
48 The default corresponds to the reset value of the register field.
/Zephyr-latest/dts/bindings/display/
Dsolomon,ssd1322.yaml18 The default corresponds to the reset value of the register.
25 The default corresponds to the reset value of the register.
32 The default corresponds to the reset value of the register.
/Zephyr-latest/include/zephyr/dt-bindings/pinctrl/
Dpinctrl-zynq.h14 * corresponds to what is written to the IO_Type field in the MIO_PIN_xx SLCR register.
28 * corresponds to what is written to the Speed field in the MIO_PIN_xx SLCR register.
/Zephyr-latest/dts/bindings/input/
Dtouchscreen-common.yaml14 corresponds to a valid value for non-inverted axis, required for a display with an inverted x
22 corresponds to a valid value for non-inverted axis, required for a display with an inverted y
Danalog-axis.yaml71 Input value that corresponds to the minimum output value.
77 Input value that corresponds to the maximum output value.
/Zephyr-latest/dts/bindings/qspi/
Dnxp,s32-qspi-sfp-mdad.yaml36 The default corresponds to the reset value of the register field.
43 Valid range: 0 - 63. The default corresponds to the
Dnxp,s32-qspi-sfp-frad.yaml45 The default corresponds to the reset value of the register field.
52 Valid range: 0 - 63. The default corresponds to the reset
/Zephyr-latest/soc/st/stm32/stm32l5x/
Dpower.c42 case 1: /* this corresponds to the STOP0 mode: */ in pm_state_set()
46 case 2: /* this corresponds to the STOP1 mode: */ in pm_state_set()
50 case 3: /* this corresponds to the STOP2 mode: */ in pm_state_set()
/Zephyr-latest/soc/st/stm32/stm32l4x/
Dpower.c36 case 1: /* this corresponds to the STOP0 mode: */ in set_mode_stop()
40 case 2: /* this corresponds to the STOP1 mode: */ in set_mode_stop()
44 case 3: /* this corresponds to the STOP2 mode: */ in set_mode_stop()
/Zephyr-latest/dts/bindings/rtc/
Dnxp,pcf8523.yaml24 to 7pF) which corresponds to the reset value of the CAP_SEL field in the "Control 1" register
40 Frequency of the CLKOUT signal in Hertz (Hz). Default is 32768 Hz which corresponds to the
/Zephyr-latest/dts/bindings/adc/
Dnxp,lpc-lpadc.yaml29 Voltage reference selection. Corresponds to value of
58 Power level selection. Corresponds to the value of
Dlltc,ltc2451.yaml19 Default value corresponds to the default value of the register
/Zephyr-latest/dts/bindings/pinctrl/
Dnxp,mcux-rt-pinctrl.yaml111 Corresponds to the PUS field in the IOMUXC peripheral.
126 Corresponds to the PUS field in the IOMUXC peripheral. 100k is
136 Select slew rate for pin. Corresponds to SRE field in IOMUXC peripheral
147 Sets pin speed. Corresponds to SPEED field in IOMUXC peripheral
/Zephyr-latest/samples/boards/bbc/microbit/pong/boards/
Dbbc_microbit_v2.overlay3 /* period cell corresponds to initial period */
/Zephyr-latest/samples/boards/bbc/microbit/sound/boards/
Dbbc_microbit_v2.overlay3 /* period cell corresponds to initial period */
Dbbc_microbit.overlay3 /* period cell corresponds to initial period */
/Zephyr-latest/soc/st/stm32/stm32g0x/
Dpower.c31 case 1: /* this corresponds to the STOP0 mode: */ in pm_state_set()
38 case 2: /* this corresponds to the STOP1 mode: */ in pm_state_set()
/Zephyr-latest/soc/st/stm32/stm32g4x/
Dpower.c31 case 1: /* this corresponds to the STOP0 mode: */ in pm_state_set()
38 case 2: /* this corresponds to the STOP1 mode: */ in pm_state_set()
/Zephyr-latest/dts/bindings/gpio/
Dadi,max22190-gpio.yaml86 The default value corresponds to the default value of the hardware.
99 The default value corresponds to the default value of the hardware.
109 The default value corresponds to the default value of the hardware.

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