Searched full:configuring (Results 1 – 25 of 335) sorted by relevance
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/Zephyr-latest/dts/bindings/spi/ |
D | nordic,nrf-spi-common.yaml | 57 line low by configuring its pin as an output 60 - SPI slave releases the line by configuring its pin back to be an input
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/Zephyr-latest/drivers/pinctrl/ |
D | Kconfig.stm32 | 16 Initialization priority for the routine in charge of configuring the
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/Zephyr-latest/samples/drivers/led/apa102c_bitbang/src/ |
D | main.c | 82 printk("Error configuring " GPIO_NAME "%d!\n", GPIO_DATA_PIN); in main() 87 printk("Error configuring " GPIO_NAME "%d!\n", GPIO_CLK_PIN); in main()
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/Zephyr-latest/doc/connectivity/bluetooth/api/mesh/ |
D | brg_cfg_cli.rst | 10 The Bridge Configuration Client model provides functionality for configuring the
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D | cfg_cli.rst | 7 specification. It provides functionality for configuring most parameters of a
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D | brg_cfg_srv.rst | 12 version 1.1, and is used for supporting and configuring the Subnet Bridge feature.
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D | priv_beacon_cli.rst | 11 Specification version 1.1, and provides functionality for configuring the
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/Zephyr-latest/doc/connectivity/networking/api/ |
D | 8021Qav.rst | 11 resource. Zephyr has support for configuring a credit-based shaper 38 Configuring 802.1Qav
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/Zephyr-latest/samples/boards/nxp/s32/netc/ |
D | README.rst | 54 [00:00:07.595,000] <inf> nxp_s32_netc_sample: Configuring iface 1 (0x318008f0) 79 [00:00:07.595,000] <inf> nxp_s32_netc_sample: Configuring iface 1 (0x3182f31c) 82 [00:00:07.595,000] <inf> nxp_s32_netc_sample: Configuring iface 2 (0x3182f328)
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/Zephyr-latest/drivers/sensor/bosch/bmi270/ |
D | bmi270_trigger.c | 206 LOG_ERR("failed configuring INT1_IO_CTRL (%d)", ret); in bmi270_init_interrupts() 216 LOG_ERR("failed configuring INT2_IO_CTRL (%d)", ret); in bmi270_init_interrupts() 257 LOG_ERR("failed configuring INT1_MAP_FEAT (%d)", ret); in bmi270_anymo_config() 276 LOG_ERR("failed configuring INT_MAP_DATA (%d)", ret); in bmi270_drdy_config()
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/Zephyr-latest/dts/bindings/gpio/ |
D | quicklogic,eos-s3-gpio.yaml | 30 E.g. configuring GPIO 2 as secondary results in controlling pin 28,
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/Zephyr-latest/arch/arm/core/cortex_m/ |
D | cpu_idle.c | 70 * for interrupt locking), and configuring BASEPRI to the lowest in arch_cpu_idle() 74 * Set PRIMASK before configuring BASEPRI to prevent interruption in arch_cpu_idle()
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/Zephyr-latest/drivers/watchdog/ |
D | wdt_esp32.c | 136 LOG_DBG("Configuring reset SOC mode"); in wdt_esp32_install_timeout() 141 LOG_DBG("Configuring reset CPU mode"); in wdt_esp32_install_timeout() 146 LOG_DBG("Configuring non-reset mode"); in wdt_esp32_install_timeout()
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/Zephyr-latest/samples/subsys/usb/common/ |
D | Kconfig.sample_usbd | 4 # This file contains Kconfig options and defaults for configuring USB devices
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/Zephyr-latest/dts/bindings/power/ |
D | nxp,s32k3-pmc.yaml | 28 When configuring system clocks higher than FIRC clock frequency,
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/Zephyr-latest/dts/bindings/stepper/adi/ |
D | adi,tmc2209.yaml | 33 An array of GPIO pins for configuring the microstep resolution of the driver.
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/Zephyr-latest/samples/basic/custom_dts_binding/src/ |
D | main.c | 33 printf("Configuring GPIO pin failed: %d\n", err); in main()
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/Zephyr-latest/dts/bindings/clock/ |
D | st,stm32-rcc.yaml | 9 Configuring STM32 Reset and Clock controller node: 40 (generally for configuring the device). If dual clock domain is not used, it is
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/Zephyr-latest/boards/nordic/nrf9160dk/ |
D | board.c | 134 LOG_ERR("Error %d while configuring pin P%d.%02d", in reset_pin_configure() 180 LOG_DBG("Configuring P%d.%02d with flags: 0x%08x", in init() 183 LOG_ERR("Error %d while configuring pin P%d.%02d (%s)", in init()
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/Zephyr-latest/dts/bindings/sensor/ |
D | ti,bq274xx.yaml | 57 Configuring the sensor can take a long time, using lazy loading we can delay
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/Zephyr-latest/samples/sensor/mhz19b/ |
D | README.rst | 44 Configuring sensor - OK
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/Zephyr-latest/dts/bindings/flash_controller/ |
D | nuvoton,npcx-fiu-nor.yaml | 38 description: The definitions for configuring the Quad-SPI peripherals.
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/Zephyr-latest/dts/bindings/misc/ |
D | nordic,split-channels.yaml | 19 7-11 only by child subprocessor. If the CPU you're configuring has no
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/Zephyr-latest/include/zephyr/dt-bindings/gpio/ |
D | espressif-esp32-gpio.h | 38 * These flags allow configuring a pin as input or output while keeping untouched
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/Zephyr-latest/samples/net/syslog_net/ |
D | README.rst | 26 For configuring the remote IPv6 syslog server, set the following
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