| /Zephyr-latest/include/zephyr/sys/ |
| D | bitarray.h | 26 * @brief Store and manipulate bits in a bit array.
33 /* Number of bits */
39 /* Bundle of bits */
54 * @param total_bits Total number of bits in this bitarray object.
72 * @param total_bits Total number of bits in this bitarray object.
81 * @param total_bits Total number of bits in this bitarray object.
94 * the number of bits in bit array, etc.)
106 * the number of bits in bit array, etc.)
119 * the number of bits in bit array, etc.)
132 * the number of bits in bit array, etc.)
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| D | sys_io.h | 48 * @brief Output a 16 bits to an I/O port
50 * This function writes a 16 bits to the given port.
52 * @param data the 16 bits to write
53 * @param port the port address where to write the 16 bits
58 * @brief Input 16 bits from an I/O port
60 * This function reads 16 bits from the port.
62 * @param port the port address from where to read the 16 bits
64 * @return the 16 bits read
69 * @brief Output 32 bits to an I/O port
71 * This function writes 32 bits to the given port.
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| D | math_extras.h | 122 * Count the number of leading zero bits in the bitwise representation of `x`.
123 * When `x = 0`, this is the size of `x` in bits.
128 * @brief Count the number of leading zero bits in a 32-bit integer.
130 * @return Number of leading zero bits in `x`.
135 * @brief Count the number of leading zero bits in a 64-bit integer.
137 * @return Number of leading zero bits in `x`.
146 * Count the number of trailing zero bits in the bitwise representation of `x`.
147 * When `x = 0`, this is the size of `x` in bits.
152 * @brief Count the number of trailing zero bits in a 32-bit integer.
154 * @return Number of trailing zero bits in `x`.
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| D | time_units.h | 82 * target frequency fits in 64 bits.
100 * result is 32 bits.
108 * result32 - The result will be truncated to 32 bits on use
306 * print "/", "** \@brief Convert $hfrom to $hto. $ret32 bits. $hround.\n";
345 /** @brief Convert seconds to hardware cycles. 32 bits. Truncates.
361 /** @brief Convert seconds to hardware cycles. 64 bits. Truncates.
377 /** @brief Convert seconds to hardware cycles. 32 bits. Round nearest.
393 /** @brief Convert seconds to hardware cycles. 64 bits. Round nearest.
409 /** @brief Convert seconds to hardware cycles. 32 bits. Rounds up.
425 /** @brief Convert seconds to hardware cycles. 64 bits. Rounds up.
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| /Zephyr-latest/soc/nxp/rw/ |
| D | pinctrl_defs.h | 90 (IOMUX_FLEXCOMM_CLR(0x0ULL, 0x418ULL) | /* Flexcomm bits to clear */ \
91 IOMUX_FSEL_CLR(0x0ULL) | /* FSEL bits to clear */ \
97 (IOMUX_FLEXCOMM_CLR(0x0ULL, 0x0ULL) | /* Flexcomm bits to clear */ \
98 IOMUX_FSEL_CLR(0x0ULL) | /* FSEL bits to clear */ \
104 (IOMUX_FLEXCOMM_CLR(0x0ULL, 0x32eULL) | /* Flexcomm bits to clear */ \
105 IOMUX_FSEL_CLR(0x0ULL) | /* FSEL bits to clear */ \
111 (IOMUX_FLEXCOMM_CLR(0x0ULL, 0x22eULL) | /* Flexcomm bits to clear */ \
112 IOMUX_FSEL_CLR(0x0ULL) | /* FSEL bits to clear */ \
118 (IOMUX_FLEXCOMM_CLR(0x0ULL, 0x2dULL) | /* Flexcomm bits to clear */ \
119 IOMUX_FSEL_CLR(0x800000ULL) | /* FSEL bits to clear */ \
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| /Zephyr-latest/tests/lib/net_buf/buf_simple/src/ |
| D | main.c | 56 "Invalid 16 bits byte order"); in ZTEST()
64 "Invalid 16 bits byte order"); in ZTEST()
72 sizeof(le16), "Invalid 16 bits byte order"); in ZTEST()
80 sizeof(be16), "Invalid 16 bits byte order"); in ZTEST()
88 "Invalid 24 bits byte order"); in ZTEST()
96 "Invalid 24 bits byte order"); in ZTEST()
104 sizeof(le24), "Invalid 24 bits byte order"); in ZTEST()
112 sizeof(be24), "Invalid 24 bits byte order"); in ZTEST()
120 "Invalid 32 bits byte order"); in ZTEST()
128 "Invalid 32 bits byte order"); in ZTEST()
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| /Zephyr-latest/dts/bindings/dma/ |
| D | andestech,atcdmac300.yaml | 47 0x0: Byte (8 bits)
48 0x1: Half-word (16 bits)
49 0x2: Word (32 bits)
50 0x3: Double word (64 bits)
51 0x4: Quad word (128 bits)
52 0x5: Eight word (256 bits)
55 0x0: Byte (8 bits)
56 0x1: Half-word (16 bits)
57 0x2: Word (32 bits)
58 0x3: Double word (64 bits)
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| D | st,stm32u5-dma.yaml | 21 2. slot: DMA periph request ID, which is written in the REQSEL bits of the CxTR2
37 0x0: Byte (8 bits)
38 0x1: Half-word (16 bits)
39 0x2: Word (32 bits)
42 0x0: Byte (8 bits)
43 0x1: Half-word (16 bits)
44 0x2: Word (32 bits)
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| D | gd,gd32-dma.yaml | 25 - 0x0: 8 bits
26 - 0x1: 16 bits
27 - 0x2: 32 bits
31 - 0x0: 8 bits
32 - 0x1: 16 bits
33 - 0x2: 32 bits
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| /Zephyr-latest/drivers/entropy/ |
| D | Kconfig.npcx | 21 The chosen security strength defines the amount of entropy bits
25 bool "DRBG security strength 112 bits"
28 bool "DRBG security strength 128 bits"
31 bool "DRBG security strength 192 bits"
34 bool "DRBG security strength 256 bits"
37 bool "DRBG security strength 12b bits test"
40 bool "DRBG security strength 256 bits test"
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| /Zephyr-latest/subsys/bluetooth/controller/util/ |
| D | util.c | 24 * @brief Population count: Count the number of bits set to 1
61 * bits.
64 * - It shall have at least three ones in the least significant 8 bits.
66 * bits.
131 * significant six bits. in util_aa_le32()
186 * significant 16 bits. in util_aa_le32()
231 uint8_t bits; in util_saa_le32() local
263 * values shall differ in at least two bits. in util_saa_le32()
264 * - Find the number of bits required to support 3 times the maximum in util_saa_le32()
266 * - Clear those number many bits in util_saa_le32()
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| /Zephyr-latest/tests/bluetooth/uuid/src/ |
| D | test_bt_uuid_cmp.c | 19 /* Compare UUID 16 bits */ in ZTEST()
23 /* Compare UUID 128 bits */ in ZTEST()
27 /* Compare UUID 16 bits with UUID 128 bits */ in ZTEST()
31 /* Compare different UUID 16 bits */ in ZTEST()
35 /* Compare different UUID 128 bits */ in ZTEST()
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| D | test_bt_uuid_create.c | 29 /* Compare UUID 16 bits */ in ZTEST()
33 /* Compare UUID 128 bits */ in ZTEST()
37 /* Compare swapped UUID 16 bits */ in ZTEST()
45 /* Compare UUID 16 bits */ in ZTEST()
49 /* Compare UUID 128 bits */ in ZTEST()
53 /* Compare swapped UUID 16 bits */ in ZTEST()
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| /Zephyr-latest/drivers/can/ |
| D | can_stm32_fdcan.c | 33 * - TEST register SVAL, TXBNS, PVAL, and TXBNP bits are not available.
34 * - CCCR register VMM and UTSU bits are not available.
262 uint32_t bits; in can_stm32fd_read_reg() local
270 err = can_mcan_sys_read_reg(stm32fd_config->base, remap, &bits); in can_stm32fd_read_reg()
281 /* Remap IR/IE bits, ignoring unsupported bits */ in can_stm32fd_read_reg()
282 /* Group 1 map bits 23-16 (stm32fd) to 29-22 (mcan) */ in can_stm32fd_read_reg()
283 *val |= ((bits & GENMASK(23, 16)) << 6); in can_stm32fd_read_reg()
285 /* Group 2 map bits 15-11 (stm32fd) to 18-14 (mcan) */ in can_stm32fd_read_reg()
286 *val |= ((bits & GENMASK(15, 11)) << 3); in can_stm32fd_read_reg()
288 /* Group 3 map bits 10-4 (stm32fd) to 12-6 (mcan) */ in can_stm32fd_read_reg()
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| /Zephyr-latest/include/zephyr/drivers/misc/ft8xx/ |
| D | ft8xx_common.h | 29 * @brief Write 1 byte (8 bits) to FT8xx memory
37 * @brief Write 2 bytes (16 bits) to FT8xx memory
45 * @brief Write 4 bytes (32 bits) to FT8xx memory
53 * @brief Read 1 byte (8 bits) from FT8xx memory
62 * @brief Read 2 bytes (16 bits) from FT8xx memory
71 * @brief Read 4 bytes (32 bits) from FT8xx memory
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| /Zephyr-latest/drivers/interrupt_controller/ |
| D | intc_ioapic_priv.h | 33 /* Version register bits */
40 /* Redirection table entry bits: upper 32 bit */
44 /* Redirection table entry bits: lower 32 bit */
51 /* We care only about the first 14 bits.
52 * The 15th bits is in the first 32bits of RTE but since
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| /Zephyr-latest/subsys/bluetooth/controller/ |
| D | Kconfig.df | 278 bool "Conversion of IQ samples to 8 bits wide by 4 bits shift"
282 Bluetooth 5.3 Core Specification defines IQ samples to be 8 bits wide: Vol 4, Part E
284 8 bits by ordinary right shift operation by 4 bits. That means there is loss in accuracy
288 bool "Conversion of IQ samples to 8 bits wide by 2 bits shift"
292 Bluetooth 5.3 Core Specification defines IQ samples to be 8 bits wide: Vol 4, Part E
294 8 bits by ordinary right shift operation by 2 bits and a cast to int8_t. That means there
299 bool "Conversion of IQ samples to 8 bits wide by use of 8 LSB"
303 Bluetooth 5.3 Core Specification defines IQ samples to be 8 bits wide: Vol 4, Part E
305 8 bits by use of 8 least significant bits. This conversion may be used only if you are
306 sure actual samples are not greater than 8 bits. This prevents additional accuracy loss
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| /Zephyr-latest/include/zephyr/drivers/mfd/ |
| D | npm1300.h | 47 * @param base Register base address (bits 15..8 of 16-bit address)
48 * @param offset Register offset address (bits 7..0 of 16-bit address)
61 * @param base Register base address (bits 15..8 of 16-bit address)
62 * @param offset Register offset address (bits 7..0 of 16-bit address)
73 * @param base Register base address (bits 15..8 of 16-bit address)
74 * @param offset Register offset address (bits 7..0 of 16-bit address)
85 * @param base Register base address (bits 15..8 of 16-bit address)
86 * @param offset Register offset address (bits 7..0 of 16-bit address)
96 * @brief Update selected bits in npm1300 register
99 * @param base Register base address (bits 15..8 of 16-bit address)
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| /Zephyr-latest/dts/bindings/serial/ |
| D | uart-controller.yaml | 26 stop-bits:
29 Sets the number of stop bits.
35 data-bits:
38 Sets the number of data bits.
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| /Zephyr-latest/include/zephyr/ |
| D | irq_multilevel.h | 29 /* Interrupt bits */
31 /* First level interrupt bits */
33 /* Second level interrupt bits */
35 /* Third level interrupt bits */
37 } bits; member
56 return irq.bits.l1; in _z_l1_irq()
61 return irq.bits.l2 - 1; in _z_l2_irq()
66 return irq.bits.l3 - 1; in _z_l3_irq()
71 if (z_irq.bits.l3 != 0) { in _z_irq_get_level()
75 if (z_irq.bits.l2 != 0) { in _z_irq_get_level()
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| /Zephyr-latest/include/zephyr/drivers/ |
| D | swdp.h | 21 /* SWDP packet request bits */
27 /* SWDP acknowledge response bits */
46 * @brief Write count bits to SWDIO from data LSB first
49 * @param count Number of bits to write
50 * @param data Bits to write
58 * @brief Read count bits from SWDIO into data LSB first
61 * @param count Number of bits to read
62 * @param data Buffer to store bits read
73 * @param request SWDP request bits
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| /Zephyr-latest/include/zephyr/dt-bindings/led/ |
| D | seagate_legend_b1414.h | 12 * 1200 ns -> 7.2 bits
13 * 300 ns -> 1.8 bits
14 * 900 ns -> 5.4 bits
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| D | worldsemi_ws2812c.h | 12 * 1090 ns -> 7.6 bits
13 * 300 ns -> 2.1 bits
14 * 790 ns -> 5.5 bits
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| /Zephyr-latest/samples/drivers/led/led_strip/ |
| D | f070rb-bindings.h | 18 * 1200 ns -> 7.2 bits
19 * 300 ns -> 1.8 bits
20 * 900 ns -> 5.4 bits
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| /Zephyr-latest/include/zephyr/arch/arm64/ |
| D | tpidrro_el0.h | 9 * @brief tpidrro_el0 bits allocation
13 * aligned, and the address space is 48 bits max. That leaves plenty of
14 * free bits for other purposes.
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