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Searched full:bcr (Results 1 – 18 of 18) sorted by relevance

/Zephyr-latest/arch/arc/core/
Dsmp.c99 struct arc_connect_bcr bcr; in arch_secondary_cpu_init() local
101 bcr.val = z_arc_v2_aux_reg_read(_ARC_V2_CONNECT_BCR); in arch_secondary_cpu_init()
103 if (bcr.dbg) { in arch_secondary_cpu_init()
163 struct arc_connect_bcr bcr; in arch_smp_init() local
168 bcr.val = z_arc_v2_aux_reg_read(_ARC_V2_CONNECT_BCR); in arch_smp_init()
170 if (bcr.dbg) { in arch_smp_init()
175 if (bcr.ipi) { in arch_smp_init()
189 if (bcr.gfrc) { in arch_smp_init()
/Zephyr-latest/drivers/i3c/
Di3c_common.c458 struct i3c_ccc_getbcr bcr = {0}; in i3c_device_basic_info_get() local
466 * Since some CCC functions requires BCR to function in i3c_device_basic_info_get()
467 * correctly, we save the BCR here and update the BCR in i3c_device_basic_info_get()
469 * we can restore the BCR. in i3c_device_basic_info_get()
471 tmp_bcr = target->bcr; in i3c_device_basic_info_get()
474 ret = i3c_ccc_do_getbcr(target, &bcr); in i3c_device_basic_info_get()
479 target->bcr = bcr.bcr; in i3c_device_basic_info_get()
504 * supports it can't be known ahead of time. So if the BCR bit for Advanced capabilities is in i3c_device_basic_info_get()
510 } else if ((ret != 0) && (target->bcr & I3C_BCR_ADV_CAPABILITIES)) { in i3c_device_basic_info_get()
517 if (target->bcr & I3C_BCR_MAX_DATA_SPEED_LIMIT) { in i3c_device_basic_info_get()
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Di3c_ccc.c19 struct i3c_ccc_getbcr *bcr) in i3c_ccc_do_getbcr() argument
26 __ASSERT_NO_MSG(bcr != NULL); in i3c_ccc_do_getbcr()
30 ccc_tgt_payload.data = &bcr->bcr; in i3c_ccc_do_getbcr()
31 ccc_tgt_payload.data_len = sizeof(bcr->bcr); in i3c_ccc_do_getbcr()
408 if ((target->bcr & I3C_BCR_IBI_PAYLOAD_HAS_DATA_BYTE) in i3c_ccc_do_setmrl()
433 has_ibi_sz = (target->bcr & I3C_BCR_IBI_PAYLOAD_HAS_DATA_BYTE) in i3c_ccc_do_getmrl()
Di3c_shell.c218 desc->bcr, desc->dcr, desc->data_speed.maxrd, in cmd_i3c_info()
264 desc->bcr, desc->dcr, desc->data_speed.maxrd, in cmd_i3c_info()
732 struct i3c_ccc_getbcr bcr; in cmd_i3c_ccc_getbcr() local
740 ret = i3c_ccc_do_getbcr(desc, &bcr); in cmd_i3c_ccc_getbcr()
746 shell_print(sh, "BCR: 0x%02x", bcr.bcr); in cmd_i3c_ccc_getbcr()
747 desc->bcr = bcr.bcr; in cmd_i3c_ccc_getbcr()
821 if (desc->bcr & I3C_BCR_IBI_PAYLOAD_HAS_DATA_BYTE) { in cmd_i3c_ccc_getmrl()
871 if ((desc->bcr & I3C_BCR_IBI_PAYLOAD_HAS_DATA_BYTE) && (argc < 5)) { in cmd_i3c_ccc_setmrl()
948 if ((argc > 3) && (desc->bcr & I3C_BCR_IBI_PAYLOAD_HAS_DATA_BYTE)) { in cmd_i3c_ccc_setmrl_bc()
1658 if (!(desc->bcr & I3C_BCR_MAX_DATA_SPEED_LIMIT)) { in cmd_i3c_ccc_getmxds()
Di3c_cdns.c384 #define DEV_ID_RR2_BCR(bcr) ((bcr) << 8) argument
1039 sir_cfg = SIR_MAP_DEV_ROLE(I3C_BCR_DEVICE_ROLE(target->bcr)) | in cdns_i3c_controller_ibi_enable()
1045 if (target->bcr & I3C_BCR_MAX_DATA_SPEED_LIMIT) { in cdns_i3c_controller_ibi_enable()
1049 LOG_DBG("%s: IBI enabling for 0x%02x (BCR 0x%02x)", dev->name, target->dynamic_addr, in cdns_i3c_controller_ibi_enable()
1050 target->bcr); in cdns_i3c_controller_ibi_enable()
1561 uint8_t bcr = dev_id_rr2 >> 8; in cdns_i3c_do_daa() local
1575 target->bcr = bcr; in cdns_i3c_do_daa()
1973 * primary controller. When assigned through ENTDAA, the dynamic address, bcr, dcr, and pid in cdns_i3c_attach_device()
2032 uint32_t dev_id_rr2 = DEV_ID_RR2_PID_LSB(desc->pid & 0xFFFF) | DEV_ID_RR2_BCR(desc->bcr) | in cdns_i3c_reattach_device()
Di3c_npcx.c112 #define DAA_TGT_INFO_SZ 0x8 /* 8 bytes = PID(6) + BCR(1) + DCR(1) */
1355 /* Receive Provisioned ID, BCR and DCR (total 8 bytes) */ in npcx_i3c_do_daa()
1406 target->bcr = rx_buf[6]; in npcx_i3c_do_daa()
1794 LOG_DBG("IBI enabling for 0x%02x (BCR 0x%02x)", target->dynamic_addr, target->bcr); in npcx_i3c_ibi_enable()
2525 SET_FIELD(inst->IDEXT, NPCX_I3C_IDEXT_BCR, config_target->bcr); in npcx_i3c_apply_target_config()
2553 if (I3C_BCR_DEVICE_ROLE(config_target->bcr) == I3C_BCR_DEVICE_ROLE_I3C_CONTROLLER_CAPABLE) { in npcx_i3c_dev_init()
3039 .config_target.bcr = DT_INST_PROP(id, bcr), \
Di3c_mcux.c1222 /* Loop to grab data from devices (Provisioned ID, BCR and DCR) */ in mcux_i3c_do_daa()
1278 target->bcr = rx_buf[6]; in mcux_i3c_do_daa()
1660 LOG_DBG("IBI enabling for 0x%02x (BCR 0x%02x)", in mcux_i3c_ibi_enable()
1661 target->dynamic_addr, target->bcr); in mcux_i3c_ibi_enable()
Di3c_stm32.c1592 uint8_t bcr; in i3c_stm32_event_isr_tx() local
1597 bcr = (data->pid >> 8) & 0xFF; in i3c_stm32_event_isr_tx()
1620 target->bcr = bcr; in i3c_stm32_event_isr_tx()
/Zephyr-latest/dts/bindings/i3c/
Dnuvoton,npcx-i3c.yaml33 bcr = <0x67>; /* Set for controller mode */
81 bcr:
/Zephyr-latest/include/zephyr/drivers/
Di3c.h39 * @name Bus Characteristic Register (BCR)
42 * - BCR[7:6]: Device Role
48 * - BCR[5]: Advanced Capabilities
53 * - BCR[4]: Virtual Target Support
57 * - BCR[3]: Offline Capable
61 * - BCR[2]: IBI Payload
67 * - BCR[1]: IBI Request Capable
71 * - BCR[0]: Max Data Speed Limitation
136 * Obtain Device Role value from the BCR value obtained via GETBCR.
138 * @param bcr BCR value
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/Zephyr-latest/doc/hardware/peripherals/
Di3c.rst93 * BCR and DCR need to be obtained separately to populate
101 its Provisioned ID, BCR, and DCR back. Match the received
108 * Also, set the BCR and DCR fields in the device descriptor
131 basic device information such as BCR, DCR, MRL and MWL.
295 such as, its dynamic address, BCR, DCR, MRL and MWL. Therefore,
/Zephyr-latest/drivers/ethernet/
Deth_smsc911x.c306 uint32_t bcr = 0U; in smsc_establish_link() local
309 smsc_phy_regread(SMSC9220_PHY_BCONTROL, &bcr); in smsc_establish_link()
310 bcr |= (1 << 12) | (1 << 9); in smsc_establish_link()
311 smsc_phy_regwrite(SMSC9220_PHY_BCONTROL, bcr); in smsc_establish_link()
312 smsc_phy_regread(SMSC9220_PHY_BCONTROL, &bcr); in smsc_establish_link()
/Zephyr-latest/drivers/pinctrl/
Dpinctrl_wch_afio.c62 regs->BCR = BIT(pin); in pinctrl_configure_pins()
/Zephyr-latest/include/zephyr/drivers/i3c/
Dccc.h411 uint8_t bcr; member
439 uint8_t bcr; member
525 uint8_t bcr; member
1377 * @brief Get BCR from a target
1379 * Helper function to get BCR (Bus Characteristic Register) from
1383 * @param[out] bcr Pointer to the BCR payload structure.
1388 struct i3c_ccc_getbcr *bcr);
1766 * Note this uses the BCR of the target to determine whether
1783 * Note this uses the BCR of the target to determine whether
1813 * Note this uses the BCR of the target to determine whether
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Dtarget_device.h70 /** Bus Characteristics Register (BCR). */
71 uint8_t bcr; member
/Zephyr-latest/drivers/gpio/
Dwch_gpio_ch32v00x.c94 config->regs->BCR = pins; in gpio_ch32v00x_port_clear_bits_raw()
/Zephyr-latest/drivers/can/
Dcan_rcar.c726 uint32_t bcr; in can_rcar_set_bittiming() local
728 bcr = RCAR_CAN_BCR_TSEG1(timing->phase_seg1 + timing->prop_seg - 1) | in can_rcar_set_bittiming()
733 /* Don't overwrite CLKR with 32-bit BCR access; CLKR has 8-bit access. in can_rcar_set_bittiming()
737 sys_write32((bcr << 8) | RCAR_CAN_CLKR_CLKP2, in can_rcar_set_bittiming()
/Zephyr-latest/doc/releases/
Drelease-notes-4.0.rst646 * Added retrieving GETMXDS within :c:func:`i3c_device_basic_info_get` if BCR mxds