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/hal_nxp-latest/mcux/mcux-sdk/components/pf1550/
Dfsl_pf1550_charger.c26 void PF1550_SetChargerAttibute(pf1550_handle_t *handle, const pf1550_charger_attribute_t *attribute) in PF1550_SetChargerAttibute() argument
31 assert(attribute); in PF1550_SetChargerAttibute()
34 temp = (attribute->fastChargeCurrent_mA > 1000U) ? 1000U : attribute->fastChargeCurrent_mA; in PF1550_SetChargerAttibute()
35 temp = (attribute->fastChargeCurrent_mA < 100U) ? 100U : temp; in PF1550_SetChargerAttibute()
40 … temp = (attribute->fastChargeVoltage_uV > 4440000U) ? 4440000U : attribute->fastChargeVoltage_uV; in PF1550_SetChargerAttibute()
41 temp = (attribute->fastChargeVoltage_uV < 3500000U) ? 3500000U : temp; in PF1550_SetChargerAttibute()
46 …(void)PF1550_ModifyReg(handle, PF1550_CHG_TMR, 0x80U, ((attribute->preChargeTime_min <= 30U) ? 0x0… in PF1550_SetChargerAttibute()
49 temp = (attribute->fastChargeTime_hr > 14U) ? 14U : attribute->fastChargeTime_hr; in PF1550_SetChargerAttibute()
54 temp = (attribute->endOfChargeTime_min > 70U) ? 70U : attribute->endOfChargeTime_min; in PF1550_SetChargerAttibute()
59 if (attribute->endOfChargeCurrentThreshold_mA >= 50U) in PF1550_SetChargerAttibute()
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Dfsl_pf1550.c862 const pf1550_switch_attribute_t *attribute) in PF1550_SetSwitchAttribute() argument
868 assert(attribute); in PF1550_SetSwitchAttribute()
873 temp = ((attribute->enableLowPowerMode ? PF1550_SW_CTRL_LPWR_MASK : 0U) | in PF1550_SetSwitchAttribute()
874 (attribute->enableForcedPwm ? PF1550_SW_CTRL_FPWM_MASK : 0U) | in PF1550_SetSwitchAttribute()
875 (attribute->enableDischargeResistor ? PF1550_SW_CTRL_RDIS_EN_MASK : 0U)); in PF1550_SetSwitchAttribute()
878 temp |= (PF1550_SW_CTRL_DVSSPEED(attribute->dvsSpeed) | in PF1550_SetSwitchAttribute()
879 (attribute->enableForcedPwmInDvs ? PF1550_SW_CTRL_FPWM_IN_DVS_MASK : 0U)); in PF1550_SetSwitchAttribute()
887 (void)PF1550_WriteReg(handle, powerDownRegTab[module], (uint8_t)attribute->powerDownSequence); in PF1550_SetSwitchAttribute()
892 (void)PF1550_WriteReg(handle, PF1550_SW1_CTRL1, (uint8_t)attribute->currentLimit); in PF1550_SetSwitchAttribute()
896 (void)PF1550_WriteReg(handle, PF1550_SW2_CTRL1, (uint8_t)attribute->currentLimit); in PF1550_SetSwitchAttribute()
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Dfsl_pf1550.h303 /*! @brief PF1550 Regulator Power Down Sequence Attribute definition. */
306 … kPF1550_RegulatorPowerDownSeqOpt0 = 0x0U, /* Regulator Power Down Sequence Attribute: Option 0. */
307 … kPF1550_RegulatorPowerDownSeqOpt1 = 0x1U, /* Regulator Power Down Sequence Attribute: Option 1. */
308 … kPF1550_RegulatorPowerDownSeqOpt2 = 0x2U, /* Regulator Power Down Sequence Attribute: Option 2. */
309 … kPF1550_RegulatorPowerDownSeqOpt3 = 0x3U, /* Regulator Power Down Sequence Attribute: Option 3. */
310 … kPF1550_RegulatorPowerDownSeqOpt4 = 0x4U, /* Regulator Power Down Sequence Attribute: Option 4. */
311 … kPF1550_RegulatorPowerDownSeqOpt5 = 0x5U, /* Regulator Power Down Sequence Attribute: Option 5. */
312 … kPF1550_RegulatorPowerDownSeqOpt6 = 0x6U, /* Regulator Power Down Sequence Attribute: Option 6. */
313 … kPF1550_RegulatorPowerDownSeqOpt7 = 0x7U, /* Regulator Power Down Sequence Attribute: Option 7. */
316 /*! @brief PF1550 Switch DVS Speed Attribute definition. */
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Dfsl_pf1550_charger.h110 /*! @brief PF1550 Charger Attribute definition. */
123 /*! @brief PF1550 BATT to VSYS FET Attribute definition. */
136 /*! @brief PF1550 Power Path Attribute definition. */
151 /*! @brief PF1550 Thermal Attribute definition. */
165 /*! @brief PF1550 Charger LED Indicator Attribute definition. */
188 void PF1550_SetChargerAttibute(pf1550_handle_t *handle, const pf1550_charger_attribute_t *attribute
193 void PF1550_SetBatFETAttibute(pf1550_handle_t *handle, const pf1550_batFET_attribute_t *attribute);
194 …1550_SetPowerPathAttibute(pf1550_handle_t *handle, const pf1550_power_path_attribute_t *attribute);
195 void PF1550_SetThermalAttibute(pf1550_handle_t *handle, const pf1550_thermal_attribute_t *attribute
197 void PF1550_SetLedAttibute(pf1550_handle_t *handle, const pf1550_led_attribute_t *attribute);
/hal_nxp-latest/mcux/mcux-sdk/CMSIS/
DCMSIS.yml1046 attribute: extra-libraries
1050 attribute: extra-libraries
1076 attribute: extra-libraries
1102 attribute: extra-libraries
1106 attribute: extra-libraries
1132 attribute: extra-libraries
1158 attribute: extra-libraries
1162 attribute: extra-libraries
1188 attribute: extra-libraries
1214 attribute: extra-libraries
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DCMSIS_v2.yml2459 attribute: extra-libraries
2464 attribute: extra-libraries
2469 attribute: extra-libraries
2474 attribute: extra-libraries
2479 attribute: extra-libraries
2484 attribute: extra-libraries
2489 attribute: extra-libraries
2494 attribute: extra-libraries
2499 attribute: extra-libraries
2529 attribute: extra-libraries
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/hal_nxp-latest/mcux/mcux-sdk/components/pf3000/
Dfsl_pf3000.h161 /*! @brief PF3000 Switch DVS Speed Attribute definition. */
185 /*! @brief PF3000 Switch Current Limit Attribute definition. */
192 /*! @brief PF3000 Switch Attribute Structure definition. */
212 /*! @brief PF3000 Switch Boost Attribute Structure definition. */
226 /*! @brief PF3000 LDO Attribute Structure definition. */
234 /*! @brief PF3000 Coin Cell Charging Voltage Attribute definition. */
247 /*! @brief PF3000 Coin Cell Attribute Structure definition. */
270 /*! @brief PF3000 Standby Pad Attribute Structure definition. */
290 /*! @brief PF3000 PWRON Pad Attribute Structure definition. */
583 * @param attribute Pointer to the Switch Attribute structure to set.
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Dfsl_pf3000.c987 const pf3000_switch_attribute_t *attribute) in PF3000_SetSwitchAttribute() argument
994 assert(attribute); in PF3000_SetSwitchAttribute()
1023 …temp = ((attribute->offMode ? PF3000_SW_MODE_OFF_MASK : 0U) | (PF3000_SW_MODE_SELECTOR(attribute->… in PF3000_SetSwitchAttribute()
1031 …temp = ((attribute->dvsSpeed ? PF3000_SW_CTRL_DVSSPEED_MASK : 0U) | (PF3000_SW_CTRL_PHASE(attribut… in PF3000_SetSwitchAttribute()
1032 (PF3000_SW_CTRL_FREQUENCY(attribute->frequency)) | in PF3000_SetSwitchAttribute()
1033 (attribute->currentLimit ? PF3000_SW_CTRL_CURRENT_LIMIT_MASK : 0U)); in PF3000_SetSwitchAttribute()
1041 …_SetSwitchBoostAttribute(pf3000_handle_t *handle, const pf3000_switch_boost_attribute_t *attribute) in PF3000_SetSwitchBoostAttribute() argument
1047 assert(attribute); in PF3000_SetSwitchBoostAttribute()
1051 temp = (PF3000_SW_BST_CTRL_STANDBY_MODE(attribute->standbyMode) | in PF3000_SetSwitchBoostAttribute()
1052 PF3000_SW_BST_CTRL_NORMAL_MODE(attribute->normalMode)); in PF3000_SetSwitchBoostAttribute()
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/hal_nxp-latest/mcux/mcux-sdk/CMSIS/Include/
Dmpu_armv8.h34 /** \brief Attribute for device memory (outer only) */
37 /** \brief Attribute for non-cacheable, normal memory */
40 /** \brief Attribute for normal memory (outer and inner)
61 /** \brief Memory Attribute
97 * \param IDX The attribute index to be associated with this memory region.
109 * \param IDX The attribute index to be associated with this memory region.
177 /** Set the memory attribute encoding to the given MPU.
179 * \param idx The attribute index to be set [0-7]
180 * \param attr The attribute value to be set.
195 /** Set the memory attribute encoding.
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Dmpu_armv7.h95 * MPU Region Attribute and Size Register Value
112 * MPU Region Attribute and Size Register Value
127 * MPU Memory Access Attribute for strongly ordered memory.
136 * MPU Memory Access Attribute for device memory.
147 * MPU Memory Access Attribute for normal memory.
160 * MPU Memory Access Attribute non-cacheable policy.
165 * MPU Memory Access Attribute write-back, write and read allocate policy.
170 * MPU Memory Access Attribute write-through, no write allocate policy.
175 * MPU Memory Access Attribute write-back, no write allocate policy.
185 uint32_t RASR; //!< The region attribute and size register value (RASR) \ref MPU_RASR
/hal_nxp-latest/mcux/mcux-sdk/CMSIS/Core/Include/
Dmpu_armv8.h34 /** \brief Attribute for device memory (outer only) */
37 /** \brief Attribute for non-cacheable, normal memory */
40 /** \brief Attribute for normal memory (outer and inner)
61 /** \brief Memory Attribute
97 * \param IDX The attribute index to be associated with this memory region.
109 * \param IDX The attribute index to be associated with this memory region.
183 /** Set the memory attribute encoding to the given MPU.
185 * \param idx The attribute index to be set [0-7]
186 * \param attr The attribute value to be set.
201 /** Set the memory attribute encoding.
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Dmpu_armv7.h95 * MPU Region Attribute and Size Register Value
112 * MPU Region Attribute and Size Register Value
127 * MPU Memory Access Attribute for strongly ordered memory.
136 * MPU Memory Access Attribute for device memory.
147 * MPU Memory Access Attribute for normal memory.
160 * MPU Memory Access Attribute non-cacheable policy.
165 * MPU Memory Access Attribute write-back, write and read allocate policy.
170 * MPU Memory Access Attribute write-through, no write allocate policy.
175 * MPU Memory Access Attribute write-back, no write allocate policy.
185 uint32_t RASR; //!< The region attribute and size register value (RASR) \ref MPU_RASR
/hal_nxp-latest/mcux/mcux-sdk/drivers/gpio/
Dfsl_gpio.c268 …* organized as 32-bit words, the attribute controls for the 4 data bytes in the GACR follow a stan…
272 * param attribute GPIO checker attribute
274 void GPIO_CheckAttributeBytes(GPIO_Type *base, gpio_checker_attribute_t attribute) in GPIO_CheckAttributeBytes() argument
277 base->GACR = ((uint8_t)attribute << GPIO_GACR_ACB_SHIFT); in GPIO_CheckAttributeBytes()
279 …base->GACR = ((uint32_t)attribute << GPIO_GACR_ACB0_SHIFT) | ((uint32_t)attribute << GPIO_GACR_ACB… in GPIO_CheckAttributeBytes()
280 … ((uint32_t)attribute << GPIO_GACR_ACB2_SHIFT) | ((uint32_t)attribute << GPIO_GACR_ACB3_SHIFT); in GPIO_CheckAttributeBytes()
430 …* attributes required for a successful access to the GPIO programming model. The attribute control…
435 * param attribute FGPIO checker attribute
437 void FGPIO_CheckAttributeBytes(FGPIO_Type *base, gpio_checker_attribute_t attribute) in FGPIO_CheckAttributeBytes() argument
439 …base->GACR = ((uint32_t)attribute << FGPIO_GACR_ACB0_SHIFT) | ((uint32_t)attribute << FGPIO_GACR_A… in FGPIO_CheckAttributeBytes()
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Dfsl_gpio.h44 /*! @brief GPIO checker attribute */
63 kGPIO_IgnoreAttributeCheck = 0x80U, /*!< Ignores the attribute check */
598 …* organized as 32-bit words, the attribute controls for the 4 data bytes in the GACR follow a stan…
602 * @param attribute GPIO checker attribute
604 void GPIO_CheckAttributeBytes(GPIO_Type *base, gpio_checker_attribute_t attribute);
777 …* attributes required for a successful access to the GPIO programming model. The attribute control…
782 * @param attribute FGPIO checker attribute
784 void FGPIO_CheckAttributeBytes(FGPIO_Type *base, gpio_checker_attribute_t attribute);
/hal_nxp-latest/mcux/mcux-sdk/drivers/rgpio/
Dfsl_rgpio.c154 …* attributes required for a successful access to the RGPIO programming model. The attribute contro…
161 void RGPIO_CheckAttributeBytes(RGPIO_Type *base, rgpio_checker_attribute_t attribute) in RGPIO_CheckAttributeBytes() argument
163 …base->GACR = ((uint32_t)attribute << RGPIO_GACR_ACB0_SHIFT) | ((uint32_t)attribute << RGPIO_GACR_A… in RGPIO_CheckAttributeBytes()
164 … ((uint32_t)attribute << RGPIO_GACR_ACB2_SHIFT) | ((uint32_t)attribute << RGPIO_GACR_ACB3_SHIFT); in RGPIO_CheckAttributeBytes()
308 …* attributes required for a successful access to the RGPIO programming model. The attribute contro…
315 void FGPIO_CheckAttributeBytes(FGPIO_Type *base, rgpio_checker_attribute_t attribute) in FGPIO_CheckAttributeBytes() argument
317 base->GACR = (attribute << FGPIO_GACR_ACB0_SHIFT) | (attribute << FGPIO_GACR_ACB1_SHIFT) | in FGPIO_CheckAttributeBytes()
318 (attribute << FGPIO_GACR_ACB2_SHIFT) | (attribute << FGPIO_GACR_ACB3_SHIFT); in FGPIO_CheckAttributeBytes()
/hal_nxp-latest/mcux/mcux-sdk/drivers/xrdc2/
Dfsl_xrdc2.h47 * @brief XRDC2 secure attribute, the register bit MDACi_MDAj_W0[SA],
48 * secure/nonsecure attribute output on a hit.
52 kXRDC2_MasterSecure = 0, /*!< Use the bus master's secure/nonsecure attribute directly. */
53 kXRDC2_ForceSecure = 2, /*!< Force the bus attribute for this master to secure. */
54 kXRDC2_ForceNonSecure = 3, /*!< Force the bus attribute for this master to non-secure. */
58 * @brief XRDC2 privileged attribute, the register bit MDACi_MDAj_W0[PA],
59 * defines the privileged/user attribute on a hit.
63 kXRDC2_MasterPrivilege = 0, /*!< Use the bus master's attribute directly. */
64 kXRDC2_ForceUser = 2, /*!< Force the bus attribute for this master to user. */
65 kXRDC2_ForcePrivilege = 3, /*!< Force the bus attribute for this master to privileged. */
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/hal_nxp-latest/mcux/mcux-sdk/drivers/trdc_1/
Dfsl_trdc.h64 * @brief TRDC secure attribute, the register bit TRDC_MDA_W0_0_DFMT0[SA], used for
69 kTRDC_ForceSecure, /*!< Force the bus attribute for this master to secure. */
70 kTRDC_ForceNonSecure, /*!< Force the bus attribute for this master to non-secure. */
71 kTRDC_MasterSecure, /*!< Use the bus master's secure/nonsecure attribute directly. */
72 kTRDC_MasterSecure1, /*!< Use the bus master's secure/nonsecure attribute directly. */
97 uint32_t secureAttr : 2U; /*!< Secure attribute, see @ref trdc_secure_attr_t. */
105 …* @brief TRDC privileged attribute, the register bit TRDC_MDA_W0_x_DFMT1[PA], used for non-process…
110 kTRDC_ForceUser, /*!< Force the bus attribute for this master to user. */
111 kTRDC_ForcePrivilege, /*!< Force the bus attribute for this master to privileged. */
112 kTRDC_MasterPrivilege, /*!< Use the bus master's attribute directly. */
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/hal_nxp-latest/mcux/mcux-sdk/drivers/trdc/
Dfsl_trdc.h58 * @brief TRDC secure attribute, the register bit TRDC_MDA_W0_0_DFMT0[SA], used for
63 kTRDC_ForceSecure, /*!< Force the bus attribute for this master to secure. */
64 kTRDC_ForceNonSecure, /*!< Force the bus attribute for this master to non-secure. */
65 kTRDC_MasterSecure, /*!< Use the bus master's secure/nonsecure attribute directly. */
66 kTRDC_MasterSecure1, /*!< Use the bus master's secure/nonsecure attribute directly. */
97 uint32_t secureAttr : 2U; /*!< Secure attribute, see @ref trdc_secure_attr_t. */
109 …* @brief TRDC privileged attribute, the register bit TRDC_MDA_W0_x_DFMT1[PA], used for non-process…
114 kTRDC_ForceUser, /*!< Force the bus attribute for this master to user. */
115 kTRDC_ForcePrivilege, /*!< Force the bus attribute for this master to privileged. */
116 kTRDC_MasterPrivilege, /*!< Use the bus master's attribute directly. */
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/hal_nxp-latest/mcux/mcux-sdk/drivers/xrdc/
Dfsl_xrdc.h69 * @brief XRDC secure attribute, the register bit XRDC_MDA_Wx[SA], used for non-processor
74 kXRDC_ForceSecure, /*!< Force the bus attribute for this master to secure. */
75 kXRDC_ForceNonSecure, /*!< Force the bus attribute for this master to non-secure. */
76 kXRDC_MasterSecure, /*!< Use the bus master's secure/nonsecure attribute directly. */
77 kXRDC_MasterSecure1, /*!< Use the bus master's secure/nonsecure attribute directly. */
81 * @brief XRDC privileged attribute, the register bit XRDC_MDA_Wx[PA], used for non-processor
86 kXRDC_ForceUser, /*!< Force the bus attribute for this master to user. */
87 kXRDC_ForcePrivilege, /*!< Force the bus attribute for this master to privileged. */
88 kXRDC_MasterPrivilege, /*!< Use the bus master's attribute directly. */
89 kXRDC_MasterPrivilege1, /*!< Use the bus master's attribute directly. */
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/hal_nxp-latest/mcux/mcux-sdk/devices/MKM14ZA5/
DMKM14ZA5.h1444 /*! AC7 - Attribute Check
1458 /*! AC6 - Attribute Check
1472 /*! AC5 - Attribute Check
1486 /*! AC4 - Attribute Check
1500 /*! AC3 - Attribute Check
1514 /*! AC2 - Attribute Check
1528 /*! AC1 - Attribute Check
1542 /*! AC0 - Attribute Check
1560 /*! AC7 - Attribute Check
1574 /*! AC6 - Attribute Check
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/hal_nxp-latest/mcux/mcux-sdk/drivers/mcm/
Dfsl_mcm.h54 * @brief The union of buffer fault attribute.
59 …uint32_t attribute; /*!< Indicates the faulting attributes, when a properly-enabled cache write bu… member
77 * @brief The union of LMEM fault attribute.
81 uint32_t attribute; /*!< Indicates the attributes of the LMEM fault detected. */ member
185 bufferfault->attribute = base->FATR; in MCM_GetBufferFaultAttribute()
396 lmemFault->attribute = base->LMFATR; in MCM_GetLmemFaultAttribute()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKM33ZA5/
DMKM33ZA5.h1446 /*! AC7 - Attribute Check
1460 /*! AC6 - Attribute Check
1474 /*! AC5 - Attribute Check
1488 /*! AC4 - Attribute Check
1502 /*! AC3 - Attribute Check
1516 /*! AC2 - Attribute Check
1530 /*! AC1 - Attribute Check
1544 /*! AC0 - Attribute Check
1562 /*! AC7 - Attribute Check
1576 /*! AC6 - Attribute Check
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/hal_nxp-latest/mcux/mcux-sdk/devices/MKM34ZA5/
DMKM34ZA5.h1442 /*! AC7 - Attribute Check
1456 /*! AC6 - Attribute Check
1470 /*! AC5 - Attribute Check
1484 /*! AC4 - Attribute Check
1498 /*! AC3 - Attribute Check
1512 /*! AC2 - Attribute Check
1526 /*! AC1 - Attribute Check
1540 /*! AC0 - Attribute Check
1558 /*! AC7 - Attribute Check
1572 /*! AC6 - Attribute Check
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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX9352/drivers/edma4/
Dfsl_edma.h188 /*! @brief eDMA channel memory attribute */
231 … kEDMA_AttributeOutput = DMA_CH_SBR_ATTR_MASK, /*!< DMA's AHB system bus attribute output value. */
272 …edma_channel_memory_attribute_t channelReadMemoryAttribute; /*!< channel memory read attribute co…
273 …emory_attribute_t channelWriteMemoryAttribute; /*!< channel memory write attribute configuration */
583 * @brief Set channel memory attribute.
731 * @brief Gets the channel identification and attribute information on the system bus interface.
875 * @brief Configures the eDMA transfer attribute.
877 * This function configures the transfer attribute, including source address, destination address,
919 * This function configures the channel preemption attribute and the priority of the channel.
1097 * @brief Configures the eDMA TCD transfer attribute.
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/hal_nxp-latest/mcux/mcux-sdk/drivers/edma4/
Dfsl_edma.h188 /*! @brief eDMA channel memory attribute */
231 … kEDMA_AttributeOutput = DMA_CH_SBR_ATTR_MASK, /*!< DMA's AHB system bus attribute output value. */
272 …edma_channel_memory_attribute_t channelReadMemoryAttribute; /*!< channel memory read attribute co…
273 …emory_attribute_t channelWriteMemoryAttribute; /*!< channel memory write attribute configuration */
583 * @brief Set channel memory attribute.
731 * @brief Gets the channel identification and attribute information on the system bus interface.
875 * @brief Configures the eDMA transfer attribute.
877 * This function configures the transfer attribute, including source address, destination address,
919 * This function configures the channel preemption attribute and the priority of the channel.
1097 * @brief Configures the eDMA TCD transfer attribute.
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