| /Zephyr-latest/dts/bindings/gpio/ |
| D | xlnx,xps-gpio-1.00.a.yaml | 3 compatible: "xlnx,xps-gpio-1.00.a"
5 include: [gpio-controller.yaml, base.yaml]
7 bus: xlnx,xps-gpio-1.00.a
10 # https://github.com/Xilinx/device-tree-xlnx
16 xlnx,all-inputs:
19 1 if all GPIOs are inputs, 0 otherwise
21 xlnx,all-outputs:
24 1 if all GPIOs are outputs, 0 otherwise
26 xlnx,dout-default:
29 Default output value. If n-th bit is 1, GPIO-n default value is 1.
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| /Zephyr-latest/boards/digilent/arty_a7/dts/ |
| D | arty_a7_arm_designstart.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/gpio/gpio.h>
9 #include <zephyr/dt-bindings/input/input-event-codes.h>
14 zephyr,shell-uart = &uartlite0;
32 compatible = "gpio-leds";
34 gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
94 gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
104 compatible = "gpio-keys";
116 gpios = <&gpio0_2 2 GPIO_ACTIVE_HIGH>;
136 gpios = <&gpio1_2 2 GPIO_ACTIVE_HIGH>;
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| /Zephyr-latest/doc/connectivity/bluetooth/api/mesh/ |
| D | blob_cli.rst | 18 .. code-block:: C
37 Inputs structure must at least be initialized with a list of targets, an application key and a time
40 .. code-block:: c
47 static struct bt_mesh_blob_cli_inputs inputs = {
52 sys_slist_init(&inputs.targets);
53 sys_slist_append(&inputs.targets, &targets[0].n);
54 sys_slist_append(&inputs.targets, &targets[1].n);
55 sys_slist_append(&inputs.targets, &targets[2].n);
57 Note that all BLOB Transfer Servers in the transfer must be bound to the chosen application key.
61 -------------
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| /Zephyr-latest/tests/bsim/bluetooth/mesh/src/ |
| D | test_blob.c | 4 * SPDX-License-Identifier: Apache-2.0
39 .option = "use-pull-mode", in test_args_parse()
46 .option = "msg-fail-type", in test_args_parse()
52 .name = "{inactive, start, wait-block, wait-chunk, complete, suspended}", in test_args_parse()
53 .option = "expected-phase", in test_args_parse()
79 partial_block += chunk->size; in blob_chunk_wr()
80 ASSERT_TRUE_MSG(partial_block <= block->size, "Received block is too large\n"); in blob_chunk_wr()
83 if (partial_block == block->size) { in blob_chunk_wr()
85 ASSERT_FALSE_MSG(atomic_test_and_set_bit(block_bitfield, block->number), in blob_chunk_wr()
105 memset(chunk->data, 0, chunk->size); in blob_chunk_rd()
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| D | test_dfu.c | 4 * SPDX-License-Identifier: Apache-2.0
74 .option = "fail-confirm", in test_args_parse()
80 .name = "{none, start, verify, verify-ok, verify-fail, apply}", in test_args_parse()
81 .option = "expected-phase", in test_args_parse()
109 memset(chunk->data, 0, chunk->size); in dummy_blob_chunk_rd()
182 return dfu_metadata_fail ? 0 : -1; in target_metadata_check()
197 return -EALREADY; in target_dfu_start()
314 BT_MESH_ELEM(2,
318 .elem_count = 2,
498 .ttl = 2, in dist_dfu_start_and_confirm()
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| /Zephyr-latest/dts/bindings/clock/ |
| D | atmel,sam-pmc.yaml | 2 # SPDX-License-Identifier: Apache-2.0
8 controlling all system and user peripheral clocks. The PMC enables/disables
9 the clock inputs to many of the peripherals and the processor.
16 clocks = <&pmc PMC_TYPE_PERIPHERAL p-id>;
20 In this example the clock-type was defined as PMC_TYPE_PERIPHERAL and the
21 peripheral-id was defined as p-id. The p-id number should be consulted on
27 The clock-type constants are:
34 compatible: "atmel,sam-pmc"
36 include: [clock-controller.yaml, base.yaml]
42 "#clock-cells":
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| /Zephyr-latest/dts/bindings/regulator/ |
| D | nxp,pca9420.yaml | 2 # SPDX-License-Identifier: Apache-2.0
7 The PMIC has two buck converters and two LDOs. All need to be defined as
15 /* all properties for BUCK1 */
18 /* all properties for BUCK2 */
21 /* all properties for LDO1 */
24 /* all properties for LDO2 */
34 nxp,enable-modesel-pins:
38 the MODESEL0/1 inputs.
40 nxp,vin-ilim-microamp:
44 - 85000
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| /Zephyr-latest/dts/bindings/interrupt-controller/ |
| D | nxp,s32-siul2-eirq.yaml | 1 # Copyright 2022-2024 NXP
3 # SPDX-License-Identifier: Apache-2.0
7 compatible: "nxp,s32-siul2-eirq"
9 include: [interrupt-controller.yaml, pinctrl-device.yaml, base.yaml]
15 pinctrl-0:
18 pinctrl-names:
21 filter-prescaler:
23 enum: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
33 child-binding:
37 controller, labeled `irq_<interrupt-number>`. For example:
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| /Zephyr-latest/subsys/bluetooth/mesh/shell/ |
| D | blob.c | 4 * SPDX-License-Identifier: Apache-2.0
42 for (i = 0; i < chunk->size; ++i) { in blob_chunk_wr()
43 blob_rx_sum += chunk->data[i]; in blob_chunk_wr()
44 if (chunk->data[i] != in blob_chunk_wr()
45 blob_data[(i + chunk->offset) % sizeof(blob_data)]) { in blob_chunk_wr()
58 for (int i = 0; i < chunk->size; ++i) { in blob_chunk_rd()
59 chunk->data[i] = in blob_chunk_rd()
60 blob_data[(i + chunk->offset) % sizeof(blob_data)]; in blob_chunk_rd()
77 struct bt_mesh_blob_cli_inputs inputs; member
89 target->addr, reason); in blob_cli_lost_target()
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| D | dfd.c | 4 * SPDX-License-Identifier: Apache-2.0
22 shell_print(sh, "{\"status\": %d, \"target_cnt\": %d}", status, srv->target_cnt); in print_receivers_status()
29 srv->phase); in print_dfd_status()
31 if (srv->phase != BT_MESH_DFD_PHASE_IDLE && srv->dfu.xfer.slot) { in print_dfd_status()
34 "\"apply\": %d, \"slot_idx\": %d", srv->inputs.group, in print_dfd_status()
35 srv->inputs.app_idx, srv->inputs.ttl, srv->inputs.timeout_base, in print_dfd_status()
36 srv->dfu.xfer.blob.mode, srv->apply, srv->slot_idx); in print_dfd_status()
62 *total += slot->size; in slot_space_cb()
70 return -ENODEV; in cmd_dfd_receivers_add()
73 struct bt_mesh_dfd_srv *dfd_srv = mod->rt->user_data; in cmd_dfd_receivers_add()
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| D | dfu.c | 4 * SPDX-License-Identifier: Apache-2.0
45 shell_print(bt_mesh_shell_ctx_shell, "DFU target lost: 0x%04x", target->blob.addr); in dfu_cli_lost_target()
115 return -EINVAL; in dfu_apply()
146 fwid->ver = img_header.h.v1.sem_ver; in bt_mesh_shell_dfu_cmds_init()
173 return -EINVAL; in cmd_dfu_comp_add()
179 return -EMSGSIZE; in cmd_dfu_comp_add()
205 return -EINVAL; in cmd_dfu_comp_elem_add()
210 sig_model_count = shell_strtoul(argv[2], 0, &err); in cmd_dfu_comp_elem_add()
213 if (argc < 4 + sig_model_count + vnd_model_count * 2) { in cmd_dfu_comp_elem_add()
214 return -EINVAL; in cmd_dfu_comp_elem_add()
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| /Zephyr-latest/dts/bindings/sensor/ |
| D | ti,ina226.yaml | 2 # SPDX-License-Identifier: Apache-2.0
6 The <zephyr/dt-bindings/sensor/ina226.h> file should be included in the
12 include: [sensor-device.yaml, i2c-device.yaml]
15 avg-count:
18 Number of samples to average (applies to all inputs).
19 Default is the power-on reset value.
23 vbus-conversion-time-us:
27 Default is the power-on reset value.
31 vshunt-conversion-time-us:
35 Default is the power-on reset value.
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| D | ti,tmag5273.yaml | 2 # SPDX-License-Identifier: Apache-2.0
5 Texas Instruments Low-Power Linear 3D Hall-Effect Sensor with an I2C interface.
17 #include <zephyr/dt-bindings/sensor/tmag5273.h>
27 include: [sensor-device.yaml, i2c-device.yaml]
30 operation-mode:
38 - 0 # TMAG5273_DT_OPER_MODE_CONTINUOUS (continuous)
39 - 1 # TMAG5273_DT_OPER_MODE_STANDBY (standby)
44 enum: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11]
46 Magnet axis channel inputs.
47 Defaults to measure all axis (TMAG5273_DT_AXIS_XYZ).
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| /Zephyr-latest/drivers/interrupt_controller/ |
| D | Kconfig.multilevel | 5 # SPDX-License-Identifier: Apache-2.0
8 bool "Multi-level interrupt support"
14 all interrupts routed to it into one IRQ line in the first level
35 The maximum number of interrupt inputs to any aggregator in the
38 config 2ND_LEVEL_INTERRUPTS
39 bool "Second-level interrupt support"
44 config 2ND_LVL_ISR_TBL_OFFSET
45 int "Offset in _sw_isr_table for level 2 interrupts"
47 depends on 2ND_LEVEL_INTERRUPTS
50 where storage for 2nd level interrupt ISRs begins. This is
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| D | intc_dw_ace.c | 4 * SPDX-License-Identifier: Apache-2.0
21 /* ACE device interrupts are all packed into a single line on Xtensa's
25 * (i.e. interrupts 0-31 are Xtensa IRQs, 32 represents DW input 0,
29 * interrupt level of 2. The CPU has a level 1 external interrupt on
31 * that this level 2 ISR is also shared with the CCOUNT timer on IRQ3.
34 * But, because there can never be a situation where all interrupts on
38 * always has the line active, and we do all masking of external
49 * + Drivers manage ACE_DINT themselves, as there are device-specific
51 * core-asymmetric interrupt routing needs to happen, it happens
54 * + The DW layer is en/disabled uniformly across all cores. This is
[all …]
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| /Zephyr-latest/subsys/bluetooth/mesh/ |
| D | blob_cli.c | 4 * SPDX-License-Identifier: Apache-2.0
19 SYS_SLIST_FOR_EACH_CONTAINER((sys_slist_t *)&(cli)->inputs->targets, \
22 /* The Maximum BLOB Poll Interval - T_MBPI */
25 #define CLIENT_TIMEOUT_MSEC(cli) (10 * MSEC_PER_SEC * (cli->inputs->timeout_base + 2) + \
26 100 * cli->inputs->ttl)
27 #define BLOCK_REPORT_TIME_MSEC ((BLOB_POLL_TIME_MAX_SECS * 2 + 7) * 1000)
30 #define SENDING_CHUNKS_IN_PULL_MODE(cli) ((cli)->state == BT_MESH_BLOB_CLI_STATE_BLOCK_SEND && \
31 (cli)->xfer->mode == BT_MESH_BLOB_XFER_MODE_PULL)
32 #define UNICAST_MODE(cli) ((cli)->inputs->group == BT_MESH_ADDR_UNASSIGNED || \
33 (cli)->tx.ctx.force_unicast)
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| D | dfu_cli.c | 4 * SPDX-License-Identifier: Apache-2.0
22 (sys_slist_t *)&((cli)->blob.inputs)->targets, target, blob.n)
26 .app_idx = (cli)->blob.inputs->app_idx, .addr = dst, \
27 .send_ttl = (cli)->blob.inputs->ttl, \
52 FLAG_SKIP_CAPS_GET = BIT(2),
77 if (addr == target->blob.addr) { in target_get()
89 target->status = status; in target_failed()
91 LOG_ERR("Target 0x%04x failed: %u", target->blob.addr, status); in target_failed()
96 if (target->blob.status == BT_MESH_BLOB_SUCCESS) { in target_failed()
97 target->blob.status = BT_MESH_BLOB_ERR_INTERNAL; in target_failed()
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| /Zephyr-latest/soc/mediatek/mt8xxx/ |
| D | soc.c | 2 * SPDX-License-Identifier: Apache-2.0
6 #include <zephyr/sys/libc-hooks.h>
37 * There are 64 interrupt inputs to the controller, controlled by
41 * can be configured to handle any subset of interrupt inputs.
50 * 0-5 0-5 1 (L1 is shared w/exceptions, poor choice)
51 * 6-7 7-8 1
52 * 8-10 9-11 2
53 * 11-13 16-18 3
56 * Naming of the inputs looks like this, though obviously only a small
61 * 2: SPM 22: CCIF3_C0 42: CONNSYS3
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| /Zephyr-latest/drivers/input/ |
| D | input_npcx_kbd.c | 5 * SPDX-License-Identifier: Apache-2.0
34 /* Keyboard scan input (KSI) wake-up irq */
36 /* Size of keyboard inputs-wui mapping array */
38 /* Mapping table between keyboard inputs and wui */
59 const struct npcx_kbd_config *const config = dev->config; in npcx_kbd_set_detect_mode()
60 const struct input_kbd_matrix_common_config *common = &config->common; in npcx_kbd_set_detect_mode()
63 for (int i = 0; i < common->row_size; i++) { in npcx_kbd_set_detect_mode()
64 npcx_miwu_irq_get_and_clear_pending(&config->wui_maps[i]); in npcx_kbd_set_detect_mode()
67 irq_enable(config->irq); in npcx_kbd_set_detect_mode()
69 irq_disable(config->irq); in npcx_kbd_set_detect_mode()
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| /Zephyr-latest/drivers/gpio/ |
| D | gpio_sifive.c | 2 * Copyright (c) 2017 Jean-Paul Etienne <fractalclone@gmail.com>
4 * SPDX-License-Identifier: Apache-2.0
26 /* sifive GPIO register-set structure */
51 /* multi-level encoded interrupt corresponding to pin 0 */
65 ((const struct gpio_sifive_config * const)(dev)->config)
67 ((volatile struct gpio_sifive_t *)(DEV_GPIO_CFG(dev))->gpio_base_addr)
69 ((struct gpio_sifive_data *)(dev)->data)
80 } else if (level == 2) { in gpio_sifive_pin_irq()
94 if (level == 2) { in gpio_sifive_plic_to_pin()
98 return (plic_irq - base_irq); in gpio_sifive_plic_to_pin()
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| D | gpio_mchp_mec5.c | 4 * SPDX-License-Identifier: Apache-2.0
13 #include <zephyr/dt-bindings/gpio/gpio.h>
14 #include <zephyr/dt-bindings/pinctrl/mchp-xec-pinctrl.h>
21 /* 32 pins per bank. Each pin has a 4-byte control register */
46 /* NOTE: gpio_flags_t b[0:15] are defined in the dt-binding gpio header.
52 return -ENOTSUP; in gpio_mec5_validate_flags()
56 return -EINVAL; in gpio_mec5_validate_flags()
68 /* Each GPIO pin has two 32-bit control registers. Control 1 configures pin
69 * features except for drive strength and slew rate in Control 2.
76 * we use Control 1 to configure all pin features and output state. Before exiting,
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| D | gpio_mchp_xec_v2.c | 4 * SPDX-License-Identifier: Apache-2.0
13 #include <zephyr/dt-bindings/gpio/gpio.h>
15 #include <zephyr/dt-bindings/pinctrl/mchp-xec-pinctrl.h>
52 /* Each GPIO pin 32-bit control register located consecutively in memory */
55 const struct gpio_xec_config *config = dev->config; in pin_ctrl_addr()
57 return config->pcr1_base + ((uintptr_t)pin * 4u); in pin_ctrl_addr()
60 /* GPIO Parallel input is a single 32-bit register per bank of 32 pins */
63 const struct gpio_xec_config *config = dev->config; in pin_parin_addr()
65 return config->parin_addr; in pin_parin_addr()
68 /* GPIO Parallel output is a single 32-bit register per bank of 32 pins */
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| /Zephyr-latest/doc/services/input/ |
| D | gpio-kbd.rst | 1 .. _gpio-kbd:
6 The :dtcompatible:`gpio-kbd-matrix` driver supports a large variety of keyboard
11 The conventional configuration for all of these is that the driver reads on the
12 row GPIOs (inputs) and selects on the columns GPIOs (output).
21 .. figure:: no-diodes.svg
27 The system must support GPIO interrupts, and the interrupt can be enabled on all
30 .. code-block:: devicetree
32 kbd-matrix {
33 compatible = "gpio-kbd-matrix";
34 row-gpios = <&gpio0 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>,
[all …]
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| /Zephyr-latest/boards/snps/em_starterkit/ |
| D | pmodmux.c | 4 * SPDX-License-Identifier: Apache-2.0
12 * 32-bits, offset 0x0, This register controls mapping of the peripheral device
16 /* 32-bits, offset 0x4 */
20 * 32-bits, offset 0x8, SPI_MAP_CTRL[0] selects the mode of operation of the SPI
22 * at connector J1. Loop-back mode, SPI_MAP_CTRL[0]=1: SPI Slave is connected to
25 #define SPI_MAP_CTRL 2
27 * 32-bits, offset 0x8, This register controls the mapping of the UART signals
34 #define BIT2 (2)
58 /* all pins are configured as GPIO inputs */
88 * Pmod3[2:1] are connected to DW GPIO Port D[1:0],
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| /Zephyr-latest/drivers/adc/ |
| D | adc_sam.c | 4 * SPDX-License-Identifier: Apache-2.0
46 * so all the channels would get repeated.
69 const struct adc_sam_config *const cfg = dev->config; in adc_sam_channel_setup()
70 Adc *const adc = cfg->regs; in adc_sam_channel_setup()
72 uint8_t channel_id = channel_cfg->channel_id; in adc_sam_channel_setup()
74 if (channel_cfg->differential) { in adc_sam_channel_setup()
75 if (channel_id != (channel_cfg->input_positive / 2U) in adc_sam_channel_setup()
76 || channel_id != (channel_cfg->input_negative / 2U)) { in adc_sam_channel_setup()
78 return -EINVAL; in adc_sam_channel_setup()
81 if (channel_id != channel_cfg->input_positive) { in adc_sam_channel_setup()
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