/Zephyr-latest/dts/xtensa/intel/ |
D | intel_adsp_cavs.dtsi | 18 dma-buf-size-alignment = <4>; 19 dma-copy-alignment = <4>; 31 dma-buf-size-alignment = <4>; 32 dma-copy-alignment = <4>; 42 dma-buf-addr-alignment = <128>; 43 dma-buf-size-alignment = <32>; 44 dma-copy-alignment = <32>; 54 dma-buf-addr-alignment = <128>; 55 dma-buf-size-alignment = <32>; 56 dma-copy-alignment = <32>; [all …]
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/Zephyr-latest/boards/nordic/nrf54h20dk/ |
D | nrf54h20dk_nrf54h20-ipc_conf.dtsi | 12 dcache-alignment = <32>; 20 dcache-alignment = <32>; 27 dcache-alignment = <32>; 36 dcache-alignment = <32>; 44 dcache-alignment = <32>; 52 dcache-alignment = <32>; 60 dcache-alignment = <32>;
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/Zephyr-latest/boards/nordic/nrf9280pdk/ |
D | nrf9280pdk_nrf9280-ipc_conf.dtsi | 12 dcache-alignment = <32>; 20 dcache-alignment = <32>; 27 dcache-alignment = <32>; 36 dcache-alignment = <32>; 44 dcache-alignment = <32>; 52 dcache-alignment = <32>;
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/Zephyr-latest/scripts/build/ |
D | gen_iter_sections.py | 19 def gen_ld(filepath: str, items: list, alignment: int): 22 fp.write(f"ITERABLE_SECTION_ROM({item}, {alignment})\n") 25 def gen_cmake(filepath: str, items: list, alignment: int): 31 + f'SUBALIGN\\;{alignment}\\;' 53 parser.add_argument("-a", "--alignment", required=True, help="Iterable section alignment") 68 gen_ld(args.ld_output, items, args.alignment) 69 gen_cmake(args.cmake_output, items, args.alignment)
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/Zephyr-latest/dts/bindings/dma/ |
D | dma-controller.yaml | 31 dma-buf-addr-alignment: 33 description: Memory address alignment requirement for DMA buffers used by the controller. 35 dma-buf-size-alignment: 37 description: Memory size alignment requirement for DMA buffers used by the controller. 39 dma-copy-alignment:
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D | intel,adsp-hda.yaml | 18 "dma-buf-addr-alignment": 21 "dma-buf-size-alignment": 24 "dma-copy-alignment":
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D | intel,adsp-gpdma.yaml | 15 dma-buf-size-alignment: 18 dma-copy-alignment:
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/Zephyr-latest/arch/arm/core/mpu/ |
D | Kconfig | 24 alignment of MPU region base address and size. 27 to have power-of-two alignment for base address and region size. 56 Minimum size (and alignment) of an ARM MPU region. Use this 57 symbol to guarantee minimum size and alignment of MPU regions. 58 A minimum 4-byte alignment is enforced in ARM builds without 74 Minimum size (and alignment when applicable) of an ARM MPU 99 for respect alignment. But that needs carefully configure MPU region 107 it should consume less alignment memory. Although this alignment
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/Zephyr-latest/dts/bindings/mtd/ |
D | nxp,s32-qspi-device.yaml | 17 memory-alignment: 20 Memory alignment in bytes, used to calculate padding when performing 22 If not provided, 1 byte alignment will be selected.
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D | soc-nv-flash.yaml | 10 description: address alignment required by flash erase operations 14 description: address alignment required by flash write operations
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/Zephyr-latest/subsys/fs/ext2/ |
D | Kconfig | 48 int "Ext2 superblock alignment" 51 Some SD host controllers require alignment of their data buffers 53 this value if they require alignment. This represents the alignment
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/Zephyr-latest/subsys/ipc/ipc_service/lib/ |
D | Kconfig | 15 int "VRINGs alignment" 19 Static VRINGs alignment. This should take into account the cache line 20 alignment if the cache is enabled.
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/Zephyr-latest/lib/net_buf/ |
D | Kconfig | 53 int "Network buffer alignment restriction" 56 Alignment restriction for network buffers. This is useful for 59 Default value of 0 means the alignment will be the size of a void pointer, 60 any other value will force the alignment of a net buffer in bytes.
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/Zephyr-latest/drivers/dma/ |
D | Kconfig.nxp_sof_host_dma | 21 int "Alignment (in bytes) required for memory regions passed to this driver" 24 Use this to set the alignment (in bytes) 30 no alignment restrictions imposed by memcpy.
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/Zephyr-latest/doc/kernel/usermode/ |
D | mpu_stack_objects.rst | 15 implications for placement are directly attributed to the alignment 37 memory. These constraints include determining the alignment of the stack and 43 can include alignment of beginning and end addresses, sizes of allocations, 54 start and end addresses require 32 byte alignment. An example of this kind of 61 Size and alignment constraints may result in stack allocations being larger
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/Zephyr-latest/arch/arm64/core/cortex_r/ |
D | Kconfig | 21 The ARMv8-R MPU architecture requires a power-of-two alignment 49 Minimum size (and alignment) of an ARM MPU region. Use this 50 symbol to guarantee minimum size and alignment of MPU regions. 51 A minimum 4-byte alignment is enforced in ARM builds without
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/Zephyr-latest/dts/bindings/ipc/ |
D | zephyr,ipc-icmsg.yaml | 24 dcache-alignment: 27 Data cache alignment. If any side of the communication uses cache on 35 dcache-alignment = <32>; for both
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/Zephyr-latest/include/zephyr/debug/ |
D | gdbstub.h | 40 /** Read/write alignment, 0 if using default alignment */ 41 uint8_t alignment; member 94 * @param[out] align Read alignment of region 107 * @param[out] align Write alignment of region
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/Zephyr-latest/drivers/sdhc/ |
D | Kconfig | 32 Some SD host controllers require alignment of their data buffers 34 this value if they require alignment. This represents the alignment
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/Zephyr-latest/arch/arm/core/cortex_m/ |
D | relay_vector_table.ld | 11 * Therefore, vector_relay_table must respect the alignment requirements 21 * exception entries in the vector table. The minimum alignment of 32 words 23 * For more than 16 HW interrupts, we adjust the alignment by rounding up
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/Zephyr-latest/tests/drivers/display/display_read_write/ |
D | Kconfig | 14 int "Display buffer memory alignment" 17 Specific display buffer alignment.
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/Zephyr-latest/scripts/logging/dictionary/dictionary_parser/ |
D | data_types.py | 58 Return a tuple where the first element is stack alignment 59 value. The second element is true if alignment needs to 112 Get the alignment for a particular data type. 122 # va_list alignment is at least a integer 180 """Get the alignment of a data type""" 185 """Get the stack alignment of a data type"""
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/Zephyr-latest/drivers/mspi/ |
D | Kconfig.ambiq | 24 int "byte alignment of the MSPI buffer" 28 This option specifies the mspi buffer alignment
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/Zephyr-latest/include/zephyr/arch/arm/ |
D | arch.h | 116 * Denotes the required alignment of the stack pointer on public API 127 * @brief Declare the minimum alignment for a thread stack 129 * Denotes the minimum required alignment of a thread stack. 133 * alignment requirement. 144 * @brief Declare a minimum MPU guard alignment and size 146 * This specifies the minimum MPU guard alignment/size for the MPU. This 202 * @brief Declare the MPU guard alignment and size for a thread stack 223 * @brief Define alignment of an MPU guard 225 * Minimum alignment of the start address of an MPU guard, depending on 226 * whether the MPU architecture enforces a size (and power-of-two) alignment
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/Zephyr-latest/include/zephyr/fs/ |
D | littlefs.h | 80 * @param alignment needed alignment for read/prog buffer for specific device 86 #define FS_LITTLEFS_DECLARE_CUSTOM_CONFIG(name, alignment, read_sz, prog_sz, cache_sz, \ argument 88 static uint8_t __aligned(alignment) name ## _read_buffer[cache_sz]; \ 89 static uint8_t __aligned(alignment) name ## _prog_buffer[cache_sz]; \
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