Home
last modified time | relevance | path

Searched full:v (Results 1 – 25 of 1382) sorted by relevance

12345678910>>...56

/Zephyr-latest/doc/connectivity/networking/
Dzephyr_netstack_overview.svg5 …xmlns:v="http://schemas.microsoft.com/visio/2003/SVGExtensions/" width="4.80411in" height="8.5767i…
7 <v:documentProperties v:langID="1033" v:viewMarkup="false">
8 <v:userDefs>
9 <v:ud v:nameU="msvSubprocessMaster" v:prompt="" v:val="VT4(Rectangle)"/>
10 <v:ud v:nameU="msvNoAutoConnect" v:val="VT0(1):26"/>
11 </v:userDefs>
12 </v:documentProperties>
39 <g v:mID="0" v:index="1" v:groupContext="foregroundPage">
40 <v:userDefs>
41 <v:ud v:nameU="msvThemeOrder" v:val="VT0(0):26"/>
[all …]
Dzephyr_netstack_overview-tx_sequence.svg5 …xmlns:v="http://schemas.microsoft.com/visio/2003/SVGExtensions/" width="6.76147in" height="8.31426…
7 <v:documentProperties v:langID="1033" v:viewMarkup="false">
8 <v:userDefs>
9 <v:ud v:nameU="msvSubprocessMaster" v:prompt="" v:val="VT4(Rectangle)"/>
10 <v:ud v:nameU="msvNoAutoConnect" v:val="VT0(1):26"/>
11 </v:userDefs>
12 </v:documentProperties>
66 …<marker id="mrkr4-213" class="st27" v:arrowType="4" v:arrowSize="2" v:setback="3.17" refX="3.17" o…
70 …<marker id="mrkr4-230" class="st29" v:arrowType="4" v:arrowSize="2" v:setback="6.68" refX="6.68" o…
77 …<marker id="mrkr13-266" class="st35" v:arrowType="13" v:arrowSize="0" v:setback="21" refX="-21" or…
[all …]
Dzephyr_netstack_overview-rx_sequence.svg5 …xmlns:v="http://schemas.microsoft.com/visio/2003/SVGExtensions/" width="6.76147in" height="8.31426…
7 <v:documentProperties v:langID="1033" v:viewMarkup="false">
8 <v:userDefs>
9 <v:ud v:nameU="msvSubprocessMaster" v:prompt="" v:val="VT4(Rectangle)"/>
10 <v:ud v:nameU="msvNoAutoConnect" v:val="VT0(1):26"/>
11 </v:userDefs>
12 </v:documentProperties>
72 …<marker id="mrkr4-217" class="st27" v:arrowType="4" v:arrowSize="4" v:setback="3.98" refX="-3.98" …
79 …<marker id="mrkr5-231" class="st29" v:arrowType="5" v:arrowSize="2" v:setback="6.16" refX="-6.16" …
83 …<marker id="mrkr4-237" class="st29" v:arrowType="4" v:arrowSize="2" v:setback="7.04" refX="-7.04" …
[all …]
/Zephyr-latest/boards/native/doc/
Dlayering.svg4 …xmlns:v="http://schemas.microsoft.com/visio/2003/SVGExtensions/" width="6.10236in" height="3.6811i…
6 <v:documentProperties v:langID="1033" v:metric="true" v:viewMarkup="false">
7 <v:userDefs>
8 <v:ud v:nameU="msvSubprocessMaster" v:prompt="" v:val="VT4(Rectangle)"/>
9 <v:ud v:nameU="msvNoAutoConnect" v:val="VT0(1):26"/>
10 </v:userDefs>
11 </v:documentProperties>
27 <g v:mID="14" v:index="6" v:groupContext="foregroundPage">
29 …<v:pageProperties v:drawingScale="0.0393701" v:pageScale="0.0393701" v:drawingUnits="24" v:shadowO…
30 v:shadowOffsetY="-8.50394"/>
[all …]
DPort_vs_QEMU_vs.svg4 …xmlns:v="http://schemas.microsoft.com/visio/2003/SVGExtensions/" width="9.68504in" height="4.25197…
6 <v:documentProperties v:langID="1033" v:metric="true" v:viewMarkup="false">
7 <v:userDefs>
8 <v:ud v:nameU="msvNoAutoConnect" v:val="VT0(1):26"/>
9 </v:userDefs>
10 </v:documentProperties>
40 …<marker id="mrkr13-6" class="st2" v:arrowType="13" v:arrowSize="2" v:setback="13.08" refX="-13.08"…
45 <g v:mID="0" v:index="1" v:groupContext="foregroundPage">
47 …<v:pageProperties v:drawingScale="0.0393701" v:pageScale="0.0393701" v:drawingUnits="24" v:shadowO…
48 v:shadowOffsetY="-8.50394"/>
[all …]
DZephyr_and_bsim.svg4 …xmlns:v="http://schemas.microsoft.com/visio/2003/SVGExtensions/" width="8.38583in" height="4.40945…
6 <v:documentProperties v:langID="1033" v:metric="true" v:viewMarkup="false">
7 <v:userDefs>
8 <v:ud v:nameU="msvSubprocessMaster" v:prompt="" v:val="VT4(Rectangle)"/>
9 <v:ud v:nameU="msvNoAutoConnect" v:val="VT0(1):26"/>
10 </v:userDefs>
11 </v:documentProperties>
34 …<marker id="mrkr4-51" class="st10" v:arrowType="4" v:arrowSize="1" v:setback="2.648" refX="2.648" …
38 …<marker id="mrkr4-53" class="st10" v:arrowType="4" v:arrowSize="1" v:setback="2.72" refX="-2.72" o…
43 <g v:mID="4" v:index="4" v:groupContext="foregroundPage">
[all …]
Dlayering_natsim.svg17 xmlns:v="http://schemas.microsoft.com/visio/2003/SVGExtensions/"><defs
38 <v:documentProperties
39 v:langID="1033"
40 v:metric="true"
41 v:viewMarkup="false">
42 <v:userDefs>
43 <v:ud
44 v:nameU="msvSubprocessMaster"
45 v:prompt=""
46 v:val="VT4(Rectangle)" />
[all …]
/Zephyr-latest/soc/nxp/s32/s32k3/
Dpmc.c15 #define PMC_LVSC_HVDAF(v) FIELD_PREP(PMC_LVSC_HVDAF_MASK, (v)) argument
17 #define PMC_LVSC_HVDBF(v) FIELD_PREP(PMC_LVSC_HVDBF_MASK, (v)) argument
19 #define PMC_LVSC_HVD25F(v) FIELD_PREP(PMC_LVSC_HVD25F_MASK, (v)) argument
21 #define PMC_LVSC_HVD11F(v) FIELD_PREP(PMC_LVSC_HVD11F_MASK, (v)) argument
23 #define PMC_LVSC_LVD5AF(v) FIELD_PREP(PMC_LVSC_LVD5AF_MASK, (v)) argument
25 #define PMC_LVSC_LVD15F(v) FIELD_PREP(PMC_LVSC_LVD15F_MASK, (v)) argument
27 #define PMC_LVSC_HVDAS(v) FIELD_PREP(PMC_LVSC_HVDAS_MASK, (v)) argument
29 #define PMC_LVSC_HVDBS(v) FIELD_PREP(PMC_LVSC_HVDBS_MASK, (v)) argument
31 #define PMC_LVSC_HVD25S(v) FIELD_PREP(PMC_LVSC_HVD25S_MASK, (v)) argument
33 #define PMC_LVSC_HVD11S(v) FIELD_PREP(PMC_LVSC_HVD11S_MASK, (v)) argument
[all …]
Dpinctrl_soc.h17 #define SIUL2_MSCR_SSS(v) FIELD_PREP(SIUL2_MSCR_SSS_MASK, (v)) argument
19 #define SIUL2_MSCR_SMC(v) FIELD_PREP(SIUL2_MSCR_SMC_MASK, (v)) argument
21 #define SIUL2_MSCR_IFE(v) FIELD_PREP(SIUL2_MSCR_IFE_MASK, (v)) argument
23 #define SIUL2_MSCR_DSE(v) FIELD_PREP(SIUL2_MSCR_DSE_MASK, (v)) argument
25 #define SIUL2_MSCR_PUS(v) FIELD_PREP(SIUL2_MSCR_PUS_MASK, (v)) argument
27 #define SIUL2_MSCR_PUE(v) FIELD_PREP(SIUL2_MSCR_PUE_MASK, (v)) argument
29 #define SIUL2_MSCR_SRC(v) FIELD_PREP(SIUL2_MSCR_SRC_MASK, (v)) argument
31 #define SIUL2_MSCR_PKE(v) FIELD_PREP(SIUL2_MSCR_PKE_MASK, (v)) argument
33 #define SIUL2_MSCR_INV(v) FIELD_PREP(SIUL2_MSCR_INV_MASK, (v)) argument
35 #define SIUL2_MSCR_IBE(v) FIELD_PREP(SIUL2_MSCR_IBE_MASK, (v)) argument
[all …]
/Zephyr-latest/drivers/clock_control/
Dclock_stm32_ll_common.h18 #define z_pllm(v) LL_RCC_PLLM_DIV_ ## v argument
19 #define pllm(v) z_pllm(v) argument
21 #define z_pllp(v) LL_RCC_PLLP_DIV_ ## v argument
22 #define pllp(v) z_pllp(v) argument
24 #define z_pllq(v) LL_RCC_PLLQ_DIV_ ## v argument
25 #define pllq(v) z_pllq(v) argument
27 #define z_pllr(v) LL_RCC_PLLR_DIV_ ## v argument
28 #define pllr(v) z_pllr(v) argument
32 #define z_plli2s_m(v) LL_RCC_PLLI2SM_DIV_ ## v argument
35 #define z_plli2s_m(v) LL_RCC_PLLM_DIV_ ## v argument
[all …]
/Zephyr-latest/scripts/coccinelle/
Dunsigned_suffix.cocci13 … unsigned short, unsigned int, uint8_t, uint16_t, uint32_t, uint64_t, u8_t, u16_t, u32_t, u64_t} v;
19 v = C@p
21 v == C@p
23 v != C@p
25 v <= C@p
27 v >= C@p
29 v += C@p
31 v -= C@p
33 v * C@p
35 v / C@p
[all …]
Dreserved_names.cocci16 identifier t, v;
21 struct t *v@p;
23 struct t v@p;
25 union t v@p;
27 T v@p;
29 T *v@p;
31 struct t *v@p = E;
33 struct t v@p = E;
35 union t v@p = E;
37 T v@p = E;
[all …]
Dsame_identifier.cocci16 identifier t, v;
19 struct t *v@p;
21 struct t v@p;
23 union t v@p;
28 v << common_case.v;
32 msg = "WARNING: Violation to rule 5.7 (Tag name should be unique) tag: {}".format(v)
33 if t == v:
38 identifier v;
42 T v@p;
44 T *v@p;
[all …]
Dboolean.cocci16 identifier function, v;
22 T1 function(P1, T2 v, P2) {...}
24 T1 function(P1, T2 *v, P2) {...}
29 v << rule1_base.v;
36 identifier rule1_base.v;
40 while (v@p) {...}
42 if (v@p) {...}
53 identifier v;
56 T v;
61 v << rule2_base.v;
[all …]
/Zephyr-latest/soc/nxp/s32/s32ze/
Dpinctrl_soc.h17 #define SIUL2_MSCR_SSS(v) FIELD_PREP(SIUL2_MSCR_SSS_MASK, (v)) argument
19 #define SIUL2_MSCR_SMC(v) FIELD_PREP(SIUL2_MSCR_SMC_MASK, (v)) argument
21 #define SIUL2_MSCR_TRC(v) FIELD_PREP(SIUL2_MSCR_TRC_MASK, (v)) argument
23 #define SIUL2_MSCR_RCVR(v) FIELD_PREP(SIUL2_MSCR_RCVR_MASK, (v)) argument
25 #define SIUL2_MSCR_CREF(v) FIELD_PREP(SIUL2_MSCR_CREF_MASK, (v)) argument
27 #define SIUL2_MSCR_PUS(v) FIELD_PREP(SIUL2_MSCR_PUS_MASK, (v)) argument
29 #define SIUL2_MSCR_PUE(v) FIELD_PREP(SIUL2_MSCR_PUE_MASK, (v)) argument
31 #define SIUL2_MSCR_SRE(v) FIELD_PREP(SIUL2_MSCR_SRE_MASK, (v)) argument
33 #define SIUL2_MSCR_RXCB(v) FIELD_PREP(SIUL2_MSCR_RXCB_MASK, (v)) argument
35 #define SIUL2_MSCR_IBE(v) FIELD_PREP(SIUL2_MSCR_IBE_MASK, (v)) argument
[all …]
/Zephyr-latest/include/zephyr/arch/arc/asm-compat/
Dasm-macro-32-bit-mwdt.h47 .macro ADDR, d, s, v
48 add\&$suffix d, s, v
51 .macro ADD2R, d, s, v
52 add2\&$suffix d, s, v
55 .macro ADD3R, d, s, v
56 add3 d, s, v
59 .macro SUBR, d, s, v
60 sub d, s, v
63 .macro BMSKNR, d, s, v
64 bmskn d, s, v
[all …]
Dasm-macro-64-bit-mwdt.h47 .macro ADDR, d, s, v
48 addl\&$suffix d, s, v
51 .macro ADD2R, d, s, v
52 add2l\&$suffix d, s, v
55 .macro ADD3R, d, s, v
56 add3l d, s, v
59 .macro SUBR, d, s, v
60 subl d, s, v
63 .macro BMSKNR, d, s, v
64 bmsknl d, s, v
[all …]
Dasm-macro-32-bit-gnu.h50 .macro ADDR\cc d, s, v
51 add\cc \d, \s, \v
56 .macro ADD2R\cc d, s, v
57 add2\cc \d, \s, \v
61 .macro ADD3R d, s, v
62 add3 \d, \s, \v
65 .macro SUBR d, s, v
66 sub \d, \s, \v
69 .macro BMSKNR d, s, v
70 bmskn \d, \s, \v
[all …]
Dasm-macro-64-bit-gnu.h62 .macro ADDR\cc d, s, v
63 addl\cc \d, \s, \v
68 .macro ADD2R\cc d, s, v
69 add2l\cc \d, \s, \v
73 .macro ADD3R d, s, v
74 add3l \d, \s, \v
77 .macro SUBR d, s, v
78 subl \d, \s, \v
81 .macro BMSKNR d, s, v
82 bmsknl \d, \s, \v
[all …]
/Zephyr-latest/dts/bindings/pinctrl/
Dnxp,imx8m-pinctrl.yaml88 001 255_OHM — 255 Ohm @3.3V, 240 Ohm @2.5V, 230 Ohm @1.8V, 265 Ohm @1.2V
89 010 105_OHM — 105 Ohm @3.3V, 100 Ohm @2.5V, 85 Ohm @1.8V, 110 Ohm @1.2V
90 011 75_OHM — 75 Ohm @3.3V, 70 Ohm @2.5V, 60 Ohm @1.8V, 80 Ohm @1.2V
91 100 85_OHM — 85 Ohm @3.3V, 80 Ohm @2.5V, 75 Ohm @1.8V, 90 Ohm @1.2V
92 101 65_OHM — 65 Ohm @3.3V, 60 Ohm @2.5V, 55 Ohm @1.8V, 65 Ohm @1.2V
93 110 45_OHM — 45 Ohm @3.3V, 45 Ohm @2.5V, 40 Ohm @1.8V, 50 Ohm @1.2V
94 111 40_OHM — 40 Ohm @3.3V, 40 Ohm @2.5V, 33 Ohm @1.8V, 40 Ohm @1.2V
/Zephyr-latest/samples/subsys/sip_svc/
DREADME.rst39 Got response of transaction id 0x00 and voltage is 0.846878v
40 Got response of transaction id 0x01 and voltage is 0.858170v
41 Got response of transaction id 0x02 and voltage is 0.860168v
42 Got response of transaction id 0x03 and voltage is 0.846832v
43 Got response of transaction id 0x04 and voltage is 0.858337v
44 Got response of transaction id 0x05 and voltage is 0.871704v
45 Got response of transaction id 0x06 and voltage is 0.859421v
46 Got response of transaction id 0x07 and voltage is 0.857254v
47 Got response of transaction id 0x08 and voltage is 0.858429v
48 Got response of transaction id 0x09 and voltage is 0.859879v
[all …]
/Zephyr-latest/drivers/sensor/tdk/icm42605/
Dicm42605_setup.c151 uint8_t v; in icm42605_sensor_init() local
153 result = inv_spi_read(&cfg->spi, REG_WHO_AM_I, &v, 1); in icm42605_sensor_init()
159 LOG_DBG("WHO AM I : 0x%X", v); in icm42605_sensor_init()
161 result = inv_spi_read(&cfg->spi, REG_DEVICE_CONFIG, &v, 1); in icm42605_sensor_init()
168 v |= BIT_SOFT_RESET; in icm42605_sensor_init()
170 result = inv_spi_single_write(&cfg->spi, REG_DEVICE_CONFIG, &v); in icm42605_sensor_init()
180 v = BIT_GYRO_AFSR_MODE_HFS | BIT_ACCEL_AFSR_MODE_HFS | BIT_CLK_SEL_PLL; in icm42605_sensor_init()
182 result = inv_spi_single_write(&cfg->spi, REG_INTF_CONFIG1, &v); in icm42605_sensor_init()
189 v = BIT_EN_DREG_FIFO_D2A | in icm42605_sensor_init()
193 result = inv_spi_single_write(&cfg->spi, REG_TMST_CONFIG, &v); in icm42605_sensor_init()
[all …]
/Zephyr-latest/soc/nxp/s32/common/
Dmc_me.c17 #define MC_ME_CTL_KEY_KEY(v) FIELD_PREP(MC_ME_CTL_KEY_KEY_MASK, (v)) argument
21 #define MC_ME_MODE_CONF_DEST_RST(v) FIELD_PREP(MC_ME_MODE_CONF_DEST_RST_MASK, (v)) argument
23 #define MC_ME_MODE_CONF_FUNC_RST(v) FIELD_PREP(MC_ME_MODE_CONF_FUNC_RST_MASK, (v)) argument
25 #define MC_ME_MODE_CONF_STANDBY(v) FIELD_PREP(MC_ME_MODE_CONF_STANDBY_MASK, (v)) argument
29 #define MC_ME_MODE_UPD_MODE_UPD(v) FIELD_PREP(MC_ME_MODE_UPD_MODE_UPD_MASK, (v)) argument
33 #define MC_ME_MODE_STAT_PREV_MODE(v) FIELD_PREP(MC_ME_MODE_STAT_PREV_MODE_MASK, (v)) argument
37 #define MC_ME_MAIN_COREID_CIDX(v) FIELD_PREP(MC_ME_MAIN_COREID_CIDX_MASK, (v)) argument
39 #define MC_ME_MAIN_COREID_PIDX(v) FIELD_PREP(MC_ME_MAIN_COREID_PIDX_MASK, (v)) argument
43 #define MC_ME_PRTN_PCONF_PCE(v) FIELD_PREP(MC_ME_PRTN_PCONF_PCE_MASK, (v)) argument
47 #define MC_ME_PRTN_PUPD_PCUD(v) FIELD_PREP(MC_ME_PRTN_PUPD_PCUD_MASK, (v)) argument
[all …]
Dmc_rgm.c15 #define MC_RGM_DES_F_POR(v) FIELD_PREP(MC_RGM_DES_F_POR_MASK, (v)) argument
19 #define MC_RGM_FES_F_EXR(v) FIELD_PREP(MC_RGM_FES_F_EXR_MASK, (v)) argument
27 #define MC_RGM_FREC_FREC(v) FIELD_PREP(MC_RGM_FREC_FREC_MASK, (v)) argument
31 #define MC_RGM_FRET_FRET(v) FIELD_PREP(MC_RGM_FRET_FRET_MASK, (v)) argument
35 #define MC_RGM_DRET_DRET(v) FIELD_PREP(MC_RGM_DRET_DRET_MASK, (v)) argument
39 #define MC_RGM_ERCTRL_ERASSERT(v) FIELD_PREP(MC_RGM_ERCTRL_ERASSERT_MASK, (v)) argument
43 #define MC_RGM_RDSS_DES_RES(v) FIELD_PREP(MC_RGM_RDSS_DES_RES_MASK, (v)) argument
45 #define MC_RGM_RDSS_FES_RES(v) FIELD_PREP(MC_RGM_RDSS_FES_RES_MASK, (v)) argument
49 #define MC_RGM_FRENTC_FRET_EN(v) FIELD_PREP(MC_RGM_FRENTC_FRET_EN_MASK, (v)) argument
51 #define MC_RGM_FRENTC_FRET_TIMEOUT(v) FIELD_PREP(MC_RGM_FRENTC_FRET_TIMEOUT_MASK, (v)) argument
[all …]
/Zephyr-latest/drivers/charger/
Dcharger_bq24190.c73 uint8_t v; in bq24190_charger_get_charge_type() local
78 ret = i2c_reg_read_byte_dt(&config->i2c, BQ24190_REG_POC, &v); in bq24190_charger_get_charge_type()
83 v = FIELD_GET(BQ24190_REG_POC_CHG_CONFIG_MASK, v); in bq24190_charger_get_charge_type()
85 if (!v) { in bq24190_charger_get_charge_type()
88 ret = i2c_reg_read_byte_dt(&config->i2c, BQ24190_REG_CCC, &v); in bq24190_charger_get_charge_type()
93 v = FIELD_GET(BQ24190_REG_CCC_FORCE_20PCT_MASK, v); in bq24190_charger_get_charge_type()
95 if (v) { in bq24190_charger_get_charge_type()
108 uint8_t v; in bq24190_charger_get_health() local
111 ret = i2c_reg_read_byte_dt(&config->i2c, BQ24190_REG_F, &v); in bq24190_charger_get_health()
116 if (v & BQ24190_REG_F_NTC_FAULT_MASK) { in bq24190_charger_get_health()
[all …]

12345678910>>...56