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/Zephyr-latest/dts/bindings/arm/
Dnordic,nrf-uicr-v2.yaml4 description: Nordic UICR v2 (User Information Configuration Registers)
6 compatible: "nordic,nrf-uicr-v2"
18 Domain ID of the domain associated with this UICR instance. Must be unique
19 across all UICR instances in the system.
Dnordic,nrf-uicr.yaml1 description: Nordic UICR (User Information Configuration Registers)
3 compatible: "nordic,nrf-uicr"
20 This setting, once applied, can only be unset by erasing the UICR
31 This setting, once applied, can only be unset by erasing the UICR
/Zephyr-latest/modules/hal_nordic/nrf-regtool/
Dnrf-regtoolConfig.cmake9 ${NRF_REGTOOL} ${verbosity} uicr-compile
16 message(STATUS "Generated UICR hex file: ${generated_hex_file}")
43 if(component STREQUAL "GENERATE:UICR")
44 set(generated_hex_file ${PROJECT_BINARY_DIR}/uicr.hex)
48 nrf_regtool_generate_peripheral(UICR ${generated_hex_file})
51 # UICR must be flashed together with the Zephyr binary.
/Zephyr-latest/modules/hal_nordic/
DKconfig.nrf_regtool8 bool "Generate UICR"
10 Generate a UICR hex based on devicetree contents using nrf-regtool.
11 CPU domains that require UICR allocation aren't bootable without it
DCMakeLists.txt12 list(APPEND nrf_regtool_components GENERATE:UICR)
/Zephyr-latest/soc/nordic/
DKconfig87 pins to NFCT mode. Doing this requires UICR erase prior to
96 &uicr {
118 bool "Use UICR"
122 firmware branch state of the APPROTECT mechanism from UICR, so if
123 UICR->APPROTECT is disabled, CTRLAP->APPROTECT will be disabled.
159 bool "Use UICR"
163 firmware branch state of the secure APPROTECT mechanism from UICR,
164 so if UICR->SECUREAPPROTECT is disabled, CTRLAP->SECUREAPPROTECT
/Zephyr-latest/drivers/flash/
DKconfig.nrf83 bool "Access to UICR"
86 Enable operations on UICR. Once enabled UICR are written or read as
87 ordinary flash memory. Erase is possible for whole UICR at once.
/Zephyr-latest/drivers/ieee802154/
DKconfig.nrf542 bool "Support usage of EUI64 value stored in UICR registers"
47 stored in User information configuration registers (UICR).
55 int "UICR base register for the EUI64 value"
60 Base of the two consecutive registers from the UICR customer
/Zephyr-latest/dts/arm/nordic/
Dnrf5340_cpuapp.dtsi49 uicr: uicr@ff8000 { label
50 compatible = "nordic,nrf-uicr";
Dnrf91.dtsi99 uicr: uicr@ff8000 { label
100 compatible = "nordic,nrf-uicr";
Dnrf51822.dtsi33 uicr: uicr@10001000 { label
34 compatible = "nordic,nrf-uicr";
Dnrf52805.dtsi38 uicr: uicr@10001000 { label
39 compatible = "nordic,nrf-uicr";
Dnrf5340_cpunet.dtsi43 uicr: uicr@1ff8000 { label
44 compatible = "nordic,nrf-uicr";
/Zephyr-latest/dts/bindings/flash_controller/
Dnordic,rram-controller.yaml12 and the user information configuration registers (UICR).
/Zephyr-latest/boards/nordic/nrf5340_audio_dk/
Dnrf5340_audio_dk_nrf5340_cpuapp.dts24 &uicr {
/Zephyr-latest/dts/bindings/reserved-memory/
Dnordic,owned-memory.yaml8 will be recorded in the UICR of the compiled domain. Memory ownership and
9 access is then configured for the domain at boot time, based on the UICR.
/Zephyr-latest/boards/particle/argon/
Dparticle_argon.dts39 &uicr {
/Zephyr-latest/boards/particle/xenon/
Dparticle_xenon.dts39 &uicr {
/Zephyr-latest/boards/vngiotlab/nrf52_vbluno52/
Dnrf52_vbluno52.dts52 &uicr {
/Zephyr-latest/boards/particle/boron/
Dparticle_boron.dts43 &uicr {
/Zephyr-latest/boards/aconno/acn52832/
Dacn52832.dts48 &uicr {
/Zephyr-latest/boards/contextualelectronics/abc/
Dcontextualelectronics_abc.dts30 &uicr {
/Zephyr-latest/dts/bindings/mtd/
Dnordic,owned-partitions.yaml15 spanning the contained partitions will be recorded in the UICR. These regions
/Zephyr-latest/boards/sparkfun/nrf52_sparkfun/
Dnrf52_sparkfun.dts53 &uicr {
/Zephyr-latest/boards/we/proteus3ev/
Dwe_proteus3ev_nrf52840.dts66 &uicr {

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