1# Nordic Semiconductor nRFx MCU line 2 3# Copyright (c) 2016-2018 Nordic Semiconductor ASA 4# SPDX-License-Identifier: Apache-2.0 5 6# This file is contains Zephyr build system Kconfig references and is not 7# re-usable outside the Zephyr tree. 8 9config SOC_FAMILY_NORDIC_NRF 10 select SOC_COMPATIBLE_NRF 11 select SOC_RESET_HOOK if ARM 12 select CMSIS_CORE_HAS_SYSTEM_CORE_CLOCK if ARM 13 14if SOC_FAMILY_NORDIC_NRF 15 16rsource "common/Kconfig.peripherals" 17rsource "*/Kconfig" 18 19config NRF_SOC_SECURE_SUPPORTED 20 def_bool !TRUSTED_EXECUTION_NONSECURE || (BUILD_WITH_TFM && TFM_PARTITION_PLATFORM) 21 depends on !SOC_SERIES_NRF54HX 22 depends on !SOC_SERIES_NRF92X 23 help 24 Hidden function to indicate that the soc_secure functions are 25 available. 26 The functions are always available when not in non-secure. 27 For non-secure the functions must redirect to secure services exposed 28 by the secure firmware. 29 30config BUILD_WITH_TFM 31 default y if TRUSTED_EXECUTION_NONSECURE 32 help 33 By default, if we build for a Non-Secure version of the board, 34 enable building with TF-M as the Secure Execution Environment. 35 36if BUILD_WITH_TFM 37 38config TFM_FLASH_MERGED_BINARY 39 default y 40 help 41 By default, if we build with TF-M, instruct build system to 42 flash the combined TF-M (Secure) & Zephyr (Non Secure) image 43 44config TFM_LOG_LEVEL_SILENCE 45 default y if !$(dt_nodelabel_has_prop,uart1,pinctrl-names) 46 help 47 Disable TF-M secure output if the uart1 node has not assigned GPIO 48 pins using pinctrl. 49 50config TFM_NRF_NS_STORAGE 51 bool "TF-M non-secure storage partition" 52 default y 53 54endif # BUILD_WITH_TFM 55 56 57config NRF_MPU_FLASH_REGION_SIZE 58 hex 59 default 0x1000 60 depends on HAS_HW_NRF_MPU 61 help 62 FLASH region size for the NRF_MPU peripheral. 63 64config NRF_BPROT_FLASH_REGION_SIZE 65 hex 66 default $(dt_node_int_prop_hex,$(DT_CHOSEN_ZEPHYR_FLASH),erase-block-size) 67 depends on HAS_HW_NRF_BPROT 68 help 69 FLASH region size for the NRF_BPROT peripheral (nRF52). 70 71config NRF_ACL_FLASH_REGION_SIZE 72 hex 73 default $(dt_node_int_prop_hex,$(DT_CHOSEN_ZEPHYR_FLASH),erase-block-size) 74 depends on HAS_HW_NRF_ACL 75 help 76 FLASH region size for the NRF_ACL peripheral. 77 78config NFCT_PINS_AS_GPIOS 79 bool "[DEPRECATED] NFCT pins as GPIOs" 80 depends on $(dt_has_compat,$(DT_COMPAT_NORDIC_NRF_NFCT)) 81 select DEPRECATED 82 help 83 Two pins are usually reserved for NFC in SoCs that implement the 84 NFCT peripheral. This option switches them to normal GPIO mode. 85 HW enabling happens once in the device lifetime, during the first 86 system startup. Disabling this option will not switch back these 87 pins to NFCT mode. Doing this requires UICR erase prior to 88 flashing device using the image which has this option disabled. 89 90 NFC pins in nRF52 series: P0.09 and P0.10 91 NFC pins in nRF5340: P0.02 and P0.03 92 93 This option is deprecated, please use devicetree to configure NFCT 94 pins as GPIOS like this: 95 96 &uicr { 97 nfct-pins-as-gpios; 98 }; 99 100choice NRF_APPROTECT_HANDLING 101 bool "APPROTECT handling" 102 depends on SOC_SERIES_NRF52X || SOC_SERIES_NRF53X || SOC_NRF54L_CPUAPP_COMMON || \ 103 SOC_SERIES_NRF91X 104 default NRF_APPROTECT_DISABLE if SOC_NRF54L_CPUAPP_COMMON 105 default NRF_APPROTECT_USE_UICR 106 help 107 Specifies how the SystemInit() function should handle the APPROTECT 108 mechanism. 109 110config NRF_APPROTECT_DISABLE 111 bool "Disable" 112 depends on SOC_NRF54L_CPUAPP_COMMON 113 help 114 When this option is selected, the SystemInit() disables 115 the APPROTECT mechanism. 116 117config NRF_APPROTECT_USE_UICR 118 bool "Use UICR" 119 depends on SOC_SERIES_NRF52X || SOC_SERIES_NRF53X || SOC_SERIES_NRF91X 120 help 121 When this option is selected, the SystemInit() function loads the 122 firmware branch state of the APPROTECT mechanism from UICR, so if 123 UICR->APPROTECT is disabled, CTRLAP->APPROTECT will be disabled. 124 125config NRF_APPROTECT_LOCK 126 bool "Lock" 127 help 128 When this option is selected, the SystemInit() function locks 129 the firmware branch of the APPROTECT mechanism, preventing it 130 from being opened. 131 132config NRF_APPROTECT_USER_HANDLING 133 bool "Allow user handling" 134 depends on !SOC_SERIES_NRF52X 135 help 136 When this option is selected, the SystemInit() function does not 137 touch the APPROTECT mechanism, allowing the user code to handle it 138 at later stages, for example, to implement authenticated debug. 139 140endchoice 141 142choice NRF_SECURE_APPROTECT_HANDLING 143 bool "Secure APPROTECT handling" 144 depends on SOC_NRF5340_CPUAPP || SOC_NRF54L_CPUAPP_COMMON || SOC_SERIES_NRF91X 145 default NRF_SECURE_APPROTECT_DISABLE if SOC_NRF54L_CPUAPP_COMMON 146 default NRF_SECURE_APPROTECT_USE_UICR 147 help 148 Specifies how the SystemInit() function should handle the secure 149 APPROTECT mechanism. 150 151config NRF_SECURE_APPROTECT_DISABLE 152 bool "Disable" 153 depends on SOC_NRF54L_CPUAPP_COMMON 154 help 155 When this option is selected, the SystemInit() disables 156 the secure APPROTECT mechanism. 157 158config NRF_SECURE_APPROTECT_USE_UICR 159 bool "Use UICR" 160 depends on SOC_NRF5340_CPUAPP || SOC_SERIES_NRF91X 161 help 162 When this option is selected, the SystemInit() function loads the 163 firmware branch state of the secure APPROTECT mechanism from UICR, 164 so if UICR->SECUREAPPROTECT is disabled, CTRLAP->SECUREAPPROTECT 165 will be disabled. 166 167config NRF_SECURE_APPROTECT_LOCK 168 bool "Lock" 169 help 170 When this option is selected, the SystemInit() function locks the 171 firmware branch of the secure APPROTECT mechanism, preventing it 172 from being opened. 173 174config NRF_SECURE_APPROTECT_USER_HANDLING 175 bool "Allow user handling" 176 depends on !SOC_SERIES_NRF52X 177 help 178 When this option is selected, the SystemInit() function does not 179 touch the secure APPROTECT mechanism, allowing the user code to 180 handle it at later stages, for example, to implement authenticated 181 debug. 182 183endchoice 184 185config NRF_TRACE_PORT 186 bool "nRF TPIU" 187 depends on !SOC_SERIES_NRF51X 188 help 189 Enable this option to initialize the TPIU (Trace Port Interface 190 Unit) for tracing using a hardware probe. If disabled, the trace 191 pins will be used as GPIO. 192 193config NRF_PLATFORM_HALTIUM 194 bool 195 help 196 SoC series based on the Nordic nRF Haltium platform need to select 197 this option. This allows to easily enable common functionality on 198 SoCs based on the Haltium platform. 199 200endif # SOC_FAMILY_NORDIC_NRF 201