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/Zephyr-latest/include/zephyr/drivers/comparator/
Dnrf_comp.h16 /** Positive input selection */
40 /** External reference selection */
60 /** Reference selection */
76 /** Speed mode selection */
106 /** Positive input selection */
108 /** Speed mode selection */
112 /** External reference selection */
114 /** Reference selection */
136 /** Positive input selection */
138 /** Speed mode selection */
[all …]
Dnrf_lpcomp.h16 /** Positive input selection */
36 /** External reference selection */
44 /** Reference selection */
86 /** Positive input selection */
88 /** External reference selection */
90 /** Reference selection */
/Zephyr-latest/tests/posix/timers/src/
Dnanosleep.c17 static inline int select_nanosleep(int selection, clockid_t clock_id, int flags, in select_nanosleep() argument
20 if (selection == SELECT_NANOSLEEP) { in select_nanosleep()
35 static void common_errors(int selection, clockid_t clock_id, int flags) in common_errors() argument
43 zassert_equal(select_nanosleep(selection, clock_id, flags, NULL, NULL), -1); in common_errors()
48 zassert_equal(select_nanosleep(selection, clock_id, flags, NULL, &rem), -1); in common_errors()
57 zassert_equal(select_nanosleep(selection, clock_id, flags, &req, NULL), -1); in common_errors()
62 zassert_equal(select_nanosleep(selection, clock_id, flags, &req, NULL), -1); in common_errors()
67 zassert_equal(select_nanosleep(selection, clock_id, flags, &req, NULL), -1); in common_errors()
73 zassert_equal(select_nanosleep(selection, clock_id, flags, &req, NULL), -1); in common_errors()
83 zassert_equal(select_nanosleep(selection, clock_id, flags, &req, NULL), 0); in common_errors()
[all …]
/Zephyr-latest/modules/hal_silabs/simplicity_sdk/config/
Dsl_clock_manager_tree_config.h37 #error "Invalid clock source selection for SYSCLK"
74 #error "Invalid clock source selection for TRACECLK"
107 #error "Invalid clock source selection for EM01GRPACLK"
131 #error "Invalid clock source selection for EM01GRPBCLK"
157 #error "Invalid clock source selection for EM01GRPCCLK"
175 #error "Invalid clock source selection for IADCCLK"
189 #error "Invalid clock source selection for LESENSEHFCLK"
204 #error "Invalid clock source selection for EM23GRPACLK"
218 #error "Invalid clock source selection for EM4GRPACLK"
233 #error "Invalid clock source selection for RTCCCLK"
[all …]
/Zephyr-latest/dts/bindings/pinctrl/
Dnuvoton,npcx-pinctrl.yaml6 pin function selection and pin properties. For example, you can use these
59 description: Configurations of pinmux selection
80 description: Lock pinmux selection
83 description: Inverse pinmux selection to GPIO
87 The assertion detection mode of PSL input selection
96 The assertion detection polarity of PSL input selection
Dnxp,rt-iocon-pinctrl.yaml26 IOCON_FUNC=<pin mux selection>,
30 IOCON_SLEWRATE = <slew-rate selection>,
31 IOCON_FULLDRIVE = <drive-strength selection>,
65 Pin mux selection for this group. See the SOC level pinctrl header
Dite,it8xxx2-pinctrl.yaml6 pin function selection and pin properties. For example, you can
91 Pin input voltage selection 3.3V or 1.8V. All gpio pins support 3.3V.
103 We can configure this property to drive a high or low current selection.
105 According to the SPEC, the default drive current selection varies from
/Zephyr-latest/include/zephyr/drivers/sensor/
Dmmc56x3.h12 * setting the continuous mode and bandwidth selection bits.
25 /* Bandwidth selection bit 0.
32 /* Bandwidth selection bit 1.
Dmcux_acmp.h89 /** Analog Comparator discrete mode clock selection. */
93 /** Analog Comparator discrete sample selection. */
95 /** Analog Comparator discrete phase1 sampling time selection. */
97 /** Analog Comparator discrete phase2 sampling time selection. */
/Zephyr-latest/dts/bindings/dac/
Dadi,max22017-dac.yaml33 Unipolar/bipolar mode selection for channels.
41 Voltage/current mode selection for channels.
49 Latch mode selection for channels.
60 Overcurrent mode selection for channels.
/Zephyr-latest/include/zephyr/dt-bindings/gpio/
Dadi-max32-gpio.h34 * - Bit 10: Weak pull up selection, Weak Pullup to VDDIO (1MOhm)
38 * - Bit 11: Weak pull down selection, Weak Pulldown to VDDIOH (1MOhm)
58 /** GPIO bias weak pull up selection, to VDDIO (1MOhm) */
61 /** GPIO bias weak pull down selection, to VDDIOH (1MOhm) */
/Zephyr-latest/cmake/sca/eclair/
Dsca_options.cmake3 option(ECLAIR_RULESET_FIRST_ANALYSIS "A tiny selection of the projects coding guideline rules to
6 option(ECLAIR_RULESET_STU "Selection of the projects coding guidelines, which can be verified
9 option(ECLAIR_RULESET_STU_HEAVY "Selection of complex STU project coding guidelines that
/Zephyr-latest/dts/bindings/adc/
Dnxp,lpc-lpadc.yaml29 Voltage reference selection. Corresponds to value of
53 There is no power level selection function.
58 Power level selection. Corresponds to the value of
Dadc-controller.yaml40 Gain selection:
89 Reference selection:
161 Output pin selection for the current sources. The actual
169 Output pin selection for the bias voltage. The actual interpretation
/Zephyr-latest/dts/bindings/clock/
Dnxp,kinetis-sim.yaml17 description: pll/fll selection for clock system
22 description: er32k selection for clock system
Dst,stm32wb0-rcc.yaml8 selection and generation.
30 Slow clock source selection.
/Zephyr-latest/include/zephyr/dt-bindings/pinctrl/
Dnxp-s32-pinctrl.h15 * - 0..2: Output mux Source Signal Selection (MSCR.SSS)
16 * - 3..6: Input mux Source Signal Selection (IMCR.SSS)
78 * @param mscr_sss Output mux Source Signal Selection (MSCR.SSS)
80 * @param imcr_sss Input mux Source Signal Selection (IMCR.SSS)
Dsilabs-pinctrl-dbus.h26 * 15..14: Bus selection (A, B, CD)
27 * 13..12: Bus selection (EVEN0, EVEN1, ODD0, ODD1)
28 * 11..8 : Peripheral selection (bit in GPIO_nBUSALLOC bitfield)
/Zephyr-latest/dts/bindings/misc/
Dzephyr,devmux.yaml22 Initial multiplexer selection.
27 If unspecified, the default selection is zero in order to ensure that
/Zephyr-latest/dts/bindings/sensor/
Dmemsic,mmc56x3.yaml21 bandwidth-selection-bits-0:
27 bandwidth-selection-bits-1:
/Zephyr-latest/include/zephyr/dt-bindings/clock/
Dstm32_common_clocks.h15 /** Dummy: Add a specifier when no selection is possible */
23 /** Helper macros to pack RCC clock source selection register info in the DT */
34 * @brief Pack STM32 source clock selection RCC register bit fields for the DT
/Zephyr-latest/doc/develop/sca/
Declair.rst48 which is a tiny selection of rules to verify that everything is correctly working.
60 Zephyr's guidelines selection
64 * first_analysis (default): a tiny selection of the projects coding guidelines to verify that
67 * STU: Selection of the projects coding guidelines, which can be verified by analysing the single
70 * STU_heavy: Selection of complex STU project coding guidelines that require a significant amount
/Zephyr-latest/boards/quicklogic/qomu/
Dqomu.dts74 quicklogic,control-selection = "fabric";
80 quicklogic,control-selection = "fabric";
86 quicklogic,control-selection = "fabric";
/Zephyr-latest/dts/bindings/net/wireless/
Dsilabs,series2-radio.yaml42 Power Amplifier selection for 2.4 GHz. A value of 'highest' selects the highest
55 Power Amplifier selection for sub-GHz. A value of 'highest' selects the highest
/Zephyr-latest/include/zephyr/drivers/misc/devmux/
Ddevmux.h57 * @brief Get the current selection of a devmux device.
68 * @brief Set the selection of a devmux device.
73 * @param index the index representing the desired selection

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