Searched full:npcx7 (Results 1 – 25 of 32) sorted by relevance
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| /Zephyr-latest/dts/arm/nuvoton/npcx/ |
| D | npcx7.dtsi | 7 /* NPCX7 series pinmux mapping table */
8 #include "npcx7/npcx7-alts-map.dtsi"
9 /* NPCX7 series mapping table between MIWU wui bits and source device */
10 #include "npcx7/npcx7-miwus-wui-map.dtsi"
11 /* NPCX7 series mapping table between MIWU groups and interrupts */
12 #include "npcx7/npcx7-miwus-int-map.dtsi"
13 /* NPCX7 series eSPI VW mapping table */
14 #include "npcx7/npcx7-espi-vws-map.dtsi"
15 /* NPCX7 series low-voltage io controls mapping table */
16 #include "npcx7/npcx7-lvol-ctrl-map.dtsi"
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| /Zephyr-latest/soc/nuvoton/npcx/npcx7/ |
| D | Kconfig.soc | 1 # Nuvoton Cortex-M4 Embedded Controller NPCX7 series
10 Enable support for Nuvoton NPCX7 series
31 default "npcx7" if SOC_SERIES_NPCX7
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| D | soc.h | 12 /* NPCX7 SCFG multi-registers offset */
18 /* NPCX7 MIWU multi-registers offset */
27 /* NPCX7 ADC multi-registers offset */
31 /* NPCX7 ADC register fields */
37 /* NPCX7 supported group mask of DEVALT_LK */
42 /* NPCX7 Clock configuration */
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| D | Kconfig | 1 # Nuvoton Cortex-M4 Embedded Controller NPCX7 series
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| D | soc.c | 22 * Set bit 7 of DEVCNT again for npcx7 series. Please see Errata in soc_early_init_hook()
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| /Zephyr-latest/boards/nuvoton/npcx7m6fb_evb/ |
| D | npcx7m6fb_evb-pinctrl.dtsi | 7 #include <nuvoton/npcx/npcx7/npcx7-pinctrl.dtsi>
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| /Zephyr-latest/dts/bindings/gpio/ |
| D | nuvoton,npcx-gpio.yaml | 27 For example the WUI mapping on NPCX7 GPIO8 would be
38 For example the LVOL mapping on NPCX7 GPIOC would be
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| /Zephyr-latest/dts/bindings/pinctrl/ |
| D | nuvoton,npcx-pinctrl.yaml | 20 An example for NPCX7 family, include the chip level pinctrl DTSI file in the
23 #include <nuvoton/npcx/npcx7/npcx7-pinctrl.dtsi>
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| D | nuvoton,npcx-pinctrl-conf.yaml | 5 Nuvoton NPCX7 Pin-Mux Configuration
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| D | nuvoton,npcx-lvolctrl-conf.yaml | 5 Nuvoton NPCX7 Low-Voltage level detection configuration map
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| /Zephyr-latest/soc/nuvoton/npcx/ |
| D | soc.yml | 8 - name: npcx7
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| /Zephyr-latest/dts/arm/nuvoton/npcx/npcx7/ |
| D | npcx7-espi-vws-map.dtsi | 10 /* Specific eSPI Virtual Wire (VW) mapping configurations in npcx7 series */
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| D | npcx7-lvol-ctrl-map.dtsi | 10 /* Specific Low-Voltage level configurations in npcx7 series */
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| D | npcx7-miwus-wui-map.dtsi | 10 /* Specific Wake-Up Unit Input (WUI) mapping configurations in npcx7 series */
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| D | npcx7-miwus-int-map.dtsi | 10 /* Specific MIWU group-interrupt mapping configurations in npcx7 series */
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| D | npcx7-alts-map.dtsi | 10 /* Specific pin-mux configurations in npcx7 series */
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| /Zephyr-latest/dts/bindings/watchdog/ |
| D | nuvoton,npcx-watchdog.yaml | 18 For example, the WUI mapping on NPCX7 t0-out timer would be
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| /Zephyr-latest/dts/bindings/serial/ |
| D | nuvoton,npcx-uart.yaml | 25 For example the WUI mapping on NPCX7 UART1 would be
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| /Zephyr-latest/dts/bindings/espi/ |
| D | nuvoton,npcx-host-sub.yaml | 26 For example the WUI mapping on NPCX7 would be
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| D | nuvoton,npcx-espi-vw-conf.yaml | 24 For example the WUI mapping on NPCX7 for VW_SLP5 would be
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| D | nuvoton,npcx-espi.yaml | 31 For example the WUI mapping on NPCX7 would be
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| /Zephyr-latest/dts/bindings/shi/ |
| D | nuvoton,npcx-shi.yaml | 27 For example the WUI mapping on NPCX7 would be
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| /Zephyr-latest/dts/arm/nuvoton/ |
| D | npcx7m6fb.dtsi | 8 #include "npcx/npcx7.dtsi"
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| D | npcx7m6fc.dtsi | 8 #include "npcx/npcx7.dtsi"
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| D | npcx7m7fc.dtsi | 8 #include "npcx/npcx7.dtsi"
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