Searched full:lcdic (Results 1 – 13 of 13) sorted by relevance
| /Zephyr-latest/drivers/mipi_dbi/ |
| D | Kconfig.nxp_lcdic | 5 bool "NXP MIPI DBI LCDIC driver"
11 Enable support for NXP SPI LCDIC display controller driver
16 bool "Use DMA for transfers with LCDIC driver"
19 Use DMA for transfers when sending data with the LCDIC driver.
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| D | mipi_dbi_nxp_lcdic.c | 43 /* Limit imposed by size of data length field in LCDIC command */
50 /* Descriptor for LCDIC command */
53 /* Data length in bytes. LCDIC transfers data_len + 1 */
142 /* After LCDIC is enabled or disabled, there should be a wait longer than
150 /* Resets state of the LCDIC TX/RX FIFO */
165 /* Start DMA to send data using LCDIC TX FIFO */
235 /* Configure LCDIC */
255 /* Set LCDIC clock frequency */ in mipi_dbi_lcdic_configure()
292 LOG_ERR("LCDIC only supports half duplex operation"); in mipi_dbi_lcdic_configure()
693 /* Initializes LCDIC peripheral */
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| /Zephyr-latest/dts/bindings/mipi-dbi/ |
| D | nxp,lcdic.yaml | 5 NXP LCDIC Controller. This controller implements 8080 and SPI mode MIPI-DBI
7 compatible: "nxp,lcdic"
24 Swap bytes while transferring on LCDIC. When set, the LCDIC will send
31 the display. If not provided, the LCDIC module's reset pin will be used
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| /Zephyr-latest/boards/shields/lcd_par_s035/boards/ |
| D | rd_rw612_bga.overlay | 45 /* Expand the LCDIC pinmux to cover all 8080 mode pins */
70 * means we can clock the LCDIC module at 30MHz, as
80 * on the LCDIC will apply byte swapping in hardware, so the
91 &lcdic {
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| /Zephyr-latest/boards/shields/adafruit_2_8_tft_touch_v2/boards/ |
| D | rd_rw612_bga.overlay | 15 * RW612 uses LCDIC controller, which implements the MIPI DBI API
22 &lcdic {
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| /Zephyr-latest/boards/nxp/rd_rw612_bga/ |
| D | Kconfig.defconfig | 10 # Enable DMA for LCDIC
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| D | rd_rw612_bga.dtsi | 243 zephyr_mipi_dbi_parallel: &lcdic {
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| /Zephyr-latest/boards/nxp/rd_rw612_bga/dts/ |
| D | goworld_16880_lcm.overlay | 17 &lcdic {
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| /Zephyr-latest/dts/arm/nxp/ |
| D | nxp_rw6xx_common.dtsi | 309 lcdic: lcdic@128000 { label
310 compatible = "nxp,lcdic";
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| /Zephyr-latest/soc/nxp/rw/ |
| D | soc.c | 234 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(lcdic)) && CONFIG_MIPI_DBI_NXP_LCDIC in clock_init()
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| /Zephyr-latest/drivers/clock_control/ |
| D | clock_control_mcux_syscon.c | 491 /* Set LCDIC clock div */ in mcux_lpc_syscon_clock_control_set_subsys_rate()
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| /Zephyr-latest/boards/nxp/rd_rw612_bga/doc/ |
| D | index.rst | 51 | LCDIC | on-chip | mipi-dbi |
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| /Zephyr-latest/doc/releases/ |
| D | release-notes-4.0.rst | 730 * Added support for 8080 mode to NXP LCDIC controller (:dtcompatible:`nxp,lcdic`).
731 * Fixed the calculation of the reset delay for NXP's LCD controller (:dtcompatible:`nxp,lcdic`)
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