1# RD_RW612_BGA board
2
3# Copyright 2022-2024 NXP
4# SPDX-License-Identifier: Apache-2.0
5
6if BOARD_RD_RW612_BGA
7
8if LVGL
9
10# Enable DMA for LCDIC
11config MIPI_DBI_NXP_LCDIC_DMA
12	default y if MIPI_DBI
13
14# Increase descriptor count. LVGL will allocate a 30KB buffer,
15# and the SPI driver sets up RX and TX side. Since LPC DMA has
16# 1KB limit per descriptor, we need 60
17config DMA_MCUX_LPC_NUMBER_OF_DESCRIPTORS
18	default 60
19
20# Allocate buffer that is 10% of screen size
21config LV_Z_VDB_SIZE
22	default 10
23
24# Enable double buffering and offloaded render thread to improve performance
25config LV_Z_DOUBLE_VDB
26	default y
27
28config LV_Z_FLUSH_THREAD
29	default y
30
31endif # LVGL
32
33if DT_HAS_NXP_ENET_MAC_ENABLED && NETWORKING
34
35config NET_L2_ETHERNET
36	default y
37
38endif # DT_HAS_NXP_ENET_MAC_ENABLED && NETWORKING
39
40config ZTEST_NO_YIELD
41	default y if (ZTEST && PM)
42
43endif # BOARD_RD_RW612_BGA
44