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/Zephyr-latest/dts/bindings/bluetooth/
Dnxp,bt-hci-uart.yaml30 fw-download-primary-speed:
33 HCI UART primary baudrate for FW download operation.
36 fw-download-primary-flowcontrol:
41 fw-download-secondary-speed:
44 HCI UART secondary baudrate for FW download operation.
47 fw-download-secondary-flowcontrol:
Dinfineon,cyw43xxx-bt-hci.yaml29 fw-download-speed = <3000000>;
36 NOTE2: Use fw-download-speed and hci-operation-speed properties to configure UART
37 speeds for firmware download (fw-download-speed) and HCI operation
39 If hci-operation-speed or fw-download-speed are not defined in bt-hci node,
74 fw-download-speed:
77 HCI UART boudrate for FW download operation. If not defined
/Zephyr-latest/drivers/bluetooth/hci/
DKconfig.infineon143 Enable 10dBm TX Power variant of CYW20829 FW patch.
146 prompt "Select variant of default CYW20829 BT FW"
157 Enable CYW20829 FW patch for 0dBm TX Power.
163 Enable CYW20829 FW patch for 10dBm TX Power.
169 Enable CYW20829 FW patch with PAwR support for 0dBm TX Power.
175 Enable CYW20829 FW patch for 10dBm TX Power.
181 Enable CYW20829 FW patch for 0dBm TX Power.
187 Enable CYW20829 FW patch for 10dBm TX Power.
Dh4_ifx_cyw43xxx.c36 /* Stabilization delay after FW loading */
48 /* Externs for CY43xxx controller FW */
155 LOG_DBG("Executing Fw downloading for CYW43xx device"); in bt_firmware_download()
206 LOG_DBG("Fw downloading complete"); in bt_firmware_download()
275 /* When FW launched, HCI UART baudrate should be configured to default */ in bt_h4_vnd_setup()
290 * after fw downloading. in bt_h4_vnd_setup()
/Zephyr-latest/tests/net/lib/lwm2m/interop/pytest/
Dtest_blockwise.py28 fw = b'1234567890' * 500
33 leshan.write(endpoint, '5/0/0', fw)
42 assert crc == zlib.crc32(fw)
49 fw = b'1234567890' * 500
56 leshan.write(endpoint, '5/0/0', fw)
63 leshan.write(endpoint, '5/0/0', fw)
72 assert crc == zlib.crc32(fw)
/Zephyr-latest/boards/intel/adsp/doc/
Dintel_adsp_generic.rst163 :zephyr_file:`soc/intel/intel_adsp/tools/remote-fw-service.py` will receive
167 :file:`remote-fw-service.py`.
172 scp -r $ZEPHYR_BASE/soc/intel/intel_adsp/tools/remote-fw-service.py username@remotehostname
174 sudo ./remote-fw-service.py
176 :file:`remote-fw-service.py` uses ports 9999 and 10000 on the remote host to
197 :file:`cavstool_client.py` to :file:`remote-fw-service.py` is forwarded through
270 sudo ./remote-fw-service.py -v
277 sudo ./remote-fw-service.py --help
289 :file:`remote-fw-service.py` on the board, you may have another instance of the
299 with :file:`remote-fw-service.py` but hang with no output afterwards,
[all …]
/Zephyr-latest/soc/intel/intel_adsp/
DKconfig122 bool "Saves FW context into IMR before core is shut down"
125 When true, FW will store its entire context into IMR before
126 entering D3 state. Later this context can be used to FW restore
144 When true, FW will run with enabled clock gating. This options change
/Zephyr-latest/modules/hal_infineon/btstack-integration/
DCMakeLists.txt60 # CYW20829 device (FW patch for 0dBm TX Power)
65 # CYW20829 device (FW patch for 10dBm TX Power)
70 # CYW20829 device (FW patch with PAwR support for 0dBm TX Power)
75 # CYW20829 device (FW patch with PAwR support for 10dBm TX Power)
80 # CYW20829 device (FW patch with ISOC support for 0dBm TX Power)
85 # CYW20829 device (FW patch with ISOC support for 10dBm TX Power)
/Zephyr-latest/drivers/wifi/nrf_wifi/src/
Dfw_load.c8 * @brief File containing FW load functions for Zephyr.
34 /* Load the FW patches to the RPU */ in nrf_wifi_fw_load()
/Zephyr-latest/soc/intel/intel_adsp/common/include/
Dmanifest.h14 /* start offset for base FW module */
17 /* FW Extended Manifest Header id = $AE1 */
75 * Each module has an entry in the FW header. Used by ROM - Immutable.
93 * Each module has a configuration in the FW header. Used by ROM - Immutable.
107 * FW Manifest Header
/Zephyr-latest/soc/nuvoton/npcx/common/ecst/
Decst.py231 print(f'- HDR - FW Header ANCHOR - Offset '
266 FW HEADER SIZE (64 KB)
267 input file size is bigger than FW HEADER SIZE (64 KB)
290 f'should be bigger than fw header size ({HEADER_SIZE} bytes)'
294 message = f'FW offset ({paste_fw_offset_to_print})should be less ' \
295 f'than input file size ({input_file_size}) minus fw header size' \
436 print(f'- HDR - FW CRC Enabled - Offset '
443 """writes the fw load address to the output file
470 message = f'Cannot read FW Load start address'
500 print(f'- HDR - FW load start address - Offset '
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/Zephyr-latest/boards/nxp/mimxrt1170_evk/
Dmimxrt1170_evk_mimxrt1176_cm7_B.overlay94 fw-download-primary-speed = <115200>;
95 fw-download-secondary-speed = <3000000>;
96 fw-download-secondary-flowcontrol;
/Zephyr-latest/drivers/watchdog/
Dwdt_intel_adsp.h31 * FW write 76h as the code to set the PAUSED bit. Other value are ignored and has no effect.
41 * field. Clear when FW writes a 1 to the bit.
50 * watch dog timer. Clear when DSPCCTL.CPA = 0. Set when FW writes a 1 to the bit.
137 * watch dog timer. Clear when DSPCCTL.CPA = 0. Set when FW writes a 1 to the bit.
/Zephyr-latest/boards/raytac/mdbt53_db_40/
DKconfig.defconfig13 # secure image (TRUSTED_EXECUTION_SECURE=y), the secure FW image shall always
24 # (TRUSTED_EXECUTION_SECURE=y), the secure FW image SRAM shall always
/Zephyr-latest/boards/raytac/mdbt53v_db_40/
DKconfig.defconfig13 # secure image (TRUSTED_EXECUTION_SECURE=y), the secure FW image shall always
24 # (TRUSTED_EXECUTION_SECURE=y), the secure FW image SRAM shall always
/Zephyr-latest/boards/nordic/nrf5340dk/
DKconfig.defconfig13 # secure image (TRUSTED_EXECUTION_SECURE=y), the secure FW image shall always
24 # (TRUSTED_EXECUTION_SECURE=y), the secure FW image SRAM shall always
/Zephyr-latest/boards/nordic/nrf5340_audio_dk/
DKconfig.defconfig13 # secure image (TRUSTED_EXECUTION_SECURE=y), the secure FW image shall always
24 # (TRUSTED_EXECUTION_SECURE=y), the secure FW image SRAM shall always
/Zephyr-latest/boards/infineon/cy8cproto_062_4343w/
Dcy8cproto_062_4343w.dts69 /* Configuration UART speeds for firmware download (fw-download-speed)
71 * If hci-operation-speed or fw-download-speed are not defined in
75 fw-download-speed = <3000000>;
/Zephyr-latest/boards/nordic/thingy53/
DKconfig.defconfig13 # secure image (TRUSTED_EXECUTION_SECURE=y), the secure FW image shall always
24 # (TRUSTED_EXECUTION_SECURE=y), the secure FW image SRAM shall always
/Zephyr-latest/soc/intel/intel_adsp/ace/
Dcomm_widget.h195 * and cleared by HW when FW writes to upstream completion control register
292 * cleared by FW when writing 1 to it.
318 * sent out, and cleared by FW when writing 1 to it.
339 * DSP FW writes a 1 to this bit to cause an IOSF SB Transaction. The type of
341 * read as 0 but FW can write it to 1 to start the upstream transaction. In that way
572 * Completion for downstream request handling. DSP FW writes a 1 to this bit to
668 * Implementation Note: This FW managed TCG bit is not used as HW has been improved
695 * model in ACE IP to support any boot prep message handling by FW.
703 * This bit is set by DSP FW to enable SBEP HW to accept downstream cycles from
705 * NOTE: If a BOOTPREP message is received, DSP FW is interrupted unconditionally,
[all …]
Dpmc_interface.h61 * No operation - PMC FW will clear the run / busy bit and return a success response
72 * SRAM config - Any FW allocating HP-SRAM is expected to report allocated number of banks.
/Zephyr-latest/boards/ezurio/bl5340_dvk/
DKconfig.defconfig17 # secure image (TRUSTED_EXECUTION_SECURE=y), the secure FW image shall always
28 # (TRUSTED_EXECUTION_SECURE=y), the secure FW image SRAM shall always
/Zephyr-latest/soc/intel/intel_adsp/tools/
Dremote-fw-service.py42 log = logging.getLogger("remote-fw")
76 log.error(f"Get exception {e} during FW transfer.")
99 log.error("Cannot find the FW file.")
139 log.info("wait for FW ready...")
146 log.info("FW is ready...")
248 log.info(f"Current FW is {self.fw_file}")
/Zephyr-latest/soc/nuvoton/npcm/common/esiost/
Desiost.py172 print(f'- HDR - FW Header ANCHOR - Offset '
178 """writes the fw load address to the output file
203 message = f'Cannot read FW Load start address'
254 print(f'- HDR - FW load start address - Offset '
267 """writes the fw entry point to the output file.
278 # check if fwep flag wasn't set and set it to fw load address if needed
304 print(f'- HDR - FW Entry point - Offset '
337 print(f'- HDR - FW Length - Offset '
495 """copies the fw image from the input file to the output file
/Zephyr-latest/soc/microchip/mec/common/spigen/
Dmec_spi_gen.py129 pld_spi_loc: Payload(FW binary) location in SPI Image
208 # Unsigned offset from start of Header to start of FW Binary
209 # FW binary(payload) must always be located after header
267 help="FW entry point address Lookup in image (default: %(default)s)")
354 print("Read input FW binary: length = {0}".format(indata_len))
367 print("Padded FW binary: length = {0}".format(indata_len))
369 # Do we have enough space for 4KB block containing TAG and Header, padded FW binary,
373 …print("ERROR: FW binary exceeds flash size! indata_len = {0} spi_size = {1}".format(indata_len, sp…

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