1# Raytac MDBT53V-DB-40 nRF5340 board configuration
2
3# Copyright (c) 2019-2020 Nordic Semiconductor ASA
4# SPDX-License-Identifier: Apache-2.0
5
6if BOARD_RAYTAC_MDBT53V_DB_40_NRF5340_CPUAPP || BOARD_RAYTAC_MDBT53V_DB_40_NRF5340_CPUAPP_NS
7
8# Code Partition:
9#
10# For the secure version of the board the firmware is linked at the beginning
11# of the flash, or into the code-partition defined in DT if it is intended to
12# be loaded by MCUboot. If the secure firmware is to be combined with a non-
13# secure image (TRUSTED_EXECUTION_SECURE=y), the secure FW image shall always
14# be restricted to the size of its code partition.
15#
16# For the non-secure version of the board, the firmware
17# must be linked into the code-partition (non-secure) defined in DT, regardless.
18# Apply this configuration below by setting the Kconfig symbols used by
19# the linker according to the information extracted from DT partitions.
20
21# SRAM Partition:
22#
23# If the secure firmware is to be combined with a non-secure image
24# (TRUSTED_EXECUTION_SECURE=y), the secure FW image SRAM shall always
25# be restricted to the secure image SRAM partition (sram-secure-partition).
26# Otherwise (if TRUSTED_EXECUTION_SECURE is not set) the whole zephyr,sram
27# may be used by the image.
28#
29# For the non-secure version of the board, the firmware image SRAM is
30# always restricted to the allocated non-secure SRAM partition.
31#
32# Workaround for not being able to have commas in macro arguments
33DT_CHOSEN_Z_CODE_PARTITION := zephyr,code-partition
34DT_CHOSEN_Z_SRAM_PARTITION := zephyr,sram-secure-partition
35
36if BOARD_RAYTAC_MDBT53V_DB_40_NRF5340_CPUAPP && TRUSTED_EXECUTION_SECURE
37
38config FLASH_LOAD_SIZE
39	default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
40
41config SRAM_SIZE
42	default $(dt_chosen_reg_size_int,$(DT_CHOSEN_Z_SRAM_PARTITION),0,K)
43
44endif # BOARD_RAYTAC_MDBT53V_DB_40_NRF5340_CPUAPP && TRUSTED_EXECUTION_SECURE
45
46if BOARD_RAYTAC_MDBT53V_DB_40_NRF5340_CPUAPP_NS
47
48config FLASH_LOAD_OFFSET
49	default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
50
51config FLASH_LOAD_SIZE
52	default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
53
54endif # BOARD_RAYTAC_MDBT53V_DB_40_NRF5340_CPUAPP_NS
55
56config BT_HCI_IPC
57	default y if BT
58
59config HEAP_MEM_POOL_ADD_SIZE_BOARD
60	int
61	default 4096 if BT_HCI_IPC
62
63endif # BOARD_RAYTAC_MDBT53V_DB_40_NRF5340_CPUAPP || BOARD_RAYTAC_MDBT53V_DB_40_NRF5340_CPUAPP_NS
64
65if BOARD_RAYTAC_MDBT53V_DB_40_NRF5340_CPUNET
66
67endif # BOARD_RAYTAC_MDBT53V_DB_40_NRF5340_CPUNET
68