Home
last modified time | relevance | path

Searched full:fiu (Results 1 – 25 of 30) sorted by relevance

12

/Zephyr-latest/dts/bindings/flash_controller/
Dnuvoton,npcx-fiu-nor.yaml5 The SPI NOR flash devices accessed by Nuvoton Flash Interface Unit (FIU).
10 compatible ="nuvoton,npcx-fiu-nor";
20 compatible: "nuvoton,npcx-fiu-nor"
Dnuvoton,npcx-fiu-qspi.yaml5 Properties defining the NPCX Quad-SPI peripheral of Flash Interface Unit (FIU).
26 compatible: "nuvoton,npcx-fiu-qspi"
/Zephyr-latest/boards/nuvoton/npcx4m8f_evb/support/
Dopenocd.cfg6 set FIUNAME npcx_v2.fiu
/Zephyr-latest/dts/bindings/clock/
Dnuvoton,npcm-pcc.yaml20 fiu-prescaler = <1>; /* FIU_CLK runs at 96MHz */
193 fiu-prescaler:
197 FIU prescaler. The FIU clock (FIUCLK) is derived from the Core clock (CLK) via a
/Zephyr-latest/dts/arm/nuvoton/
Dnpcx4m3f.dtsi33 compatible ="nuvoton,npcx-fiu-nor";
Dnpcx4m8f.dtsi33 compatible ="nuvoton,npcx-fiu-nor";
Dnpcx9m3f.dtsi33 compatible ="nuvoton,npcx-fiu-nor";
Dnpcx9m6f.dtsi33 compatible ="nuvoton,npcx-fiu-nor";
Dnpcx9m7f.dtsi31 compatible ="nuvoton,npcx-fiu-nor";
Dnpcx7m6fb.dtsi39 compatible ="nuvoton,npcx-fiu-nor";
Dnpcx7m6fc.dtsi39 compatible ="nuvoton,npcx-fiu-nor";
Dnpcx9m7fb.dtsi31 compatible ="nuvoton,npcx-fiu-nor";
Dnpcx7m7fc.dtsi43 compatible ="nuvoton,npcx-fiu-nor";
Dnpcx9mfp.dtsi50 compatible ="nuvoton,npcx-fiu-nor";
/Zephyr-latest/dts/arm/nuvoton/npcm/
Dnpcm4.dtsi33 fiu-prescaler = <1>; /* FIU_CLK runs at 96MHz */
/Zephyr-latest/dts/arm/nuvoton/npcx/npcx9/
Dnpcx9-pinctrl.dtsi18 /omit-if-no-ref/ ext_flash_tris_off: devctl-fiu-ext-tris-off {
22 /omit-if-no-ref/ ext_flash_tris_on: devctl-fiu-ext-tris-on {
35 /* Flash Interface Unit (FIU) */
36 /omit-if-no-ref/ fiu_ext_io0_io1_clk_cs_gpa4_96_a2_a0: periph-fiu-ext {
45 /omit-if-no-ref/ int_flash_sl: periph-fiu-int {
50 /omit-if-no-ref/ fiu_ext_quad_io2_io3_gp93_a7: periph-fiu-ext-quad {
/Zephyr-latest/dts/arm/nuvoton/npcx/npcx7/
Dnpcx7-pinctrl.dtsi17 /omit-if-no-ref/ ext_flash_tris_off: devctl-fiu-ext-tris-off {
21 /omit-if-no-ref/ ext_flash_tris_on: devctl-fiu-ext-tris-on {
34 /* Flash Interface Unit (FIU) */
35 /omit-if-no-ref/ fiu_ext_io0_io1_clk_cs_gpa4_96_a2_a0: periph-fiu-ext {
40 /omit-if-no-ref/ int_flash_sl: periph-fiu-int {
/Zephyr-latest/soc/nuvoton/npcx/npcx9/
Dsoc.h38 /* NPCX9 FIU register fields */
/Zephyr-latest/soc/nuvoton/npcx/npcx4/
Dsoc.h39 /* NPCX4 FIU register fields */
/Zephyr-latest/dts/arm/nuvoton/npcx/npcx4/
Dnpcx4-pinctrl.dtsi25 /omit-if-no-ref/ ext_flash_tris_off: devctl-fiu-ext-tris-off {
29 /omit-if-no-ref/ ext_flash_tris_on: devctl-fiu-ext-tris-on {
50 /* Flash Interface Unit (FIU) */
51 /omit-if-no-ref/ fiu_ext_io0_io1_clk_cs_gpa4_96_a2_a0: periph-fiu-ext {
55 /omit-if-no-ref/ fiu_ext_quad_io2_io3_gp93_a7: periph-fiu-ext-quad {
/Zephyr-latest/drivers/flash/
Dflash_npcx_fiu_qspi.c157 /* NPCX specific QSPI-FIU controller functions */
263 LOG_ERR("Turn on FIU clock fail %d", ret); in qspi_npcx_fiu_init()
/Zephyr-latest/soc/nuvoton/npcx/common/
Dsoc_espi_taf.h109 * The configurations of SPI flash are set in FIU module.
Dsoc_clock.h93 /* FIU clock divider */
Dregisters.c164 /* FIU register structure check */
/Zephyr-latest/dts/arm/nuvoton/npcx/
Dnpcx-alts-map.dtsi20 /* FPIP (FIU SPI Interface Peripheral) for external flash. */

12